typedef nvmlReturn_t (*NVML_DEVICE_GET_UTILIZATION_RATES) (nvmlDevice_t, nvmlUtilization_t *);
typedef nvmlReturn_t (*NVML_DEVICE_GET_CLOCKINFO) (nvmlDevice_t, nvmlClockType_t, unsigned int *);
typedef nvmlReturn_t (*NVML_DEVICE_GET_THRESHOLD) (nvmlDevice_t, nvmlTemperatureThresholds_t, unsigned int *);
+typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRPCIELINKGENERATION) (nvmlDevice_t, unsigned int *);
+typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRPCIELINKWIDTH) (nvmlDevice_t, unsigned int *);
typedef struct
{
NVML_DEVICE_GET_UTILIZATION_RATES nvmlDeviceGetUtilizationRates;
NVML_DEVICE_GET_CLOCKINFO nvmlDeviceGetClockInfo;
NVML_DEVICE_GET_THRESHOLD nvmlDeviceGetTemperatureThreshold;
+ NVML_DEVICE_GET_CURRPCIELINKGENERATION nvmlDeviceGetCurrPcieLinkGeneration;
+ NVML_DEVICE_GET_CURRPCIELINKWIDTH nvmlDeviceGetCurrPcieLinkWidth;
} hm_nvml_lib_t;
nvmlReturn_t hm_NVML_nvmlDeviceGetUtilizationRates (NVML_PTR *nvml, nvmlDevice_t device, nvmlUtilization_t *utilization);
nvmlReturn_t hm_NVML_nvmlDeviceGetClockInfo (NVML_PTR *nvml, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clock);
nvmlReturn_t hm_NVML_nvmlDeviceGetTemperatureThreshold (NVML_PTR *nvml, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp);
+nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkGeneration (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *currLinkGen);
+nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *currLinkWidth);
#endif // HAVE_HWMON && HAVE_NVML
int hm_get_threshold_slowdown_with_device_id (const uint device_id);
int hm_get_temperature_with_device_id (const uint device_id);
int hm_get_fanspeed_with_device_id (const uint device_id);
-int hm_get_maxbuslanes_with_device_id (const uint device_id);
-int hm_get_currentbuslanes_with_device_id (const uint device_id);
+int hm_get_buslanes_with_device_id (const uint device_id);
int hm_get_utilization_with_device_id (const uint device_id);
int hm_get_memoryspeed_with_device_id (const uint device_id);
int hm_get_corespeed_with_device_id (const uint device_id);
HC_LOAD_FUNC(nvml, nvmlDeviceGetUtilizationRates, NVML_DEVICE_GET_UTILIZATION_RATES, NVML, 0)
HC_LOAD_FUNC(nvml, nvmlDeviceGetClockInfo, NVML_DEVICE_GET_CLOCKINFO, NVML, 0)
HC_LOAD_FUNC(nvml, nvmlDeviceGetTemperatureThreshold, NVML_DEVICE_GET_THRESHOLD, NVML, 0)
+ HC_LOAD_FUNC(nvml, nvmlDeviceGetCurrPcieLinkGeneration, NVML_DEVICE_GET_CURRPCIELINKGENERATION, NVML, 0)
+ HC_LOAD_FUNC(nvml, nvmlDeviceGetCurrPcieLinkWidth, NVML_DEVICE_GET_CURRPCIELINKWIDTH, NVML, 0)
return 0;
}
return nvml_rc;
}
+
+nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkGeneration (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *currLinkGen)
+{
+ if (!nvml) return -1;
+
+ nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetCurrPcieLinkGeneration (device, currLinkGen);
+
+ if (nvml_rc != NVML_SUCCESS)
+ {
+ *currLinkGen = -1;
+
+ //const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
+
+ //log_info ("WARN: %s %d %s\n", "nvmlDeviceGetUtilizationRates()", nvml_rc, string);
+ }
+
+ return nvml_rc;
+}
+
+nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *currLinkWidth)
+{
+ if (!nvml) return -1;
+
+ nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetCurrPcieLinkWidth (device, currLinkWidth);
+
+ if (nvml_rc != NVML_SUCCESS)
+ {
+ *currLinkWidth = -1;
+
+ //const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
+
+ //log_info ("WARN: %s %d %s\n", "nvmlDeviceGetUtilizationRates()", nvml_rc, string);
+ }
+
+ return nvml_rc;
+}
#define HM_STR_BUF_SIZE 255
- char utilization[HM_STR_BUF_SIZE] = { 0 };
- char temperature[HM_STR_BUF_SIZE] = { 0 };
- char fanspeed[HM_STR_BUF_SIZE] = { 0 };
- char corespeed[HM_STR_BUF_SIZE] = { 0 };
- char memoryspeed[HM_STR_BUF_SIZE] = { 0 };
- char currentbuslanes[HM_STR_BUF_SIZE] = { 0 };
- char maxbuslanes[HM_STR_BUF_SIZE] = { 0 };
-
- hm_device_val_to_str ((char *) utilization, HM_STR_BUF_SIZE, "%", hm_get_utilization_with_device_id (device_id));
- hm_device_val_to_str ((char *) temperature, HM_STR_BUF_SIZE, "c", hm_get_temperature_with_device_id (device_id));
- hm_device_val_to_str ((char *) fanspeed, HM_STR_BUF_SIZE, "%", hm_get_fanspeed_with_device_id (device_id));
- hm_device_val_to_str ((char *) corespeed, HM_STR_BUF_SIZE, "Mhz", hm_get_corespeed_with_device_id (device_id));
- hm_device_val_to_str ((char *) memoryspeed, HM_STR_BUF_SIZE, "Mhz", hm_get_memoryspeed_with_device_id (device_id));
- hm_device_val_to_str ((char *) currentbuslanes, HM_STR_BUF_SIZE, "", hm_get_currentbuslanes_with_device_id (device_id));
- hm_device_val_to_str ((char *) maxbuslanes, HM_STR_BUF_SIZE, "", hm_get_maxbuslanes_with_device_id (device_id));
-
- log_info ("HWMon.GPU.#%d...: %s Util, %s Temp, %s Fan, %s Core, %s Mem, %s/%s Lanes", device_id + 1, utilization, temperature, fanspeed, corespeed, memoryspeed, currentbuslanes, maxbuslanes);
+ char utilization[HM_STR_BUF_SIZE] = { 0 };
+ char temperature[HM_STR_BUF_SIZE] = { 0 };
+ char fanspeed[HM_STR_BUF_SIZE] = { 0 };
+ char corespeed[HM_STR_BUF_SIZE] = { 0 };
+ char memoryspeed[HM_STR_BUF_SIZE] = { 0 };
+ char buslanes[HM_STR_BUF_SIZE] = { 0 };
+
+ hm_device_val_to_str ((char *) utilization, HM_STR_BUF_SIZE, "%", hm_get_utilization_with_device_id (device_id));
+ hm_device_val_to_str ((char *) temperature, HM_STR_BUF_SIZE, "c", hm_get_temperature_with_device_id (device_id));
+ hm_device_val_to_str ((char *) fanspeed, HM_STR_BUF_SIZE, "%", hm_get_fanspeed_with_device_id (device_id));
+ hm_device_val_to_str ((char *) corespeed, HM_STR_BUF_SIZE, "Mhz", hm_get_corespeed_with_device_id (device_id));
+ hm_device_val_to_str ((char *) memoryspeed, HM_STR_BUF_SIZE, "Mhz", hm_get_memoryspeed_with_device_id (device_id));
+ hm_device_val_to_str ((char *) buslanes, HM_STR_BUF_SIZE, "", hm_get_buslanes_with_device_id (device_id));
+
+ log_info ("HWMon.GPU.#%d...: %s Util, %s Temp, %s Fan, %s Core, %s Mem, %s Lanes", device_id + 1, utilization, temperature, fanspeed, corespeed, memoryspeed, buslanes);
}
hc_thread_mutex_unlock (mux_adl);
return -1;
}
-int hm_get_maxbuslanes_with_device_id (const uint device_id)
-{
- if ((data.devices_param[device_id].device_type & CL_DEVICE_TYPE_GPU) == 0) return -1;
-
- #ifdef HAVE_ADL
- if (data.devices_param[device_id].device_vendor_id == VENDOR_ID_AMD)
- {
- if (data.hm_amd)
- {
- ADLPMActivity PMActivity;
-
- PMActivity.iSize = sizeof (ADLPMActivity);
-
- if (hm_ADL_Overdrive_CurrentActivity_Get (data.hm_amd, data.hm_device[device_id].adapter_index.amd, &PMActivity) != ADL_OK) return -1;
-
- return PMActivity.iMaximumBusLanes;
- }
- }
- #endif // HAVE_ADL
-
- #if defined(HAVE_NVML) || defined(HAVE_NVAPI)
- if (data.devices_param[device_id].device_vendor_id == VENDOR_ID_NV)
- {
- #if defined(LINUX) && defined(HAVE_NVML)
-
- #endif
-
- #if defined(WIN) && defined(HAVE_NVAPI)
-
- #endif
- }
- #endif // HAVE_NVML || HAVE_NVAPI
-
- return -1;
-}
-
-int hm_get_currentbuslanes_with_device_id (const uint device_id)
+int hm_get_buslanes_with_device_id (const uint device_id)
{
if ((data.devices_param[device_id].device_type & CL_DEVICE_TYPE_GPU) == 0) return -1;
if (data.devices_param[device_id].device_vendor_id == VENDOR_ID_NV)
{
#if defined(LINUX) && defined(HAVE_NVML)
+ unsigned int currLinkWidth;
+
+ hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (data.hm_nv, data.hm_device[device_id].adapter_index.nv, &currLinkWidth);
+ return currLinkWidth;
#endif
#if defined(WIN) && defined(HAVE_NVAPI)