include/ext_nvml.h

   1 /**
   2  * Authors.....: Jens Steube <jens.steube@gmail.com>
   3  *               Gabriele Gristina <matrix@hashcat.net>
   4  *               magnum <john.magnum@hushmail.com>
   5  *
   6  * License.....: MIT
   7  */
   8
   9 #ifndef EXT_NVML_H
  10 #define EXT_NVML_H
  11
  12 #if defined(HAVE_HWMON)
  13
  14 #include <common.h>
  15
  16 /**
  17  * Declarations from nvml.h
  18  */
  19
  20 typedef struct nvmlDevice_st* nvmlDevice_t;
  21
  22 typedef struct nvmlPciInfo_st {
  23   char busId[16];
  24   unsigned int domain;
  25   unsigned int bus;
  26   unsigned int device;
  27   unsigned int pciDeviceId;
  28   unsigned int pciSubSystemId;
  29 } nvmlPciInfo_t;
  30
  31 typedef struct nvmlUtilization_st {
  32   unsigned int gpu;    // GPU kernel execution last second, percent
  33   unsigned int memory; // GPU memory read/write last second, percent
  34 } nvmlUtilization_t;
  35
  36 typedef enum nvmlTemperatureSensors_enum {
  37   NVML_TEMPERATURE_GPU = 0     // Temperature sensor for the GPU die
  38 } nvmlTemperatureSensors_t;
  39
  40 typedef enum nvmlReturn_enum {
  41   NVML_SUCCESS = 0,                   // The operation was successful
  42   NVML_ERROR_UNINITIALIZED = 1,       // NVML was not first initialized with nvmlInit()
  43   NVML_ERROR_INVALID_ARGUMENT = 2,    // A supplied argument is invalid
  44   NVML_ERROR_NOT_SUPPORTED = 3,       // The requested operation is not available on target device
  45   NVML_ERROR_NO_PERMISSION = 4,       // The current user does not have permission for operation
  46   NVML_ERROR_ALREADY_INITIALIZED = 5, // Deprecated: Multiple initializations are now allowed through ref counting
  47   NVML_ERROR_NOT_FOUND = 6,           // A query to find an object was unsuccessful
  48   NVML_ERROR_INSUFFICIENT_SIZE = 7,   // An input argument is not large enough
  49   NVML_ERROR_INSUFFICIENT_POWER = 8,  // A device's external power cables are not properly attached
  50   NVML_ERROR_DRIVER_NOT_LOADED = 9,   // NVIDIA driver is not loaded
  51   NVML_ERROR_TIMEOUT = 10,            // User provided timeout passed
  52   NVML_ERROR_UNKNOWN = 999            // An internal driver error occurred
  53 } nvmlReturn_t;
  54
  55 typedef enum nvmlClockType_enum {
  56         NVML_CLOCK_GRAPHICS = 0,
  57         NVML_CLOCK_SM = 1,
  58         NVML_CLOCK_MEM = 2
  59 } nvmlClockType_t;
  60
  61 typedef enum nvmlTemperatureThresholds_enum
  62 {
  63     NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0,    // Temperature at which the GPU will shut down
  64                                                 // for HW protection
  65     NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1,    // Temperature at which the GPU will begin slowdown
  66     // Keep this last
  67     NVML_TEMPERATURE_THRESHOLD_COUNT
  68 } nvmlTemperatureThresholds_t;
  69
  70 /**
  71  * Compute mode.
  72  *
  73  * NVML_COMPUTEMODE_EXCLUSIVE_PROCESS was added in CUDA 4.0.
  74  * Earlier CUDA versions supported a single exclusive mode,
  75  * which is equivalent to NVML_COMPUTEMODE_EXCLUSIVE_THREAD in CUDA 4.0 and beyond.
  76  */
  77 typedef enum nvmlComputeMode_enum
  78 {
  79     NVML_COMPUTEMODE_DEFAULT           = 0,  //!< Default compute mode -- multiple contexts per device
  80     NVML_COMPUTEMODE_EXCLUSIVE_THREAD  = 1,  //!< Compute-exclusive-thread mode -- only one context per device, usable from one thread at a time
  81     NVML_COMPUTEMODE_PROHIBITED        = 2,  //!< Compute-prohibited mode -- no contexts per device
  82     NVML_COMPUTEMODE_EXCLUSIVE_PROCESS = 3,  //!< Compute-exclusive-process mode -- only one context per device, usable from multiple threads at a time
  83
  84     // Keep this last
  85     NVML_COMPUTEMODE_COUNT
  86 } nvmlComputeMode_t;
  87
  88 /**
  89  * GPU Operation Mode
  90  *
  91  * GOM allows to reduce power usage and optimize GPU throughput by disabling GPU features.
  92  *
  93  * Each GOM is designed to meet specific user needs.
  94  */
  95 typedef enum nvmlGom_enum
  96 {
  97     NVML_GOM_ALL_ON                    = 0, //!< Everything is enabled and running at full speed
  98
  99     NVML_GOM_COMPUTE                   = 1, //!< Designed for running only compute tasks. Graphics operations
 100                                             //!< are not allowed
 101
 102     NVML_GOM_LOW_DP                    = 2  //!< Designed for running graphics applications that don't require
 103                                             //!< high bandwidth double precision
 104 } nvmlGpuOperationMode_t;
 105
 106 /***************************************************************************************************/
 107 /** @addtogroup nvmlClocksThrottleReasons
 108  *  @{
 109  */
 110 /***************************************************************************************************/
 111
 112 /** Nothing is running on the GPU and the clocks are dropping to Idle state
 113  * \note This limiter may be removed in a later release
 114  */
 115 #define nvmlClocksThrottleReasonGpuIdle                   0x0000000000000001LL
 116
 117 /** GPU clocks are limited by current setting of applications clocks
 118  *
 119  * @see nvmlDeviceSetApplicationsClocks
 120  * @see nvmlDeviceGetApplicationsClock
 121  */
 122 #define nvmlClocksThrottleReasonApplicationsClocksSetting   0x0000000000000002LL
 123
 124 /**
 125  * @deprecated Renamed to \ref nvmlClocksThrottleReasonApplicationsClocksSetting
 126  *             as the name describes the situation more accurately.
 127  */
 128 #define nvmlClocksThrottleReasonUserDefinedClocks         nvmlClocksThrottleReasonApplicationsClocksSetting
 129
 130 /** SW Power Scaling algorithm is reducing the clocks below requested clocks
 131  *
 132  * @see nvmlDeviceGetPowerUsage
 133  * @see nvmlDeviceSetPowerManagementLimit
 134  * @see nvmlDeviceGetPowerManagementLimit
 135  */
 136 #define nvmlClocksThrottleReasonSwPowerCap                0x0000000000000004LL
 137
 138 /** HW Slowdown (reducing the core clocks by a factor of 2 or more) is engaged
 139  *
 140  * This is an indicator of:
 141  *   - temperature being too high
 142  *   - External Power Brake Assertion is triggered (e.g. by the system power supply)
 143  *   - Power draw is too high and Fast Trigger protection is reducing the clocks
 144  *   - May be also reported during PState or clock change
 145  *      - This behavior may be removed in a later release.
 146  *
 147  * @see nvmlDeviceGetTemperature
 148  * @see nvmlDeviceGetTemperatureThreshold
 149  * @see nvmlDeviceGetPowerUsage
 150  */
 151 #define nvmlClocksThrottleReasonHwSlowdown                0x0000000000000008LL
 152
 153 /** Some other unspecified factor is reducing the clocks */
 154 #define nvmlClocksThrottleReasonUnknown                   0x8000000000000000LL
 155
 156 /** Bit mask representing no clocks throttling
 157  *
 158  * Clocks are as high as possible.
 159  * */
 160 #define nvmlClocksThrottleReasonNone                      0x0000000000000000LL
 161
 162
 163 /*
 164  * End of declarations from nvml.h
 165  **/
 166
 167 typedef nvmlDevice_t HM_ADAPTER_NVML;
 168
 169 #include <shared.h>
 170
 171 #if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
 172 #define NVML_API_CALL __stdcall
 173 #else
 174 #define NVML_API_CALL
 175 #endif
 176
 177 typedef const char * (*NVML_API_CALL NVML_ERROR_STRING) (nvmlReturn_t);
 178 typedef int (*NVML_API_CALL NVML_INIT) (void);
 179 typedef int (*NVML_API_CALL NVML_SHUTDOWN) (void);
 180 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_NAME) (nvmlDevice_t, char *, unsigned int);
 181 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_HANDLE_BY_INDEX) (unsigned int, nvmlDevice_t *);
 182 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_TEMPERATURE) (nvmlDevice_t, nvmlTemperatureSensors_t, unsigned int *);
 183 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_FAN_SPEED) (nvmlDevice_t, unsigned int *);
 184 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWER_USAGE) (nvmlDevice_t, unsigned int *);
 185 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_UTILIZATION_RATES) (nvmlDevice_t, nvmlUtilization_t *);
 186 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CLOCKINFO) (nvmlDevice_t, nvmlClockType_t, unsigned int *);
 187 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_THRESHOLD) (nvmlDevice_t, nvmlTemperatureThresholds_t, unsigned int *);
 188 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRPCIELINKGENERATION) (nvmlDevice_t, unsigned int *);
 189 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRPCIELINKWIDTH) (nvmlDevice_t, unsigned int *);
 190 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *);
 191 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *);
 192 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_COMPUTEMODE) (nvmlDevice_t, nvmlComputeMode_t);
 193 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_OPERATIONMODE) (nvmlDevice_t, nvmlGpuOperationMode_t);
 194 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS) (nvmlDevice_t, unsigned int *, unsigned int *);
 195 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int);
 196 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int *);
 197
 198 typedef struct
 199 {
 200   NVML_LIB lib;
 201
 202   NVML_ERROR_STRING nvmlErrorString;
 203   NVML_INIT nvmlInit;
 204   NVML_SHUTDOWN nvmlShutdown;
 205   NVML_DEVICE_GET_NAME nvmlDeviceGetName;
 206   NVML_DEVICE_GET_HANDLE_BY_INDEX nvmlDeviceGetHandleByIndex;
 207   NVML_DEVICE_GET_TEMPERATURE nvmlDeviceGetTemperature;
 208   NVML_DEVICE_GET_FAN_SPEED nvmlDeviceGetFanSpeed;
 209   NVML_DEVICE_GET_POWER_USAGE nvmlDeviceGetPowerUsage;
 210   NVML_DEVICE_GET_UTILIZATION_RATES nvmlDeviceGetUtilizationRates;
 211   NVML_DEVICE_GET_CLOCKINFO nvmlDeviceGetClockInfo;
 212   NVML_DEVICE_GET_THRESHOLD nvmlDeviceGetTemperatureThreshold;
 213   NVML_DEVICE_GET_CURRPCIELINKGENERATION nvmlDeviceGetCurrPcieLinkGeneration;
 214   NVML_DEVICE_GET_CURRPCIELINKWIDTH nvmlDeviceGetCurrPcieLinkWidth;
 215   NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS nvmlDeviceGetCurrentClocksThrottleReasons;
 216   NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS nvmlDeviceGetSupportedClocksThrottleReasons;
 217   NVML_DEVICE_SET_COMPUTEMODE nvmlDeviceSetComputeMode;
 218   NVML_DEVICE_SET_OPERATIONMODE nvmlDeviceSetGpuOperationMode;
 219   NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS nvmlDeviceGetPowerManagementLimitConstraints;
 220   NVML_DEVICE_SET_POWERMANAGEMENTLIMIT nvmlDeviceSetPowerManagementLimit;
 221   NVML_DEVICE_GET_POWERMANAGEMENTLIMIT nvmlDeviceGetPowerManagementLimit;
 222
 223 } hm_nvml_lib_t;
 224
 225 #define NVML_PTR hm_nvml_lib_t
 226
 227 int nvml_init (NVML_PTR *lib);
 228 void nvml_close (NVML_PTR *lib);
 229
 230 const char * hm_NVML_nvmlErrorString (NVML_PTR *nvml, nvmlReturn_t nvml_rc);
 231 nvmlReturn_t hm_NVML_nvmlInit (NVML_PTR *nvml);
 232 nvmlReturn_t hm_NVML_nvmlShutdown (NVML_PTR *nvml);
 233 nvmlReturn_t hm_NVML_nvmlDeviceGetName (NVML_PTR *nvml, int, nvmlDevice_t device, char *name, unsigned int length);
 234 nvmlReturn_t hm_NVML_nvmlDeviceGetHandleByIndex (NVML_PTR *nvml, int, unsigned int index, nvmlDevice_t *device);
 235 nvmlReturn_t hm_NVML_nvmlDeviceGetTemperature (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp);
 236 nvmlReturn_t hm_NVML_nvmlDeviceGetFanSpeed (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *speed);
 237 nvmlReturn_t hm_NVML_nvmlDeviceGetPowerUsage (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *power);
 238 nvmlReturn_t hm_NVML_nvmlDeviceGetUtilizationRates (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlUtilization_t *utilization);
 239 nvmlReturn_t hm_NVML_nvmlDeviceGetClockInfo (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clock);
 240 nvmlReturn_t hm_NVML_nvmlDeviceGetTemperatureThreshold (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp);
 241 nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkGeneration (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *currLinkGen);
 242 nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *currLinkWidth);
 243 nvmlReturn_t hm_NVML_nvmlDeviceGetCurrentClocksThrottleReasons (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned long long *clocksThrottleReasons);
 244 nvmlReturn_t hm_NVML_nvmlDeviceGetSupportedClocksThrottleReasons (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned long long *supportedClocksThrottleReasons);
 245 nvmlReturn_t hm_NVML_nvmlDeviceSetComputeMode (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlComputeMode_t mode);
 246 nvmlReturn_t hm_NVML_nvmlDeviceSetGpuOperationMode (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlGpuOperationMode_t mode);
 247 nvmlReturn_t hm_NVML_nvmlDeviceGetPowerManagementLimitConstraints (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *minLimit, unsigned int *maxLimit);
 248 nvmlReturn_t hm_NVML_nvmlDeviceSetPowerManagementLimit (NVML_PTR *nvml, int skip_warnings, nvmlDevice_t device, unsigned int limit);
 249 nvmlReturn_t hm_NVML_nvmlDeviceGetPowerManagementLimit (NVML_PTR *nvml, int skip_warnings, nvmlDevice_t device, unsigned int *limit);
 250
 251 #endif // HAVE_HWMON
 252
 253 #endif // EXT_NVML_H