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[hashcat.git] / amd / common_amd.c
1 /**
2 * Author......: Jens Steube <jens.steube@gmail.com>
3 * License.....: MIT
4 */
5
6 static int device_memcmp (const u32 d1[4], __global u32 *d2)
7 {
8 if (d1[3] > d2[DGST_R3]) return ( 1);
9 if (d1[3] < d2[DGST_R3]) return (-1);
10 if (d1[2] > d2[DGST_R2]) return ( 1);
11 if (d1[2] < d2[DGST_R2]) return (-1);
12 if (d1[1] > d2[DGST_R1]) return ( 1);
13 if (d1[1] < d2[DGST_R1]) return (-1);
14 if (d1[0] > d2[DGST_R0]) return ( 1);
15 if (d1[0] < d2[DGST_R0]) return (-1);
16
17 return (0);
18 }
19
20 static int find_hash (const u32 digest[4], const u32 digests_cnt, __global digest_t *digests_buf)
21 {
22 for (u32 l = 0, r = digests_cnt; r; r >>= 1)
23 {
24 const u32 m = r >> 1;
25
26 const u32 c = l + m;
27
28 const int cmp = device_memcmp (digest, digests_buf[c].digest_buf);
29
30 if (cmp > 0)
31 {
32 l += m + 1;
33
34 r--;
35 }
36
37 if (cmp == 0) return (c);
38 }
39
40 return (-1);
41 }
42
43 static u32 check_bitmap (__global u32 *bitmap, const u32 bitmap_mask, const u32 bitmap_shift, const u32 digest)
44 {
45 return (bitmap[(digest >> bitmap_shift) & bitmap_mask] & (1 << (digest & 0x1f)));
46 }
47
48 static u32 check (const u32 digest[2], __global u32 *bitmap_s1_a, __global u32 *bitmap_s1_b, __global u32 *bitmap_s1_c, __global u32 *bitmap_s1_d, __global u32 *bitmap_s2_a, __global u32 *bitmap_s2_b, __global u32 *bitmap_s2_c, __global u32 *bitmap_s2_d, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2)
49 {
50 if (check_bitmap (bitmap_s1_a, bitmap_mask, bitmap_shift1, digest[0]) == 0) return (0);
51 if (check_bitmap (bitmap_s1_b, bitmap_mask, bitmap_shift1, digest[1]) == 0) return (0);
52 if (check_bitmap (bitmap_s1_c, bitmap_mask, bitmap_shift1, digest[2]) == 0) return (0);
53 if (check_bitmap (bitmap_s1_d, bitmap_mask, bitmap_shift1, digest[3]) == 0) return (0);
54
55 if (check_bitmap (bitmap_s2_a, bitmap_mask, bitmap_shift2, digest[0]) == 0) return (0);
56 if (check_bitmap (bitmap_s2_b, bitmap_mask, bitmap_shift2, digest[1]) == 0) return (0);
57 if (check_bitmap (bitmap_s2_c, bitmap_mask, bitmap_shift2, digest[2]) == 0) return (0);
58 if (check_bitmap (bitmap_s2_d, bitmap_mask, bitmap_shift2, digest[3]) == 0) return (0);
59
60 return (1);
61 }
62
63 #ifdef VECT_SIZE1
64 static void mark_hash_s0 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
65 {
66 hashes_shown[hash_pos] = 1;
67
68 plains_buf[hash_pos].gidvid = (gid * 1) + 0;
69 plains_buf[hash_pos].il_pos = il_pos;
70 }
71
72 static void mark_hash_s0_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
73 {
74 hashes_shown[hash_pos] = 1;
75
76 plains_buf[hash_pos].gidvid = gid;
77 plains_buf[hash_pos].il_pos = (il_pos * 1) + 0;
78 }
79 #endif
80
81 #ifdef VECT_SIZE2
82 static void mark_hash_s0 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
83 {
84 hashes_shown[hash_pos] = 1;
85
86 plains_buf[hash_pos].gidvid = (gid * 2) + 0;
87 plains_buf[hash_pos].il_pos = il_pos;
88 }
89
90 static void mark_hash_s1 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
91 {
92 hashes_shown[hash_pos] = 1;
93
94 plains_buf[hash_pos].gidvid = (gid * 2) + 1;
95 plains_buf[hash_pos].il_pos = il_pos;
96 }
97
98 static void mark_hash_s0_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
99 {
100 hashes_shown[hash_pos] = 1;
101
102 plains_buf[hash_pos].gidvid = gid;
103 plains_buf[hash_pos].il_pos = (il_pos * 2) + 0;
104 }
105
106 static void mark_hash_s1_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
107 {
108 hashes_shown[hash_pos] = 1;
109
110 plains_buf[hash_pos].gidvid = gid;
111 plains_buf[hash_pos].il_pos = (il_pos * 2) + 1;
112 }
113 #endif
114
115 #ifdef VECT_SIZE4
116 static void mark_hash_s0 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
117 {
118 hashes_shown[hash_pos] = 1;
119
120 plains_buf[hash_pos].gidvid = (gid * 4) + 0;
121 plains_buf[hash_pos].il_pos = il_pos;
122 }
123
124 static void mark_hash_s1 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
125 {
126 hashes_shown[hash_pos] = 1;
127
128 plains_buf[hash_pos].gidvid = (gid * 4) + 1;
129 plains_buf[hash_pos].il_pos = il_pos;
130 }
131
132 static void mark_hash_s2 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
133 {
134 hashes_shown[hash_pos] = 1;
135
136 plains_buf[hash_pos].gidvid = (gid * 4) + 2;
137 plains_buf[hash_pos].il_pos = il_pos;
138 }
139
140 static void mark_hash_s3 (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
141 {
142 hashes_shown[hash_pos] = 1;
143
144 plains_buf[hash_pos].gidvid = (gid * 4) + 3;
145 plains_buf[hash_pos].il_pos = il_pos;
146 }
147
148 static void mark_hash_s0_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
149 {
150 hashes_shown[hash_pos] = 1;
151
152 plains_buf[hash_pos].gidvid = gid;
153 plains_buf[hash_pos].il_pos = (il_pos * 4) + 0;
154 }
155
156 static void mark_hash_s1_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
157 {
158 hashes_shown[hash_pos] = 1;
159
160 plains_buf[hash_pos].gidvid = gid;
161 plains_buf[hash_pos].il_pos = (il_pos * 4) + 1;
162 }
163
164 static void mark_hash_s2_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
165 {
166 hashes_shown[hash_pos] = 1;
167
168 plains_buf[hash_pos].gidvid = gid;
169 plains_buf[hash_pos].il_pos = (il_pos * 4) + 2;
170 }
171
172 static void mark_hash_s3_warp (__global plain_t *plains_buf, __global u32 *hashes_shown, const int hash_pos, const u32 gid, const u32 il_pos)
173 {
174 hashes_shown[hash_pos] = 1;
175
176 plains_buf[hash_pos].gidvid = gid;
177 plains_buf[hash_pos].il_pos = (il_pos * 4) + 3;
178 }
179 #endif
180
181 /**
182 * scalar
183 */
184
185 static u32 swap_workaround (const u32 v)
186 {
187 return (as_uint (as_uchar4 (v).s3210));
188 }
189
190 static u64 swap_workaround (const u64 v)
191 {
192 return (as_ulong (as_uchar8 (v).s76543210));
193 }
194
195 static void truncate_block (u32 w[4], const u32 len)
196 {
197 switch (len)
198 {
199 case 0: w[0] &= 0;
200 w[1] &= 0;
201 w[2] &= 0;
202 w[3] &= 0;
203 break;
204 case 1: w[0] &= 0x000000FF;
205 w[1] &= 0;
206 w[2] &= 0;
207 w[3] &= 0;
208 break;
209 case 2: w[0] &= 0x0000FFFF;
210 w[1] &= 0;
211 w[2] &= 0;
212 w[3] &= 0;
213 break;
214 case 3: w[0] &= 0x00FFFFFF;
215 w[1] &= 0;
216 w[2] &= 0;
217 w[3] &= 0;
218 break;
219 case 4: w[1] &= 0;
220 w[2] &= 0;
221 w[3] &= 0;
222 break;
223 case 5: w[1] &= 0x000000FF;
224 w[2] &= 0;
225 w[3] &= 0;
226 break;
227 case 6: w[1] &= 0x0000FFFF;
228 w[2] &= 0;
229 w[3] &= 0;
230 break;
231 case 7: w[1] &= 0x00FFFFFF;
232 w[2] &= 0;
233 w[3] &= 0;
234 break;
235 case 8: w[2] &= 0;
236 w[3] &= 0;
237 break;
238 case 9: w[2] &= 0x000000FF;
239 w[3] &= 0;
240 break;
241 case 10: w[2] &= 0x0000FFFF;
242 w[3] &= 0;
243 break;
244 case 11: w[2] &= 0x00FFFFFF;
245 w[3] &= 0;
246 break;
247 case 12: w[3] &= 0;
248 break;
249 case 13: w[3] &= 0x000000FF;
250 break;
251 case 14: w[3] &= 0x0000FFFF;
252 break;
253 case 15: w[3] &= 0x00FFFFFF;
254 break;
255 }
256 }
257
258 static void make_unicode (const u32 in[4], u32 out1[4], u32 out2[4])
259 {
260 out2[3] = ((in[3] >> 8) & 0x00FF0000) | ((in[3] >> 16) & 0x000000FF);
261 out2[2] = ((in[3] << 8) & 0x00FF0000) | ((in[3] >> 0) & 0x000000FF);
262 out2[1] = ((in[2] >> 8) & 0x00FF0000) | ((in[2] >> 16) & 0x000000FF);
263 out2[0] = ((in[2] << 8) & 0x00FF0000) | ((in[2] >> 0) & 0x000000FF);
264 out1[3] = ((in[1] >> 8) & 0x00FF0000) | ((in[1] >> 16) & 0x000000FF);
265 out1[2] = ((in[1] << 8) & 0x00FF0000) | ((in[1] >> 0) & 0x000000FF);
266 out1[1] = ((in[0] >> 8) & 0x00FF0000) | ((in[0] >> 16) & 0x000000FF);
267 out1[0] = ((in[0] << 8) & 0x00FF0000) | ((in[0] >> 0) & 0x000000FF);
268 }
269
270 static void undo_unicode (const u32 in1[4], const u32 in2[4], u32 out[4])
271 {
272 out[0] = ((in1[0] & 0x000000ff) >> 0) | ((in1[0] & 0x00ff0000) >> 8)
273 | ((in1[1] & 0x000000ff) << 16) | ((in1[1] & 0x00ff0000) << 8);
274 out[1] = ((in1[2] & 0x000000ff) >> 0) | ((in1[2] & 0x00ff0000) >> 8)
275 | ((in1[3] & 0x000000ff) << 16) | ((in1[3] & 0x00ff0000) << 8);
276 out[2] = ((in2[0] & 0x000000ff) >> 0) | ((in2[0] & 0x00ff0000) >> 8)
277 | ((in2[1] & 0x000000ff) << 16) | ((in2[1] & 0x00ff0000) << 8);
278 out[3] = ((in2[2] & 0x000000ff) >> 0) | ((in2[2] & 0x00ff0000) >> 8)
279 | ((in2[3] & 0x000000ff) << 16) | ((in2[3] & 0x00ff0000) << 8);
280 }
281
282 static void append_0x01_1 (u32 w0[4], const u32 offset)
283 {
284 switch (offset)
285 {
286 case 0:
287 w0[0] = 0x01;
288 break;
289
290 case 1:
291 w0[0] = w0[0] | 0x0100;
292 break;
293
294 case 2:
295 w0[0] = w0[0] | 0x010000;
296 break;
297
298 case 3:
299 w0[0] = w0[0] | 0x01000000;
300 break;
301
302 case 4:
303 w0[1] = 0x01;
304 break;
305
306 case 5:
307 w0[1] = w0[1] | 0x0100;
308 break;
309
310 case 6:
311 w0[1] = w0[1] | 0x010000;
312 break;
313
314 case 7:
315 w0[1] = w0[1] | 0x01000000;
316 break;
317
318 case 8:
319 w0[2] = 0x01;
320 break;
321
322 case 9:
323 w0[2] = w0[2] | 0x0100;
324 break;
325
326 case 10:
327 w0[2] = w0[2] | 0x010000;
328 break;
329
330 case 11:
331 w0[2] = w0[2] | 0x01000000;
332 break;
333
334 case 12:
335 w0[3] = 0x01;
336 break;
337
338 case 13:
339 w0[3] = w0[3] | 0x0100;
340 break;
341
342 case 14:
343 w0[3] = w0[3] | 0x010000;
344 break;
345
346 case 15:
347 w0[3] = w0[3] | 0x01000000;
348 break;
349 }
350 }
351
352 static void append_0x01_2 (u32 w0[4], u32 w1[4], const u32 offset)
353 {
354 switch (offset)
355 {
356 case 0:
357 w0[0] = 0x01;
358 break;
359
360 case 1:
361 w0[0] = w0[0] | 0x0100;
362 break;
363
364 case 2:
365 w0[0] = w0[0] | 0x010000;
366 break;
367
368 case 3:
369 w0[0] = w0[0] | 0x01000000;
370 break;
371
372 case 4:
373 w0[1] = 0x01;
374 break;
375
376 case 5:
377 w0[1] = w0[1] | 0x0100;
378 break;
379
380 case 6:
381 w0[1] = w0[1] | 0x010000;
382 break;
383
384 case 7:
385 w0[1] = w0[1] | 0x01000000;
386 break;
387
388 case 8:
389 w0[2] = 0x01;
390 break;
391
392 case 9:
393 w0[2] = w0[2] | 0x0100;
394 break;
395
396 case 10:
397 w0[2] = w0[2] | 0x010000;
398 break;
399
400 case 11:
401 w0[2] = w0[2] | 0x01000000;
402 break;
403
404 case 12:
405 w0[3] = 0x01;
406 break;
407
408 case 13:
409 w0[3] = w0[3] | 0x0100;
410 break;
411
412 case 14:
413 w0[3] = w0[3] | 0x010000;
414 break;
415
416 case 15:
417 w0[3] = w0[3] | 0x01000000;
418 break;
419
420 case 16:
421 w1[0] = 0x01;
422 break;
423
424 case 17:
425 w1[0] = w1[0] | 0x0100;
426 break;
427
428 case 18:
429 w1[0] = w1[0] | 0x010000;
430 break;
431
432 case 19:
433 w1[0] = w1[0] | 0x01000000;
434 break;
435
436 case 20:
437 w1[1] = 0x01;
438 break;
439
440 case 21:
441 w1[1] = w1[1] | 0x0100;
442 break;
443
444 case 22:
445 w1[1] = w1[1] | 0x010000;
446 break;
447
448 case 23:
449 w1[1] = w1[1] | 0x01000000;
450 break;
451
452 case 24:
453 w1[2] = 0x01;
454 break;
455
456 case 25:
457 w1[2] = w1[2] | 0x0100;
458 break;
459
460 case 26:
461 w1[2] = w1[2] | 0x010000;
462 break;
463
464 case 27:
465 w1[2] = w1[2] | 0x01000000;
466 break;
467
468 case 28:
469 w1[3] = 0x01;
470 break;
471
472 case 29:
473 w1[3] = w1[3] | 0x0100;
474 break;
475
476 case 30:
477 w1[3] = w1[3] | 0x010000;
478 break;
479
480 case 31:
481 w1[3] = w1[3] | 0x01000000;
482 break;
483 }
484 }
485
486 static void append_0x01_3 (u32 w0[4], u32 w1[4], u32 w2[4], const u32 offset)
487 {
488 switch (offset)
489 {
490 case 0:
491 w0[0] = 0x01;
492 break;
493
494 case 1:
495 w0[0] = w0[0] | 0x0100;
496 break;
497
498 case 2:
499 w0[0] = w0[0] | 0x010000;
500 break;
501
502 case 3:
503 w0[0] = w0[0] | 0x01000000;
504 break;
505
506 case 4:
507 w0[1] = 0x01;
508 break;
509
510 case 5:
511 w0[1] = w0[1] | 0x0100;
512 break;
513
514 case 6:
515 w0[1] = w0[1] | 0x010000;
516 break;
517
518 case 7:
519 w0[1] = w0[1] | 0x01000000;
520 break;
521
522 case 8:
523 w0[2] = 0x01;
524 break;
525
526 case 9:
527 w0[2] = w0[2] | 0x0100;
528 break;
529
530 case 10:
531 w0[2] = w0[2] | 0x010000;
532 break;
533
534 case 11:
535 w0[2] = w0[2] | 0x01000000;
536 break;
537
538 case 12:
539 w0[3] = 0x01;
540 break;
541
542 case 13:
543 w0[3] = w0[3] | 0x0100;
544 break;
545
546 case 14:
547 w0[3] = w0[3] | 0x010000;
548 break;
549
550 case 15:
551 w0[3] = w0[3] | 0x01000000;
552 break;
553
554 case 16:
555 w1[0] = 0x01;
556 break;
557
558 case 17:
559 w1[0] = w1[0] | 0x0100;
560 break;
561
562 case 18:
563 w1[0] = w1[0] | 0x010000;
564 break;
565
566 case 19:
567 w1[0] = w1[0] | 0x01000000;
568 break;
569
570 case 20:
571 w1[1] = 0x01;
572 break;
573
574 case 21:
575 w1[1] = w1[1] | 0x0100;
576 break;
577
578 case 22:
579 w1[1] = w1[1] | 0x010000;
580 break;
581
582 case 23:
583 w1[1] = w1[1] | 0x01000000;
584 break;
585
586 case 24:
587 w1[2] = 0x01;
588 break;
589
590 case 25:
591 w1[2] = w1[2] | 0x0100;
592 break;
593
594 case 26:
595 w1[2] = w1[2] | 0x010000;
596 break;
597
598 case 27:
599 w1[2] = w1[2] | 0x01000000;
600 break;
601
602 case 28:
603 w1[3] = 0x01;
604 break;
605
606 case 29:
607 w1[3] = w1[3] | 0x0100;
608 break;
609
610 case 30:
611 w1[3] = w1[3] | 0x010000;
612 break;
613
614 case 31:
615 w1[3] = w1[3] | 0x01000000;
616 break;
617
618 case 32:
619 w2[0] = 0x01;
620 break;
621
622 case 33:
623 w2[0] = w2[0] | 0x0100;
624 break;
625
626 case 34:
627 w2[0] = w2[0] | 0x010000;
628 break;
629
630 case 35:
631 w2[0] = w2[0] | 0x01000000;
632 break;
633
634 case 36:
635 w2[1] = 0x01;
636 break;
637
638 case 37:
639 w2[1] = w2[1] | 0x0100;
640 break;
641
642 case 38:
643 w2[1] = w2[1] | 0x010000;
644 break;
645
646 case 39:
647 w2[1] = w2[1] | 0x01000000;
648 break;
649
650 case 40:
651 w2[2] = 0x01;
652 break;
653
654 case 41:
655 w2[2] = w2[2] | 0x0100;
656 break;
657
658 case 42:
659 w2[2] = w2[2] | 0x010000;
660 break;
661
662 case 43:
663 w2[2] = w2[2] | 0x01000000;
664 break;
665
666 case 44:
667 w2[3] = 0x01;
668 break;
669
670 case 45:
671 w2[3] = w2[3] | 0x0100;
672 break;
673
674 case 46:
675 w2[3] = w2[3] | 0x010000;
676 break;
677
678 case 47:
679 w2[3] = w2[3] | 0x01000000;
680 break;
681 }
682 }
683
684 static void append_0x01_4 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 offset)
685 {
686 switch (offset)
687 {
688 case 0:
689 w0[0] = 0x01;
690 break;
691
692 case 1:
693 w0[0] = w0[0] | 0x0100;
694 break;
695
696 case 2:
697 w0[0] = w0[0] | 0x010000;
698 break;
699
700 case 3:
701 w0[0] = w0[0] | 0x01000000;
702 break;
703
704 case 4:
705 w0[1] = 0x01;
706 break;
707
708 case 5:
709 w0[1] = w0[1] | 0x0100;
710 break;
711
712 case 6:
713 w0[1] = w0[1] | 0x010000;
714 break;
715
716 case 7:
717 w0[1] = w0[1] | 0x01000000;
718 break;
719
720 case 8:
721 w0[2] = 0x01;
722 break;
723
724 case 9:
725 w0[2] = w0[2] | 0x0100;
726 break;
727
728 case 10:
729 w0[2] = w0[2] | 0x010000;
730 break;
731
732 case 11:
733 w0[2] = w0[2] | 0x01000000;
734 break;
735
736 case 12:
737 w0[3] = 0x01;
738 break;
739
740 case 13:
741 w0[3] = w0[3] | 0x0100;
742 break;
743
744 case 14:
745 w0[3] = w0[3] | 0x010000;
746 break;
747
748 case 15:
749 w0[3] = w0[3] | 0x01000000;
750 break;
751
752 case 16:
753 w1[0] = 0x01;
754 break;
755
756 case 17:
757 w1[0] = w1[0] | 0x0100;
758 break;
759
760 case 18:
761 w1[0] = w1[0] | 0x010000;
762 break;
763
764 case 19:
765 w1[0] = w1[0] | 0x01000000;
766 break;
767
768 case 20:
769 w1[1] = 0x01;
770 break;
771
772 case 21:
773 w1[1] = w1[1] | 0x0100;
774 break;
775
776 case 22:
777 w1[1] = w1[1] | 0x010000;
778 break;
779
780 case 23:
781 w1[1] = w1[1] | 0x01000000;
782 break;
783
784 case 24:
785 w1[2] = 0x01;
786 break;
787
788 case 25:
789 w1[2] = w1[2] | 0x0100;
790 break;
791
792 case 26:
793 w1[2] = w1[2] | 0x010000;
794 break;
795
796 case 27:
797 w1[2] = w1[2] | 0x01000000;
798 break;
799
800 case 28:
801 w1[3] = 0x01;
802 break;
803
804 case 29:
805 w1[3] = w1[3] | 0x0100;
806 break;
807
808 case 30:
809 w1[3] = w1[3] | 0x010000;
810 break;
811
812 case 31:
813 w1[3] = w1[3] | 0x01000000;
814 break;
815
816 case 32:
817 w2[0] = 0x01;
818 break;
819
820 case 33:
821 w2[0] = w2[0] | 0x0100;
822 break;
823
824 case 34:
825 w2[0] = w2[0] | 0x010000;
826 break;
827
828 case 35:
829 w2[0] = w2[0] | 0x01000000;
830 break;
831
832 case 36:
833 w2[1] = 0x01;
834 break;
835
836 case 37:
837 w2[1] = w2[1] | 0x0100;
838 break;
839
840 case 38:
841 w2[1] = w2[1] | 0x010000;
842 break;
843
844 case 39:
845 w2[1] = w2[1] | 0x01000000;
846 break;
847
848 case 40:
849 w2[2] = 0x01;
850 break;
851
852 case 41:
853 w2[2] = w2[2] | 0x0100;
854 break;
855
856 case 42:
857 w2[2] = w2[2] | 0x010000;
858 break;
859
860 case 43:
861 w2[2] = w2[2] | 0x01000000;
862 break;
863
864 case 44:
865 w2[3] = 0x01;
866 break;
867
868 case 45:
869 w2[3] = w2[3] | 0x0100;
870 break;
871
872 case 46:
873 w2[3] = w2[3] | 0x010000;
874 break;
875
876 case 47:
877 w2[3] = w2[3] | 0x01000000;
878 break;
879
880 case 48:
881 w3[0] = 0x01;
882 break;
883
884 case 49:
885 w3[0] = w3[0] | 0x0100;
886 break;
887
888 case 50:
889 w3[0] = w3[0] | 0x010000;
890 break;
891
892 case 51:
893 w3[0] = w3[0] | 0x01000000;
894 break;
895
896 case 52:
897 w3[1] = 0x01;
898 break;
899
900 case 53:
901 w3[1] = w3[1] | 0x0100;
902 break;
903
904 case 54:
905 w3[1] = w3[1] | 0x010000;
906 break;
907
908 case 55:
909 w3[1] = w3[1] | 0x01000000;
910 break;
911
912 case 56:
913 w3[2] = 0x01;
914 break;
915
916 case 57:
917 w3[2] = w3[2] | 0x0100;
918 break;
919
920 case 58:
921 w3[2] = w3[2] | 0x010000;
922 break;
923
924 case 59:
925 w3[2] = w3[2] | 0x01000000;
926 break;
927
928 case 60:
929 w3[3] = 0x01;
930 break;
931
932 case 61:
933 w3[3] = w3[3] | 0x0100;
934 break;
935
936 case 62:
937 w3[3] = w3[3] | 0x010000;
938 break;
939
940 case 63:
941 w3[3] = w3[3] | 0x01000000;
942 break;
943 }
944 }
945
946 static void append_0x01_8 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], u32 w4[4], u32 w5[4], u32 w6[4], u32 w7[4], const u32 offset)
947 {
948 switch (offset)
949 {
950 case 0:
951 w0[0] = 0x01;
952 break;
953
954 case 1:
955 w0[0] = w0[0] | 0x0100;
956 break;
957
958 case 2:
959 w0[0] = w0[0] | 0x010000;
960 break;
961
962 case 3:
963 w0[0] = w0[0] | 0x01000000;
964 break;
965
966 case 4:
967 w0[1] = 0x01;
968 break;
969
970 case 5:
971 w0[1] = w0[1] | 0x0100;
972 break;
973
974 case 6:
975 w0[1] = w0[1] | 0x010000;
976 break;
977
978 case 7:
979 w0[1] = w0[1] | 0x01000000;
980 break;
981
982 case 8:
983 w0[2] = 0x01;
984 break;
985
986 case 9:
987 w0[2] = w0[2] | 0x0100;
988 break;
989
990 case 10:
991 w0[2] = w0[2] | 0x010000;
992 break;
993
994 case 11:
995 w0[2] = w0[2] | 0x01000000;
996 break;
997
998 case 12:
999 w0[3] = 0x01;
1000 break;
1001
1002 case 13:
1003 w0[3] = w0[3] | 0x0100;
1004 break;
1005
1006 case 14:
1007 w0[3] = w0[3] | 0x010000;
1008 break;
1009
1010 case 15:
1011 w0[3] = w0[3] | 0x01000000;
1012 break;
1013
1014 case 16:
1015 w1[0] = 0x01;
1016 break;
1017
1018 case 17:
1019 w1[0] = w1[0] | 0x0100;
1020 break;
1021
1022 case 18:
1023 w1[0] = w1[0] | 0x010000;
1024 break;
1025
1026 case 19:
1027 w1[0] = w1[0] | 0x01000000;
1028 break;
1029
1030 case 20:
1031 w1[1] = 0x01;
1032 break;
1033
1034 case 21:
1035 w1[1] = w1[1] | 0x0100;
1036 break;
1037
1038 case 22:
1039 w1[1] = w1[1] | 0x010000;
1040 break;
1041
1042 case 23:
1043 w1[1] = w1[1] | 0x01000000;
1044 break;
1045
1046 case 24:
1047 w1[2] = 0x01;
1048 break;
1049
1050 case 25:
1051 w1[2] = w1[2] | 0x0100;
1052 break;
1053
1054 case 26:
1055 w1[2] = w1[2] | 0x010000;
1056 break;
1057
1058 case 27:
1059 w1[2] = w1[2] | 0x01000000;
1060 break;
1061
1062 case 28:
1063 w1[3] = 0x01;
1064 break;
1065
1066 case 29:
1067 w1[3] = w1[3] | 0x0100;
1068 break;
1069
1070 case 30:
1071 w1[3] = w1[3] | 0x010000;
1072 break;
1073
1074 case 31:
1075 w1[3] = w1[3] | 0x01000000;
1076 break;
1077
1078 case 32:
1079 w2[0] = 0x01;
1080 break;
1081
1082 case 33:
1083 w2[0] = w2[0] | 0x0100;
1084 break;
1085
1086 case 34:
1087 w2[0] = w2[0] | 0x010000;
1088 break;
1089
1090 case 35:
1091 w2[0] = w2[0] | 0x01000000;
1092 break;
1093
1094 case 36:
1095 w2[1] = 0x01;
1096 break;
1097
1098 case 37:
1099 w2[1] = w2[1] | 0x0100;
1100 break;
1101
1102 case 38:
1103 w2[1] = w2[1] | 0x010000;
1104 break;
1105
1106 case 39:
1107 w2[1] = w2[1] | 0x01000000;
1108 break;
1109
1110 case 40:
1111 w2[2] = 0x01;
1112 break;
1113
1114 case 41:
1115 w2[2] = w2[2] | 0x0100;
1116 break;
1117
1118 case 42:
1119 w2[2] = w2[2] | 0x010000;
1120 break;
1121
1122 case 43:
1123 w2[2] = w2[2] | 0x01000000;
1124 break;
1125
1126 case 44:
1127 w2[3] = 0x01;
1128 break;
1129
1130 case 45:
1131 w2[3] = w2[3] | 0x0100;
1132 break;
1133
1134 case 46:
1135 w2[3] = w2[3] | 0x010000;
1136 break;
1137
1138 case 47:
1139 w2[3] = w2[3] | 0x01000000;
1140 break;
1141
1142 case 48:
1143 w3[0] = 0x01;
1144 break;
1145
1146 case 49:
1147 w3[0] = w3[0] | 0x0100;
1148 break;
1149
1150 case 50:
1151 w3[0] = w3[0] | 0x010000;
1152 break;
1153
1154 case 51:
1155 w3[0] = w3[0] | 0x01000000;
1156 break;
1157
1158 case 52:
1159 w3[1] = 0x01;
1160 break;
1161
1162 case 53:
1163 w3[1] = w3[1] | 0x0100;
1164 break;
1165
1166 case 54:
1167 w3[1] = w3[1] | 0x010000;
1168 break;
1169
1170 case 55:
1171 w3[1] = w3[1] | 0x01000000;
1172 break;
1173
1174 case 56:
1175 w3[2] = 0x01;
1176 break;
1177
1178 case 57:
1179 w3[2] = w3[2] | 0x0100;
1180 break;
1181
1182 case 58:
1183 w3[2] = w3[2] | 0x010000;
1184 break;
1185
1186 case 59:
1187 w3[2] = w3[2] | 0x01000000;
1188 break;
1189
1190 case 60:
1191 w3[3] = 0x01;
1192 break;
1193
1194 case 61:
1195 w3[3] = w3[3] | 0x0100;
1196 break;
1197
1198 case 62:
1199 w3[3] = w3[3] | 0x010000;
1200 break;
1201
1202 case 63:
1203 w3[3] = w3[3] | 0x01000000;
1204 break;
1205
1206 case 64:
1207 w4[0] = 0x01;
1208 break;
1209
1210 case 65:
1211 w4[0] = w4[0] | 0x0100;
1212 break;
1213
1214 case 66:
1215 w4[0] = w4[0] | 0x010000;
1216 break;
1217
1218 case 67:
1219 w4[0] = w4[0] | 0x01000000;
1220 break;
1221
1222 case 68:
1223 w4[1] = 0x01;
1224 break;
1225
1226 case 69:
1227 w4[1] = w4[1] | 0x0100;
1228 break;
1229
1230 case 70:
1231 w4[1] = w4[1] | 0x010000;
1232 break;
1233
1234 case 71:
1235 w4[1] = w4[1] | 0x01000000;
1236 break;
1237
1238 case 72:
1239 w4[2] = 0x01;
1240 break;
1241
1242 case 73:
1243 w4[2] = w4[2] | 0x0100;
1244 break;
1245
1246 case 74:
1247 w4[2] = w4[2] | 0x010000;
1248 break;
1249
1250 case 75:
1251 w4[2] = w4[2] | 0x01000000;
1252 break;
1253
1254 case 76:
1255 w4[3] = 0x01;
1256 break;
1257
1258 case 77:
1259 w4[3] = w4[3] | 0x0100;
1260 break;
1261
1262 case 78:
1263 w4[3] = w4[3] | 0x010000;
1264 break;
1265
1266 case 79:
1267 w4[3] = w4[3] | 0x01000000;
1268 break;
1269
1270 case 80:
1271 w5[0] = 0x01;
1272 break;
1273
1274 case 81:
1275 w5[0] = w5[0] | 0x0100;
1276 break;
1277
1278 case 82:
1279 w5[0] = w5[0] | 0x010000;
1280 break;
1281
1282 case 83:
1283 w5[0] = w5[0] | 0x01000000;
1284 break;
1285
1286 case 84:
1287 w5[1] = 0x01;
1288 break;
1289
1290 case 85:
1291 w5[1] = w5[1] | 0x0100;
1292 break;
1293
1294 case 86:
1295 w5[1] = w5[1] | 0x010000;
1296 break;
1297
1298 case 87:
1299 w5[1] = w5[1] | 0x01000000;
1300 break;
1301
1302 case 88:
1303 w5[2] = 0x01;
1304 break;
1305
1306 case 89:
1307 w5[2] = w5[2] | 0x0100;
1308 break;
1309
1310 case 90:
1311 w5[2] = w5[2] | 0x010000;
1312 break;
1313
1314 case 91:
1315 w5[2] = w5[2] | 0x01000000;
1316 break;
1317
1318 case 92:
1319 w5[3] = 0x01;
1320 break;
1321
1322 case 93:
1323 w5[3] = w5[3] | 0x0100;
1324 break;
1325
1326 case 94:
1327 w5[3] = w5[3] | 0x010000;
1328 break;
1329
1330 case 95:
1331 w5[3] = w5[3] | 0x01000000;
1332 break;
1333
1334 case 96:
1335 w6[0] = 0x01;
1336 break;
1337
1338 case 97:
1339 w6[0] = w6[0] | 0x0100;
1340 break;
1341
1342 case 98:
1343 w6[0] = w6[0] | 0x010000;
1344 break;
1345
1346 case 99:
1347 w6[0] = w6[0] | 0x01000000;
1348 break;
1349
1350 case 100:
1351 w6[1] = 0x01;
1352 break;
1353
1354 case 101:
1355 w6[1] = w6[1] | 0x0100;
1356 break;
1357
1358 case 102:
1359 w6[1] = w6[1] | 0x010000;
1360 break;
1361
1362 case 103:
1363 w6[1] = w6[1] | 0x01000000;
1364 break;
1365
1366 case 104:
1367 w6[2] = 0x01;
1368 break;
1369
1370 case 105:
1371 w6[2] = w6[2] | 0x0100;
1372 break;
1373
1374 case 106:
1375 w6[2] = w6[2] | 0x010000;
1376 break;
1377
1378 case 107:
1379 w6[2] = w6[2] | 0x01000000;
1380 break;
1381
1382 case 108:
1383 w6[3] = 0x01;
1384 break;
1385
1386 case 109:
1387 w6[3] = w6[3] | 0x0100;
1388 break;
1389
1390 case 110:
1391 w6[3] = w6[3] | 0x010000;
1392 break;
1393
1394 case 111:
1395 w6[3] = w6[3] | 0x01000000;
1396 break;
1397
1398 case 112:
1399 w7[0] = 0x01;
1400 break;
1401
1402 case 113:
1403 w7[0] = w7[0] | 0x0100;
1404 break;
1405
1406 case 114:
1407 w7[0] = w7[0] | 0x010000;
1408 break;
1409
1410 case 115:
1411 w7[0] = w7[0] | 0x01000000;
1412 break;
1413
1414 case 116:
1415 w7[1] = 0x01;
1416 break;
1417
1418 case 117:
1419 w7[1] = w7[1] | 0x0100;
1420 break;
1421
1422 case 118:
1423 w7[1] = w7[1] | 0x010000;
1424 break;
1425
1426 case 119:
1427 w7[1] = w7[1] | 0x01000000;
1428 break;
1429
1430 case 120:
1431 w7[2] = 0x01;
1432 break;
1433
1434 case 121:
1435 w7[2] = w7[2] | 0x0100;
1436 break;
1437
1438 case 122:
1439 w7[2] = w7[2] | 0x010000;
1440 break;
1441
1442 case 123:
1443 w7[2] = w7[2] | 0x01000000;
1444 break;
1445
1446 case 124:
1447 w7[3] = 0x01;
1448 break;
1449
1450 case 125:
1451 w7[3] = w7[3] | 0x0100;
1452 break;
1453
1454 case 126:
1455 w7[3] = w7[3] | 0x010000;
1456 break;
1457
1458 case 127:
1459 w7[3] = w7[3] | 0x01000000;
1460 break;
1461 }
1462 }
1463
1464 static void append_0x02_1 (u32 w0[4], const u32 offset)
1465 {
1466 switch (offset)
1467 {
1468 case 0:
1469 w0[0] = 0x02;
1470 break;
1471
1472 case 1:
1473 w0[0] = w0[0] | 0x0200;
1474 break;
1475
1476 case 2:
1477 w0[0] = w0[0] | 0x020000;
1478 break;
1479
1480 case 3:
1481 w0[0] = w0[0] | 0x02000000;
1482 break;
1483
1484 case 4:
1485 w0[1] = 0x02;
1486 break;
1487
1488 case 5:
1489 w0[1] = w0[1] | 0x0200;
1490 break;
1491
1492 case 6:
1493 w0[1] = w0[1] | 0x020000;
1494 break;
1495
1496 case 7:
1497 w0[1] = w0[1] | 0x02000000;
1498 break;
1499
1500 case 8:
1501 w0[2] = 0x02;
1502 break;
1503
1504 case 9:
1505 w0[2] = w0[2] | 0x0200;
1506 break;
1507
1508 case 10:
1509 w0[2] = w0[2] | 0x020000;
1510 break;
1511
1512 case 11:
1513 w0[2] = w0[2] | 0x02000000;
1514 break;
1515
1516 case 12:
1517 w0[3] = 0x02;
1518 break;
1519
1520 case 13:
1521 w0[3] = w0[3] | 0x0200;
1522 break;
1523
1524 case 14:
1525 w0[3] = w0[3] | 0x020000;
1526 break;
1527
1528 case 15:
1529 w0[3] = w0[3] | 0x02000000;
1530 break;
1531 }
1532 }
1533
1534 static void append_0x02_2 (u32 w0[4], u32 w1[4], const u32 offset)
1535 {
1536 switch (offset)
1537 {
1538 case 0:
1539 w0[0] = 0x02;
1540 break;
1541
1542 case 1:
1543 w0[0] = w0[0] | 0x0200;
1544 break;
1545
1546 case 2:
1547 w0[0] = w0[0] | 0x020000;
1548 break;
1549
1550 case 3:
1551 w0[0] = w0[0] | 0x02000000;
1552 break;
1553
1554 case 4:
1555 w0[1] = 0x02;
1556 break;
1557
1558 case 5:
1559 w0[1] = w0[1] | 0x0200;
1560 break;
1561
1562 case 6:
1563 w0[1] = w0[1] | 0x020000;
1564 break;
1565
1566 case 7:
1567 w0[1] = w0[1] | 0x02000000;
1568 break;
1569
1570 case 8:
1571 w0[2] = 0x02;
1572 break;
1573
1574 case 9:
1575 w0[2] = w0[2] | 0x0200;
1576 break;
1577
1578 case 10:
1579 w0[2] = w0[2] | 0x020000;
1580 break;
1581
1582 case 11:
1583 w0[2] = w0[2] | 0x02000000;
1584 break;
1585
1586 case 12:
1587 w0[3] = 0x02;
1588 break;
1589
1590 case 13:
1591 w0[3] = w0[3] | 0x0200;
1592 break;
1593
1594 case 14:
1595 w0[3] = w0[3] | 0x020000;
1596 break;
1597
1598 case 15:
1599 w0[3] = w0[3] | 0x02000000;
1600 break;
1601
1602 case 16:
1603 w1[0] = 0x02;
1604 break;
1605
1606 case 17:
1607 w1[0] = w1[0] | 0x0200;
1608 break;
1609
1610 case 18:
1611 w1[0] = w1[0] | 0x020000;
1612 break;
1613
1614 case 19:
1615 w1[0] = w1[0] | 0x02000000;
1616 break;
1617
1618 case 20:
1619 w1[1] = 0x02;
1620 break;
1621
1622 case 21:
1623 w1[1] = w1[1] | 0x0200;
1624 break;
1625
1626 case 22:
1627 w1[1] = w1[1] | 0x020000;
1628 break;
1629
1630 case 23:
1631 w1[1] = w1[1] | 0x02000000;
1632 break;
1633
1634 case 24:
1635 w1[2] = 0x02;
1636 break;
1637
1638 case 25:
1639 w1[2] = w1[2] | 0x0200;
1640 break;
1641
1642 case 26:
1643 w1[2] = w1[2] | 0x020000;
1644 break;
1645
1646 case 27:
1647 w1[2] = w1[2] | 0x02000000;
1648 break;
1649
1650 case 28:
1651 w1[3] = 0x02;
1652 break;
1653
1654 case 29:
1655 w1[3] = w1[3] | 0x0200;
1656 break;
1657
1658 case 30:
1659 w1[3] = w1[3] | 0x020000;
1660 break;
1661
1662 case 31:
1663 w1[3] = w1[3] | 0x02000000;
1664 break;
1665 }
1666 }
1667
1668 static void append_0x02_3 (u32 w0[4], u32 w1[4], u32 w2[4], const u32 offset)
1669 {
1670 switch (offset)
1671 {
1672 case 0:
1673 w0[0] = 0x02;
1674 break;
1675
1676 case 1:
1677 w0[0] = w0[0] | 0x0200;
1678 break;
1679
1680 case 2:
1681 w0[0] = w0[0] | 0x020000;
1682 break;
1683
1684 case 3:
1685 w0[0] = w0[0] | 0x02000000;
1686 break;
1687
1688 case 4:
1689 w0[1] = 0x02;
1690 break;
1691
1692 case 5:
1693 w0[1] = w0[1] | 0x0200;
1694 break;
1695
1696 case 6:
1697 w0[1] = w0[1] | 0x020000;
1698 break;
1699
1700 case 7:
1701 w0[1] = w0[1] | 0x02000000;
1702 break;
1703
1704 case 8:
1705 w0[2] = 0x02;
1706 break;
1707
1708 case 9:
1709 w0[2] = w0[2] | 0x0200;
1710 break;
1711
1712 case 10:
1713 w0[2] = w0[2] | 0x020000;
1714 break;
1715
1716 case 11:
1717 w0[2] = w0[2] | 0x02000000;
1718 break;
1719
1720 case 12:
1721 w0[3] = 0x02;
1722 break;
1723
1724 case 13:
1725 w0[3] = w0[3] | 0x0200;
1726 break;
1727
1728 case 14:
1729 w0[3] = w0[3] | 0x020000;
1730 break;
1731
1732 case 15:
1733 w0[3] = w0[3] | 0x02000000;
1734 break;
1735
1736 case 16:
1737 w1[0] = 0x02;
1738 break;
1739
1740 case 17:
1741 w1[0] = w1[0] | 0x0200;
1742 break;
1743
1744 case 18:
1745 w1[0] = w1[0] | 0x020000;
1746 break;
1747
1748 case 19:
1749 w1[0] = w1[0] | 0x02000000;
1750 break;
1751
1752 case 20:
1753 w1[1] = 0x02;
1754 break;
1755
1756 case 21:
1757 w1[1] = w1[1] | 0x0200;
1758 break;
1759
1760 case 22:
1761 w1[1] = w1[1] | 0x020000;
1762 break;
1763
1764 case 23:
1765 w1[1] = w1[1] | 0x02000000;
1766 break;
1767
1768 case 24:
1769 w1[2] = 0x02;
1770 break;
1771
1772 case 25:
1773 w1[2] = w1[2] | 0x0200;
1774 break;
1775
1776 case 26:
1777 w1[2] = w1[2] | 0x020000;
1778 break;
1779
1780 case 27:
1781 w1[2] = w1[2] | 0x02000000;
1782 break;
1783
1784 case 28:
1785 w1[3] = 0x02;
1786 break;
1787
1788 case 29:
1789 w1[3] = w1[3] | 0x0200;
1790 break;
1791
1792 case 30:
1793 w1[3] = w1[3] | 0x020000;
1794 break;
1795
1796 case 31:
1797 w1[3] = w1[3] | 0x02000000;
1798 break;
1799
1800 case 32:
1801 w2[0] = 0x02;
1802 break;
1803
1804 case 33:
1805 w2[0] = w2[0] | 0x0200;
1806 break;
1807
1808 case 34:
1809 w2[0] = w2[0] | 0x020000;
1810 break;
1811
1812 case 35:
1813 w2[0] = w2[0] | 0x02000000;
1814 break;
1815
1816 case 36:
1817 w2[1] = 0x02;
1818 break;
1819
1820 case 37:
1821 w2[1] = w2[1] | 0x0200;
1822 break;
1823
1824 case 38:
1825 w2[1] = w2[1] | 0x020000;
1826 break;
1827
1828 case 39:
1829 w2[1] = w2[1] | 0x02000000;
1830 break;
1831
1832 case 40:
1833 w2[2] = 0x02;
1834 break;
1835
1836 case 41:
1837 w2[2] = w2[2] | 0x0200;
1838 break;
1839
1840 case 42:
1841 w2[2] = w2[2] | 0x020000;
1842 break;
1843
1844 case 43:
1845 w2[2] = w2[2] | 0x02000000;
1846 break;
1847
1848 case 44:
1849 w2[3] = 0x02;
1850 break;
1851
1852 case 45:
1853 w2[3] = w2[3] | 0x0200;
1854 break;
1855
1856 case 46:
1857 w2[3] = w2[3] | 0x020000;
1858 break;
1859
1860 case 47:
1861 w2[3] = w2[3] | 0x02000000;
1862 break;
1863 }
1864 }
1865
1866 static void append_0x02_4 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 offset)
1867 {
1868 switch (offset)
1869 {
1870 case 0:
1871 w0[0] = 0x02;
1872 break;
1873
1874 case 1:
1875 w0[0] = w0[0] | 0x0200;
1876 break;
1877
1878 case 2:
1879 w0[0] = w0[0] | 0x020000;
1880 break;
1881
1882 case 3:
1883 w0[0] = w0[0] | 0x02000000;
1884 break;
1885
1886 case 4:
1887 w0[1] = 0x02;
1888 break;
1889
1890 case 5:
1891 w0[1] = w0[1] | 0x0200;
1892 break;
1893
1894 case 6:
1895 w0[1] = w0[1] | 0x020000;
1896 break;
1897
1898 case 7:
1899 w0[1] = w0[1] | 0x02000000;
1900 break;
1901
1902 case 8:
1903 w0[2] = 0x02;
1904 break;
1905
1906 case 9:
1907 w0[2] = w0[2] | 0x0200;
1908 break;
1909
1910 case 10:
1911 w0[2] = w0[2] | 0x020000;
1912 break;
1913
1914 case 11:
1915 w0[2] = w0[2] | 0x02000000;
1916 break;
1917
1918 case 12:
1919 w0[3] = 0x02;
1920 break;
1921
1922 case 13:
1923 w0[3] = w0[3] | 0x0200;
1924 break;
1925
1926 case 14:
1927 w0[3] = w0[3] | 0x020000;
1928 break;
1929
1930 case 15:
1931 w0[3] = w0[3] | 0x02000000;
1932 break;
1933
1934 case 16:
1935 w1[0] = 0x02;
1936 break;
1937
1938 case 17:
1939 w1[0] = w1[0] | 0x0200;
1940 break;
1941
1942 case 18:
1943 w1[0] = w1[0] | 0x020000;
1944 break;
1945
1946 case 19:
1947 w1[0] = w1[0] | 0x02000000;
1948 break;
1949
1950 case 20:
1951 w1[1] = 0x02;
1952 break;
1953
1954 case 21:
1955 w1[1] = w1[1] | 0x0200;
1956 break;
1957
1958 case 22:
1959 w1[1] = w1[1] | 0x020000;
1960 break;
1961
1962 case 23:
1963 w1[1] = w1[1] | 0x02000000;
1964 break;
1965
1966 case 24:
1967 w1[2] = 0x02;
1968 break;
1969
1970 case 25:
1971 w1[2] = w1[2] | 0x0200;
1972 break;
1973
1974 case 26:
1975 w1[2] = w1[2] | 0x020000;
1976 break;
1977
1978 case 27:
1979 w1[2] = w1[2] | 0x02000000;
1980 break;
1981
1982 case 28:
1983 w1[3] = 0x02;
1984 break;
1985
1986 case 29:
1987 w1[3] = w1[3] | 0x0200;
1988 break;
1989
1990 case 30:
1991 w1[3] = w1[3] | 0x020000;
1992 break;
1993
1994 case 31:
1995 w1[3] = w1[3] | 0x02000000;
1996 break;
1997
1998 case 32:
1999 w2[0] = 0x02;
2000 break;
2001
2002 case 33:
2003 w2[0] = w2[0] | 0x0200;
2004 break;
2005
2006 case 34:
2007 w2[0] = w2[0] | 0x020000;
2008 break;
2009
2010 case 35:
2011 w2[0] = w2[0] | 0x02000000;
2012 break;
2013
2014 case 36:
2015 w2[1] = 0x02;
2016 break;
2017
2018 case 37:
2019 w2[1] = w2[1] | 0x0200;
2020 break;
2021
2022 case 38:
2023 w2[1] = w2[1] | 0x020000;
2024 break;
2025
2026 case 39:
2027 w2[1] = w2[1] | 0x02000000;
2028 break;
2029
2030 case 40:
2031 w2[2] = 0x02;
2032 break;
2033
2034 case 41:
2035 w2[2] = w2[2] | 0x0200;
2036 break;
2037
2038 case 42:
2039 w2[2] = w2[2] | 0x020000;
2040 break;
2041
2042 case 43:
2043 w2[2] = w2[2] | 0x02000000;
2044 break;
2045
2046 case 44:
2047 w2[3] = 0x02;
2048 break;
2049
2050 case 45:
2051 w2[3] = w2[3] | 0x0200;
2052 break;
2053
2054 case 46:
2055 w2[3] = w2[3] | 0x020000;
2056 break;
2057
2058 case 47:
2059 w2[3] = w2[3] | 0x02000000;
2060 break;
2061
2062 case 48:
2063 w3[0] = 0x02;
2064 break;
2065
2066 case 49:
2067 w3[0] = w3[0] | 0x0200;
2068 break;
2069
2070 case 50:
2071 w3[0] = w3[0] | 0x020000;
2072 break;
2073
2074 case 51:
2075 w3[0] = w3[0] | 0x02000000;
2076 break;
2077
2078 case 52:
2079 w3[1] = 0x02;
2080 break;
2081
2082 case 53:
2083 w3[1] = w3[1] | 0x0200;
2084 break;
2085
2086 case 54:
2087 w3[1] = w3[1] | 0x020000;
2088 break;
2089
2090 case 55:
2091 w3[1] = w3[1] | 0x02000000;
2092 break;
2093
2094 case 56:
2095 w3[2] = 0x02;
2096 break;
2097
2098 case 57:
2099 w3[2] = w3[2] | 0x0200;
2100 break;
2101
2102 case 58:
2103 w3[2] = w3[2] | 0x020000;
2104 break;
2105
2106 case 59:
2107 w3[2] = w3[2] | 0x02000000;
2108 break;
2109
2110 case 60:
2111 w3[3] = 0x02;
2112 break;
2113
2114 case 61:
2115 w3[3] = w3[3] | 0x0200;
2116 break;
2117
2118 case 62:
2119 w3[3] = w3[3] | 0x020000;
2120 break;
2121
2122 case 63:
2123 w3[3] = w3[3] | 0x02000000;
2124 break;
2125 }
2126 }
2127
2128 static void append_0x02_8 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], u32 w4[4], u32 w5[4], u32 w6[4], u32 w7[4], const u32 offset)
2129 {
2130 switch (offset)
2131 {
2132 case 0:
2133 w0[0] = 0x02;
2134 break;
2135
2136 case 1:
2137 w0[0] = w0[0] | 0x0200;
2138 break;
2139
2140 case 2:
2141 w0[0] = w0[0] | 0x020000;
2142 break;
2143
2144 case 3:
2145 w0[0] = w0[0] | 0x02000000;
2146 break;
2147
2148 case 4:
2149 w0[1] = 0x02;
2150 break;
2151
2152 case 5:
2153 w0[1] = w0[1] | 0x0200;
2154 break;
2155
2156 case 6:
2157 w0[1] = w0[1] | 0x020000;
2158 break;
2159
2160 case 7:
2161 w0[1] = w0[1] | 0x02000000;
2162 break;
2163
2164 case 8:
2165 w0[2] = 0x02;
2166 break;
2167
2168 case 9:
2169 w0[2] = w0[2] | 0x0200;
2170 break;
2171
2172 case 10:
2173 w0[2] = w0[2] | 0x020000;
2174 break;
2175
2176 case 11:
2177 w0[2] = w0[2] | 0x02000000;
2178 break;
2179
2180 case 12:
2181 w0[3] = 0x02;
2182 break;
2183
2184 case 13:
2185 w0[3] = w0[3] | 0x0200;
2186 break;
2187
2188 case 14:
2189 w0[3] = w0[3] | 0x020000;
2190 break;
2191
2192 case 15:
2193 w0[3] = w0[3] | 0x02000000;
2194 break;
2195
2196 case 16:
2197 w1[0] = 0x02;
2198 break;
2199
2200 case 17:
2201 w1[0] = w1[0] | 0x0200;
2202 break;
2203
2204 case 18:
2205 w1[0] = w1[0] | 0x020000;
2206 break;
2207
2208 case 19:
2209 w1[0] = w1[0] | 0x02000000;
2210 break;
2211
2212 case 20:
2213 w1[1] = 0x02;
2214 break;
2215
2216 case 21:
2217 w1[1] = w1[1] | 0x0200;
2218 break;
2219
2220 case 22:
2221 w1[1] = w1[1] | 0x020000;
2222 break;
2223
2224 case 23:
2225 w1[1] = w1[1] | 0x02000000;
2226 break;
2227
2228 case 24:
2229 w1[2] = 0x02;
2230 break;
2231
2232 case 25:
2233 w1[2] = w1[2] | 0x0200;
2234 break;
2235
2236 case 26:
2237 w1[2] = w1[2] | 0x020000;
2238 break;
2239
2240 case 27:
2241 w1[2] = w1[2] | 0x02000000;
2242 break;
2243
2244 case 28:
2245 w1[3] = 0x02;
2246 break;
2247
2248 case 29:
2249 w1[3] = w1[3] | 0x0200;
2250 break;
2251
2252 case 30:
2253 w1[3] = w1[3] | 0x020000;
2254 break;
2255
2256 case 31:
2257 w1[3] = w1[3] | 0x02000000;
2258 break;
2259
2260 case 32:
2261 w2[0] = 0x02;
2262 break;
2263
2264 case 33:
2265 w2[0] = w2[0] | 0x0200;
2266 break;
2267
2268 case 34:
2269 w2[0] = w2[0] | 0x020000;
2270 break;
2271
2272 case 35:
2273 w2[0] = w2[0] | 0x02000000;
2274 break;
2275
2276 case 36:
2277 w2[1] = 0x02;
2278 break;
2279
2280 case 37:
2281 w2[1] = w2[1] | 0x0200;
2282 break;
2283
2284 case 38:
2285 w2[1] = w2[1] | 0x020000;
2286 break;
2287
2288 case 39:
2289 w2[1] = w2[1] | 0x02000000;
2290 break;
2291
2292 case 40:
2293 w2[2] = 0x02;
2294 break;
2295
2296 case 41:
2297 w2[2] = w2[2] | 0x0200;
2298 break;
2299
2300 case 42:
2301 w2[2] = w2[2] | 0x020000;
2302 break;
2303
2304 case 43:
2305 w2[2] = w2[2] | 0x02000000;
2306 break;
2307
2308 case 44:
2309 w2[3] = 0x02;
2310 break;
2311
2312 case 45:
2313 w2[3] = w2[3] | 0x0200;
2314 break;
2315
2316 case 46:
2317 w2[3] = w2[3] | 0x020000;
2318 break;
2319
2320 case 47:
2321 w2[3] = w2[3] | 0x02000000;
2322 break;
2323
2324 case 48:
2325 w3[0] = 0x02;
2326 break;
2327
2328 case 49:
2329 w3[0] = w3[0] | 0x0200;
2330 break;
2331
2332 case 50:
2333 w3[0] = w3[0] | 0x020000;
2334 break;
2335
2336 case 51:
2337 w3[0] = w3[0] | 0x02000000;
2338 break;
2339
2340 case 52:
2341 w3[1] = 0x02;
2342 break;
2343
2344 case 53:
2345 w3[1] = w3[1] | 0x0200;
2346 break;
2347
2348 case 54:
2349 w3[1] = w3[1] | 0x020000;
2350 break;
2351
2352 case 55:
2353 w3[1] = w3[1] | 0x02000000;
2354 break;
2355
2356 case 56:
2357 w3[2] = 0x02;
2358 break;
2359
2360 case 57:
2361 w3[2] = w3[2] | 0x0200;
2362 break;
2363
2364 case 58:
2365 w3[2] = w3[2] | 0x020000;
2366 break;
2367
2368 case 59:
2369 w3[2] = w3[2] | 0x02000000;
2370 break;
2371
2372 case 60:
2373 w3[3] = 0x02;
2374 break;
2375
2376 case 61:
2377 w3[3] = w3[3] | 0x0200;
2378 break;
2379
2380 case 62:
2381 w3[3] = w3[3] | 0x020000;
2382 break;
2383
2384 case 63:
2385 w3[3] = w3[3] | 0x02000000;
2386 break;
2387
2388 case 64:
2389 w4[0] = 0x02;
2390 break;
2391
2392 case 65:
2393 w4[0] = w4[0] | 0x0200;
2394 break;
2395
2396 case 66:
2397 w4[0] = w4[0] | 0x020000;
2398 break;
2399
2400 case 67:
2401 w4[0] = w4[0] | 0x02000000;
2402 break;
2403
2404 case 68:
2405 w4[1] = 0x02;
2406 break;
2407
2408 case 69:
2409 w4[1] = w4[1] | 0x0200;
2410 break;
2411
2412 case 70:
2413 w4[1] = w4[1] | 0x020000;
2414 break;
2415
2416 case 71:
2417 w4[1] = w4[1] | 0x02000000;
2418 break;
2419
2420 case 72:
2421 w4[2] = 0x02;
2422 break;
2423
2424 case 73:
2425 w4[2] = w4[2] | 0x0200;
2426 break;
2427
2428 case 74:
2429 w4[2] = w4[2] | 0x020000;
2430 break;
2431
2432 case 75:
2433 w4[2] = w4[2] | 0x02000000;
2434 break;
2435
2436 case 76:
2437 w4[3] = 0x02;
2438 break;
2439
2440 case 77:
2441 w4[3] = w4[3] | 0x0200;
2442 break;
2443
2444 case 78:
2445 w4[3] = w4[3] | 0x020000;
2446 break;
2447
2448 case 79:
2449 w4[3] = w4[3] | 0x02000000;
2450 break;
2451
2452 case 80:
2453 w5[0] = 0x02;
2454 break;
2455
2456 case 81:
2457 w5[0] = w5[0] | 0x0200;
2458 break;
2459
2460 case 82:
2461 w5[0] = w5[0] | 0x020000;
2462 break;
2463
2464 case 83:
2465 w5[0] = w5[0] | 0x02000000;
2466 break;
2467
2468 case 84:
2469 w5[1] = 0x02;
2470 break;
2471
2472 case 85:
2473 w5[1] = w5[1] | 0x0200;
2474 break;
2475
2476 case 86:
2477 w5[1] = w5[1] | 0x020000;
2478 break;
2479
2480 case 87:
2481 w5[1] = w5[1] | 0x02000000;
2482 break;
2483
2484 case 88:
2485 w5[2] = 0x02;
2486 break;
2487
2488 case 89:
2489 w5[2] = w5[2] | 0x0200;
2490 break;
2491
2492 case 90:
2493 w5[2] = w5[2] | 0x020000;
2494 break;
2495
2496 case 91:
2497 w5[2] = w5[2] | 0x02000000;
2498 break;
2499
2500 case 92:
2501 w5[3] = 0x02;
2502 break;
2503
2504 case 93:
2505 w5[3] = w5[3] | 0x0200;
2506 break;
2507
2508 case 94:
2509 w5[3] = w5[3] | 0x020000;
2510 break;
2511
2512 case 95:
2513 w5[3] = w5[3] | 0x02000000;
2514 break;
2515
2516 case 96:
2517 w6[0] = 0x02;
2518 break;
2519
2520 case 97:
2521 w6[0] = w6[0] | 0x0200;
2522 break;
2523
2524 case 98:
2525 w6[0] = w6[0] | 0x020000;
2526 break;
2527
2528 case 99:
2529 w6[0] = w6[0] | 0x02000000;
2530 break;
2531
2532 case 100:
2533 w6[1] = 0x02;
2534 break;
2535
2536 case 101:
2537 w6[1] = w6[1] | 0x0200;
2538 break;
2539
2540 case 102:
2541 w6[1] = w6[1] | 0x020000;
2542 break;
2543
2544 case 103:
2545 w6[1] = w6[1] | 0x02000000;
2546 break;
2547
2548 case 104:
2549 w6[2] = 0x02;
2550 break;
2551
2552 case 105:
2553 w6[2] = w6[2] | 0x0200;
2554 break;
2555
2556 case 106:
2557 w6[2] = w6[2] | 0x020000;
2558 break;
2559
2560 case 107:
2561 w6[2] = w6[2] | 0x02000000;
2562 break;
2563
2564 case 108:
2565 w6[3] = 0x02;
2566 break;
2567
2568 case 109:
2569 w6[3] = w6[3] | 0x0200;
2570 break;
2571
2572 case 110:
2573 w6[3] = w6[3] | 0x020000;
2574 break;
2575
2576 case 111:
2577 w6[3] = w6[3] | 0x02000000;
2578 break;
2579
2580 case 112:
2581 w7[0] = 0x02;
2582 break;
2583
2584 case 113:
2585 w7[0] = w7[0] | 0x0200;
2586 break;
2587
2588 case 114:
2589 w7[0] = w7[0] | 0x020000;
2590 break;
2591
2592 case 115:
2593 w7[0] = w7[0] | 0x02000000;
2594 break;
2595
2596 case 116:
2597 w7[1] = 0x02;
2598 break;
2599
2600 case 117:
2601 w7[1] = w7[1] | 0x0200;
2602 break;
2603
2604 case 118:
2605 w7[1] = w7[1] | 0x020000;
2606 break;
2607
2608 case 119:
2609 w7[1] = w7[1] | 0x02000000;
2610 break;
2611
2612 case 120:
2613 w7[2] = 0x02;
2614 break;
2615
2616 case 121:
2617 w7[2] = w7[2] | 0x0200;
2618 break;
2619
2620 case 122:
2621 w7[2] = w7[2] | 0x020000;
2622 break;
2623
2624 case 123:
2625 w7[2] = w7[2] | 0x02000000;
2626 break;
2627
2628 case 124:
2629 w7[3] = 0x02;
2630 break;
2631
2632 case 125:
2633 w7[3] = w7[3] | 0x0200;
2634 break;
2635
2636 case 126:
2637 w7[3] = w7[3] | 0x020000;
2638 break;
2639
2640 case 127:
2641 w7[3] = w7[3] | 0x02000000;
2642 break;
2643 }
2644 }
2645
2646 static void append_0x80_1 (u32 w0[4], const u32 offset)
2647 {
2648 switch (offset)
2649 {
2650 case 0:
2651 w0[0] = 0x80;
2652 break;
2653
2654 case 1:
2655 w0[0] = w0[0] | 0x8000;
2656 break;
2657
2658 case 2:
2659 w0[0] = w0[0] | 0x800000;
2660 break;
2661
2662 case 3:
2663 w0[0] = w0[0] | 0x80000000;
2664 break;
2665
2666 case 4:
2667 w0[1] = 0x80;
2668 break;
2669
2670 case 5:
2671 w0[1] = w0[1] | 0x8000;
2672 break;
2673
2674 case 6:
2675 w0[1] = w0[1] | 0x800000;
2676 break;
2677
2678 case 7:
2679 w0[1] = w0[1] | 0x80000000;
2680 break;
2681
2682 case 8:
2683 w0[2] = 0x80;
2684 break;
2685
2686 case 9:
2687 w0[2] = w0[2] | 0x8000;
2688 break;
2689
2690 case 10:
2691 w0[2] = w0[2] | 0x800000;
2692 break;
2693
2694 case 11:
2695 w0[2] = w0[2] | 0x80000000;
2696 break;
2697
2698 case 12:
2699 w0[3] = 0x80;
2700 break;
2701
2702 case 13:
2703 w0[3] = w0[3] | 0x8000;
2704 break;
2705
2706 case 14:
2707 w0[3] = w0[3] | 0x800000;
2708 break;
2709
2710 case 15:
2711 w0[3] = w0[3] | 0x80000000;
2712 break;
2713 }
2714 }
2715
2716 static void append_0x80_2 (u32 w0[4], u32 w1[4], const u32 offset)
2717 {
2718 switch (offset)
2719 {
2720 case 0:
2721 w0[0] = 0x80;
2722 break;
2723
2724 case 1:
2725 w0[0] = w0[0] | 0x8000;
2726 break;
2727
2728 case 2:
2729 w0[0] = w0[0] | 0x800000;
2730 break;
2731
2732 case 3:
2733 w0[0] = w0[0] | 0x80000000;
2734 break;
2735
2736 case 4:
2737 w0[1] = 0x80;
2738 break;
2739
2740 case 5:
2741 w0[1] = w0[1] | 0x8000;
2742 break;
2743
2744 case 6:
2745 w0[1] = w0[1] | 0x800000;
2746 break;
2747
2748 case 7:
2749 w0[1] = w0[1] | 0x80000000;
2750 break;
2751
2752 case 8:
2753 w0[2] = 0x80;
2754 break;
2755
2756 case 9:
2757 w0[2] = w0[2] | 0x8000;
2758 break;
2759
2760 case 10:
2761 w0[2] = w0[2] | 0x800000;
2762 break;
2763
2764 case 11:
2765 w0[2] = w0[2] | 0x80000000;
2766 break;
2767
2768 case 12:
2769 w0[3] = 0x80;
2770 break;
2771
2772 case 13:
2773 w0[3] = w0[3] | 0x8000;
2774 break;
2775
2776 case 14:
2777 w0[3] = w0[3] | 0x800000;
2778 break;
2779
2780 case 15:
2781 w0[3] = w0[3] | 0x80000000;
2782 break;
2783
2784 case 16:
2785 w1[0] = 0x80;
2786 break;
2787
2788 case 17:
2789 w1[0] = w1[0] | 0x8000;
2790 break;
2791
2792 case 18:
2793 w1[0] = w1[0] | 0x800000;
2794 break;
2795
2796 case 19:
2797 w1[0] = w1[0] | 0x80000000;
2798 break;
2799
2800 case 20:
2801 w1[1] = 0x80;
2802 break;
2803
2804 case 21:
2805 w1[1] = w1[1] | 0x8000;
2806 break;
2807
2808 case 22:
2809 w1[1] = w1[1] | 0x800000;
2810 break;
2811
2812 case 23:
2813 w1[1] = w1[1] | 0x80000000;
2814 break;
2815
2816 case 24:
2817 w1[2] = 0x80;
2818 break;
2819
2820 case 25:
2821 w1[2] = w1[2] | 0x8000;
2822 break;
2823
2824 case 26:
2825 w1[2] = w1[2] | 0x800000;
2826 break;
2827
2828 case 27:
2829 w1[2] = w1[2] | 0x80000000;
2830 break;
2831
2832 case 28:
2833 w1[3] = 0x80;
2834 break;
2835
2836 case 29:
2837 w1[3] = w1[3] | 0x8000;
2838 break;
2839
2840 case 30:
2841 w1[3] = w1[3] | 0x800000;
2842 break;
2843
2844 case 31:
2845 w1[3] = w1[3] | 0x80000000;
2846 break;
2847 }
2848 }
2849
2850 static void append_0x80_2_be (u32 w0[4], u32 w1[4], const u32 offset)
2851 {
2852 switch (offset)
2853 {
2854 case 0:
2855 w0[0] |= 0x80000000;
2856 break;
2857
2858 case 1:
2859 w0[0] |= 0x800000;
2860 break;
2861
2862 case 2:
2863 w0[0] |= 0x8000;
2864 break;
2865
2866 case 3:
2867 w0[0] |= 0x80;
2868 break;
2869
2870 case 4:
2871 w0[1] |= 0x80000000;
2872 break;
2873
2874 case 5:
2875 w0[1] |= 0x800000;
2876 break;
2877
2878 case 6:
2879 w0[1] |= 0x8000;
2880 break;
2881
2882 case 7:
2883 w0[1] |= 0x80;
2884 break;
2885
2886 case 8:
2887 w0[2] |= 0x80000000;
2888 break;
2889
2890 case 9:
2891 w0[2] |= 0x800000;
2892 break;
2893
2894 case 10:
2895 w0[2] |= 0x8000;
2896 break;
2897
2898 case 11:
2899 w0[2] |= 0x80;
2900 break;
2901
2902 case 12:
2903 w0[3] |= 0x80000000;
2904 break;
2905
2906 case 13:
2907 w0[3] |= 0x800000;
2908 break;
2909
2910 case 14:
2911 w0[3] |= 0x8000;
2912 break;
2913
2914 case 15:
2915 w0[3] |= 0x80;
2916 break;
2917
2918 case 16:
2919 w1[0] |= 0x80000000;
2920 break;
2921
2922 case 17:
2923 w1[0] |= 0x800000;
2924 break;
2925
2926 case 18:
2927 w1[0] |= 0x8000;
2928 break;
2929
2930 case 19:
2931 w1[0] |= 0x80;
2932 break;
2933
2934 case 20:
2935 w1[1] |= 0x80000000;
2936 break;
2937
2938 case 21:
2939 w1[1] |= 0x800000;
2940 break;
2941
2942 case 22:
2943 w1[1] |= 0x8000;
2944 break;
2945
2946 case 23:
2947 w1[1] |= 0x80;
2948 break;
2949
2950 case 24:
2951 w1[2] |= 0x80000000;
2952 break;
2953
2954 case 25:
2955 w1[2] |= 0x800000;
2956 break;
2957
2958 case 26:
2959 w1[2] |= 0x8000;
2960 break;
2961
2962 case 27:
2963 w1[2] |= 0x80;
2964 break;
2965
2966 case 28:
2967 w1[3] |= 0x80000000;
2968 break;
2969
2970 case 29:
2971 w1[3] |= 0x800000;
2972 break;
2973
2974 case 30:
2975 w1[3] |= 0x8000;
2976 break;
2977
2978 case 31:
2979 w1[3] |= 0x80;
2980 break;
2981 }
2982 }
2983
2984 static void append_0x80_3 (u32 w0[4], u32 w1[4], u32 w2[4], const u32 offset)
2985 {
2986 switch (offset)
2987 {
2988 case 0:
2989 w0[0] = 0x80;
2990 break;
2991
2992 case 1:
2993 w0[0] = w0[0] | 0x8000;
2994 break;
2995
2996 case 2:
2997 w0[0] = w0[0] | 0x800000;
2998 break;
2999
3000 case 3:
3001 w0[0] = w0[0] | 0x80000000;
3002 break;
3003
3004 case 4:
3005 w0[1] = 0x80;
3006 break;
3007
3008 case 5:
3009 w0[1] = w0[1] | 0x8000;
3010 break;
3011
3012 case 6:
3013 w0[1] = w0[1] | 0x800000;
3014 break;
3015
3016 case 7:
3017 w0[1] = w0[1] | 0x80000000;
3018 break;
3019
3020 case 8:
3021 w0[2] = 0x80;
3022 break;
3023
3024 case 9:
3025 w0[2] = w0[2] | 0x8000;
3026 break;
3027
3028 case 10:
3029 w0[2] = w0[2] | 0x800000;
3030 break;
3031
3032 case 11:
3033 w0[2] = w0[2] | 0x80000000;
3034 break;
3035
3036 case 12:
3037 w0[3] = 0x80;
3038 break;
3039
3040 case 13:
3041 w0[3] = w0[3] | 0x8000;
3042 break;
3043
3044 case 14:
3045 w0[3] = w0[3] | 0x800000;
3046 break;
3047
3048 case 15:
3049 w0[3] = w0[3] | 0x80000000;
3050 break;
3051
3052 case 16:
3053 w1[0] = 0x80;
3054 break;
3055
3056 case 17:
3057 w1[0] = w1[0] | 0x8000;
3058 break;
3059
3060 case 18:
3061 w1[0] = w1[0] | 0x800000;
3062 break;
3063
3064 case 19:
3065 w1[0] = w1[0] | 0x80000000;
3066 break;
3067
3068 case 20:
3069 w1[1] = 0x80;
3070 break;
3071
3072 case 21:
3073 w1[1] = w1[1] | 0x8000;
3074 break;
3075
3076 case 22:
3077 w1[1] = w1[1] | 0x800000;
3078 break;
3079
3080 case 23:
3081 w1[1] = w1[1] | 0x80000000;
3082 break;
3083
3084 case 24:
3085 w1[2] = 0x80;
3086 break;
3087
3088 case 25:
3089 w1[2] = w1[2] | 0x8000;
3090 break;
3091
3092 case 26:
3093 w1[2] = w1[2] | 0x800000;
3094 break;
3095
3096 case 27:
3097 w1[2] = w1[2] | 0x80000000;
3098 break;
3099
3100 case 28:
3101 w1[3] = 0x80;
3102 break;
3103
3104 case 29:
3105 w1[3] = w1[3] | 0x8000;
3106 break;
3107
3108 case 30:
3109 w1[3] = w1[3] | 0x800000;
3110 break;
3111
3112 case 31:
3113 w1[3] = w1[3] | 0x80000000;
3114 break;
3115
3116 case 32:
3117 w2[0] = 0x80;
3118 break;
3119
3120 case 33:
3121 w2[0] = w2[0] | 0x8000;
3122 break;
3123
3124 case 34:
3125 w2[0] = w2[0] | 0x800000;
3126 break;
3127
3128 case 35:
3129 w2[0] = w2[0] | 0x80000000;
3130 break;
3131
3132 case 36:
3133 w2[1] = 0x80;
3134 break;
3135
3136 case 37:
3137 w2[1] = w2[1] | 0x8000;
3138 break;
3139
3140 case 38:
3141 w2[1] = w2[1] | 0x800000;
3142 break;
3143
3144 case 39:
3145 w2[1] = w2[1] | 0x80000000;
3146 break;
3147
3148 case 40:
3149 w2[2] = 0x80;
3150 break;
3151
3152 case 41:
3153 w2[2] = w2[2] | 0x8000;
3154 break;
3155
3156 case 42:
3157 w2[2] = w2[2] | 0x800000;
3158 break;
3159
3160 case 43:
3161 w2[2] = w2[2] | 0x80000000;
3162 break;
3163
3164 case 44:
3165 w2[3] = 0x80;
3166 break;
3167
3168 case 45:
3169 w2[3] = w2[3] | 0x8000;
3170 break;
3171
3172 case 46:
3173 w2[3] = w2[3] | 0x800000;
3174 break;
3175
3176 case 47:
3177 w2[3] = w2[3] | 0x80000000;
3178 break;
3179 }
3180 }
3181
3182 static void append_0x80_4 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 offset)
3183 {
3184 switch (offset)
3185 {
3186 case 0:
3187 w0[0] = 0x80;
3188 break;
3189
3190 case 1:
3191 w0[0] = w0[0] | 0x8000;
3192 break;
3193
3194 case 2:
3195 w0[0] = w0[0] | 0x800000;
3196 break;
3197
3198 case 3:
3199 w0[0] = w0[0] | 0x80000000;
3200 break;
3201
3202 case 4:
3203 w0[1] = 0x80;
3204 break;
3205
3206 case 5:
3207 w0[1] = w0[1] | 0x8000;
3208 break;
3209
3210 case 6:
3211 w0[1] = w0[1] | 0x800000;
3212 break;
3213
3214 case 7:
3215 w0[1] = w0[1] | 0x80000000;
3216 break;
3217
3218 case 8:
3219 w0[2] = 0x80;
3220 break;
3221
3222 case 9:
3223 w0[2] = w0[2] | 0x8000;
3224 break;
3225
3226 case 10:
3227 w0[2] = w0[2] | 0x800000;
3228 break;
3229
3230 case 11:
3231 w0[2] = w0[2] | 0x80000000;
3232 break;
3233
3234 case 12:
3235 w0[3] = 0x80;
3236 break;
3237
3238 case 13:
3239 w0[3] = w0[3] | 0x8000;
3240 break;
3241
3242 case 14:
3243 w0[3] = w0[3] | 0x800000;
3244 break;
3245
3246 case 15:
3247 w0[3] = w0[3] | 0x80000000;
3248 break;
3249
3250 case 16:
3251 w1[0] = 0x80;
3252 break;
3253
3254 case 17:
3255 w1[0] = w1[0] | 0x8000;
3256 break;
3257
3258 case 18:
3259 w1[0] = w1[0] | 0x800000;
3260 break;
3261
3262 case 19:
3263 w1[0] = w1[0] | 0x80000000;
3264 break;
3265
3266 case 20:
3267 w1[1] = 0x80;
3268 break;
3269
3270 case 21:
3271 w1[1] = w1[1] | 0x8000;
3272 break;
3273
3274 case 22:
3275 w1[1] = w1[1] | 0x800000;
3276 break;
3277
3278 case 23:
3279 w1[1] = w1[1] | 0x80000000;
3280 break;
3281
3282 case 24:
3283 w1[2] = 0x80;
3284 break;
3285
3286 case 25:
3287 w1[2] = w1[2] | 0x8000;
3288 break;
3289
3290 case 26:
3291 w1[2] = w1[2] | 0x800000;
3292 break;
3293
3294 case 27:
3295 w1[2] = w1[2] | 0x80000000;
3296 break;
3297
3298 case 28:
3299 w1[3] = 0x80;
3300 break;
3301
3302 case 29:
3303 w1[3] = w1[3] | 0x8000;
3304 break;
3305
3306 case 30:
3307 w1[3] = w1[3] | 0x800000;
3308 break;
3309
3310 case 31:
3311 w1[3] = w1[3] | 0x80000000;
3312 break;
3313
3314 case 32:
3315 w2[0] = 0x80;
3316 break;
3317
3318 case 33:
3319 w2[0] = w2[0] | 0x8000;
3320 break;
3321
3322 case 34:
3323 w2[0] = w2[0] | 0x800000;
3324 break;
3325
3326 case 35:
3327 w2[0] = w2[0] | 0x80000000;
3328 break;
3329
3330 case 36:
3331 w2[1] = 0x80;
3332 break;
3333
3334 case 37:
3335 w2[1] = w2[1] | 0x8000;
3336 break;
3337
3338 case 38:
3339 w2[1] = w2[1] | 0x800000;
3340 break;
3341
3342 case 39:
3343 w2[1] = w2[1] | 0x80000000;
3344 break;
3345
3346 case 40:
3347 w2[2] = 0x80;
3348 break;
3349
3350 case 41:
3351 w2[2] = w2[2] | 0x8000;
3352 break;
3353
3354 case 42:
3355 w2[2] = w2[2] | 0x800000;
3356 break;
3357
3358 case 43:
3359 w2[2] = w2[2] | 0x80000000;
3360 break;
3361
3362 case 44:
3363 w2[3] = 0x80;
3364 break;
3365
3366 case 45:
3367 w2[3] = w2[3] | 0x8000;
3368 break;
3369
3370 case 46:
3371 w2[3] = w2[3] | 0x800000;
3372 break;
3373
3374 case 47:
3375 w2[3] = w2[3] | 0x80000000;
3376 break;
3377
3378 case 48:
3379 w3[0] = 0x80;
3380 break;
3381
3382 case 49:
3383 w3[0] = w3[0] | 0x8000;
3384 break;
3385
3386 case 50:
3387 w3[0] = w3[0] | 0x800000;
3388 break;
3389
3390 case 51:
3391 w3[0] = w3[0] | 0x80000000;
3392 break;
3393
3394 case 52:
3395 w3[1] = 0x80;
3396 break;
3397
3398 case 53:
3399 w3[1] = w3[1] | 0x8000;
3400 break;
3401
3402 case 54:
3403 w3[1] = w3[1] | 0x800000;
3404 break;
3405
3406 case 55:
3407 w3[1] = w3[1] | 0x80000000;
3408 break;
3409
3410 case 56:
3411 w3[2] = 0x80;
3412 break;
3413
3414 case 57:
3415 w3[2] = w3[2] | 0x8000;
3416 break;
3417
3418 case 58:
3419 w3[2] = w3[2] | 0x800000;
3420 break;
3421
3422 case 59:
3423 w3[2] = w3[2] | 0x80000000;
3424 break;
3425
3426 case 60:
3427 w3[3] = 0x80;
3428 break;
3429
3430 case 61:
3431 w3[3] = w3[3] | 0x8000;
3432 break;
3433
3434 case 62:
3435 w3[3] = w3[3] | 0x800000;
3436 break;
3437
3438 case 63:
3439 w3[3] = w3[3] | 0x80000000;
3440 break;
3441 }
3442 }
3443
3444 static void append_0x80_8 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], u32 w4[4], u32 w5[4], u32 w6[4], u32 w7[4], const u32 offset)
3445 {
3446 switch (offset)
3447 {
3448 case 0:
3449 w0[0] = 0x80;
3450 break;
3451
3452 case 1:
3453 w0[0] = w0[0] | 0x8000;
3454 break;
3455
3456 case 2:
3457 w0[0] = w0[0] | 0x800000;
3458 break;
3459
3460 case 3:
3461 w0[0] = w0[0] | 0x80000000;
3462 break;
3463
3464 case 4:
3465 w0[1] = 0x80;
3466 break;
3467
3468 case 5:
3469 w0[1] = w0[1] | 0x8000;
3470 break;
3471
3472 case 6:
3473 w0[1] = w0[1] | 0x800000;
3474 break;
3475
3476 case 7:
3477 w0[1] = w0[1] | 0x80000000;
3478 break;
3479
3480 case 8:
3481 w0[2] = 0x80;
3482 break;
3483
3484 case 9:
3485 w0[2] = w0[2] | 0x8000;
3486 break;
3487
3488 case 10:
3489 w0[2] = w0[2] | 0x800000;
3490 break;
3491
3492 case 11:
3493 w0[2] = w0[2] | 0x80000000;
3494 break;
3495
3496 case 12:
3497 w0[3] = 0x80;
3498 break;
3499
3500 case 13:
3501 w0[3] = w0[3] | 0x8000;
3502 break;
3503
3504 case 14:
3505 w0[3] = w0[3] | 0x800000;
3506 break;
3507
3508 case 15:
3509 w0[3] = w0[3] | 0x80000000;
3510 break;
3511
3512 case 16:
3513 w1[0] = 0x80;
3514 break;
3515
3516 case 17:
3517 w1[0] = w1[0] | 0x8000;
3518 break;
3519
3520 case 18:
3521 w1[0] = w1[0] | 0x800000;
3522 break;
3523
3524 case 19:
3525 w1[0] = w1[0] | 0x80000000;
3526 break;
3527
3528 case 20:
3529 w1[1] = 0x80;
3530 break;
3531
3532 case 21:
3533 w1[1] = w1[1] | 0x8000;
3534 break;
3535
3536 case 22:
3537 w1[1] = w1[1] | 0x800000;
3538 break;
3539
3540 case 23:
3541 w1[1] = w1[1] | 0x80000000;
3542 break;
3543
3544 case 24:
3545 w1[2] = 0x80;
3546 break;
3547
3548 case 25:
3549 w1[2] = w1[2] | 0x8000;
3550 break;
3551
3552 case 26:
3553 w1[2] = w1[2] | 0x800000;
3554 break;
3555
3556 case 27:
3557 w1[2] = w1[2] | 0x80000000;
3558 break;
3559
3560 case 28:
3561 w1[3] = 0x80;
3562 break;
3563
3564 case 29:
3565 w1[3] = w1[3] | 0x8000;
3566 break;
3567
3568 case 30:
3569 w1[3] = w1[3] | 0x800000;
3570 break;
3571
3572 case 31:
3573 w1[3] = w1[3] | 0x80000000;
3574 break;
3575
3576 case 32:
3577 w2[0] = 0x80;
3578 break;
3579
3580 case 33:
3581 w2[0] = w2[0] | 0x8000;
3582 break;
3583
3584 case 34:
3585 w2[0] = w2[0] | 0x800000;
3586 break;
3587
3588 case 35:
3589 w2[0] = w2[0] | 0x80000000;
3590 break;
3591
3592 case 36:
3593 w2[1] = 0x80;
3594 break;
3595
3596 case 37:
3597 w2[1] = w2[1] | 0x8000;
3598 break;
3599
3600 case 38:
3601 w2[1] = w2[1] | 0x800000;
3602 break;
3603
3604 case 39:
3605 w2[1] = w2[1] | 0x80000000;
3606 break;
3607
3608 case 40:
3609 w2[2] = 0x80;
3610 break;
3611
3612 case 41:
3613 w2[2] = w2[2] | 0x8000;
3614 break;
3615
3616 case 42:
3617 w2[2] = w2[2] | 0x800000;
3618 break;
3619
3620 case 43:
3621 w2[2] = w2[2] | 0x80000000;
3622 break;
3623
3624 case 44:
3625 w2[3] = 0x80;
3626 break;
3627
3628 case 45:
3629 w2[3] = w2[3] | 0x8000;
3630 break;
3631
3632 case 46:
3633 w2[3] = w2[3] | 0x800000;
3634 break;
3635
3636 case 47:
3637 w2[3] = w2[3] | 0x80000000;
3638 break;
3639
3640 case 48:
3641 w3[0] = 0x80;
3642 break;
3643
3644 case 49:
3645 w3[0] = w3[0] | 0x8000;
3646 break;
3647
3648 case 50:
3649 w3[0] = w3[0] | 0x800000;
3650 break;
3651
3652 case 51:
3653 w3[0] = w3[0] | 0x80000000;
3654 break;
3655
3656 case 52:
3657 w3[1] = 0x80;
3658 break;
3659
3660 case 53:
3661 w3[1] = w3[1] | 0x8000;
3662 break;
3663
3664 case 54:
3665 w3[1] = w3[1] | 0x800000;
3666 break;
3667
3668 case 55:
3669 w3[1] = w3[1] | 0x80000000;
3670 break;
3671
3672 case 56:
3673 w3[2] = 0x80;
3674 break;
3675
3676 case 57:
3677 w3[2] = w3[2] | 0x8000;
3678 break;
3679
3680 case 58:
3681 w3[2] = w3[2] | 0x800000;
3682 break;
3683
3684 case 59:
3685 w3[2] = w3[2] | 0x80000000;
3686 break;
3687
3688 case 60:
3689 w3[3] = 0x80;
3690 break;
3691
3692 case 61:
3693 w3[3] = w3[3] | 0x8000;
3694 break;
3695
3696 case 62:
3697 w3[3] = w3[3] | 0x800000;
3698 break;
3699
3700 case 63:
3701 w3[3] = w3[3] | 0x80000000;
3702 break;
3703
3704 case 64:
3705 w4[0] = 0x80;
3706 break;
3707
3708 case 65:
3709 w4[0] = w4[0] | 0x8000;
3710 break;
3711
3712 case 66:
3713 w4[0] = w4[0] | 0x800000;
3714 break;
3715
3716 case 67:
3717 w4[0] = w4[0] | 0x80000000;
3718 break;
3719
3720 case 68:
3721 w4[1] = 0x80;
3722 break;
3723
3724 case 69:
3725 w4[1] = w4[1] | 0x8000;
3726 break;
3727
3728 case 70:
3729 w4[1] = w4[1] | 0x800000;
3730 break;
3731
3732 case 71:
3733 w4[1] = w4[1] | 0x80000000;
3734 break;
3735
3736 case 72:
3737 w4[2] = 0x80;
3738 break;
3739
3740 case 73:
3741 w4[2] = w4[2] | 0x8000;
3742 break;
3743
3744 case 74:
3745 w4[2] = w4[2] | 0x800000;
3746 break;
3747
3748 case 75:
3749 w4[2] = w4[2] | 0x80000000;
3750 break;
3751
3752 case 76:
3753 w4[3] = 0x80;
3754 break;
3755
3756 case 77:
3757 w4[3] = w4[3] | 0x8000;
3758 break;
3759
3760 case 78:
3761 w4[3] = w4[3] | 0x800000;
3762 break;
3763
3764 case 79:
3765 w4[3] = w4[3] | 0x80000000;
3766 break;
3767
3768 case 80:
3769 w5[0] = 0x80;
3770 break;
3771
3772 case 81:
3773 w5[0] = w5[0] | 0x8000;
3774 break;
3775
3776 case 82:
3777 w5[0] = w5[0] | 0x800000;
3778 break;
3779
3780 case 83:
3781 w5[0] = w5[0] | 0x80000000;
3782 break;
3783
3784 case 84:
3785 w5[1] = 0x80;
3786 break;
3787
3788 case 85:
3789 w5[1] = w5[1] | 0x8000;
3790 break;
3791
3792 case 86:
3793 w5[1] = w5[1] | 0x800000;
3794 break;
3795
3796 case 87:
3797 w5[1] = w5[1] | 0x80000000;
3798 break;
3799
3800 case 88:
3801 w5[2] = 0x80;
3802 break;
3803
3804 case 89:
3805 w5[2] = w5[2] | 0x8000;
3806 break;
3807
3808 case 90:
3809 w5[2] = w5[2] | 0x800000;
3810 break;
3811
3812 case 91:
3813 w5[2] = w5[2] | 0x80000000;
3814 break;
3815
3816 case 92:
3817 w5[3] = 0x80;
3818 break;
3819
3820 case 93:
3821 w5[3] = w5[3] | 0x8000;
3822 break;
3823
3824 case 94:
3825 w5[3] = w5[3] | 0x800000;
3826 break;
3827
3828 case 95:
3829 w5[3] = w5[3] | 0x80000000;
3830 break;
3831
3832 case 96:
3833 w6[0] = 0x80;
3834 break;
3835
3836 case 97:
3837 w6[0] = w6[0] | 0x8000;
3838 break;
3839
3840 case 98:
3841 w6[0] = w6[0] | 0x800000;
3842 break;
3843
3844 case 99:
3845 w6[0] = w6[0] | 0x80000000;
3846 break;
3847
3848 case 100:
3849 w6[1] = 0x80;
3850 break;
3851
3852 case 101:
3853 w6[1] = w6[1] | 0x8000;
3854 break;
3855
3856 case 102:
3857 w6[1] = w6[1] | 0x800000;
3858 break;
3859
3860 case 103:
3861 w6[1] = w6[1] | 0x80000000;
3862 break;
3863
3864 case 104:
3865 w6[2] = 0x80;
3866 break;
3867
3868 case 105:
3869 w6[2] = w6[2] | 0x8000;
3870 break;
3871
3872 case 106:
3873 w6[2] = w6[2] | 0x800000;
3874 break;
3875
3876 case 107:
3877 w6[2] = w6[2] | 0x80000000;
3878 break;
3879
3880 case 108:
3881 w6[3] = 0x80;
3882 break;
3883
3884 case 109:
3885 w6[3] = w6[3] | 0x8000;
3886 break;
3887
3888 case 110:
3889 w6[3] = w6[3] | 0x800000;
3890 break;
3891
3892 case 111:
3893 w6[3] = w6[3] | 0x80000000;
3894 break;
3895
3896 case 112:
3897 w7[0] = 0x80;
3898 break;
3899
3900 case 113:
3901 w7[0] = w7[0] | 0x8000;
3902 break;
3903
3904 case 114:
3905 w7[0] = w7[0] | 0x800000;
3906 break;
3907
3908 case 115:
3909 w7[0] = w7[0] | 0x80000000;
3910 break;
3911
3912 case 116:
3913 w7[1] = 0x80;
3914 break;
3915
3916 case 117:
3917 w7[1] = w7[1] | 0x8000;
3918 break;
3919
3920 case 118:
3921 w7[1] = w7[1] | 0x800000;
3922 break;
3923
3924 case 119:
3925 w7[1] = w7[1] | 0x80000000;
3926 break;
3927
3928 case 120:
3929 w7[2] = 0x80;
3930 break;
3931
3932 case 121:
3933 w7[2] = w7[2] | 0x8000;
3934 break;
3935
3936 case 122:
3937 w7[2] = w7[2] | 0x800000;
3938 break;
3939
3940 case 123:
3941 w7[2] = w7[2] | 0x80000000;
3942 break;
3943
3944 case 124:
3945 w7[3] = 0x80;
3946 break;
3947
3948 case 125:
3949 w7[3] = w7[3] | 0x8000;
3950 break;
3951
3952 case 126:
3953 w7[3] = w7[3] | 0x800000;
3954 break;
3955
3956 case 127:
3957 w7[3] = w7[3] | 0x80000000;
3958 break;
3959 }
3960 }
3961
3962 static void append_0x80_4 (u32 w[16], const u32 offset)
3963 {
3964 switch (offset)
3965 {
3966 case 0:
3967 w[ 0] = 0x80;
3968 break;
3969
3970 case 1:
3971 w[ 0] = w[ 0] | 0x8000;
3972 break;
3973
3974 case 2:
3975 w[ 0] = w[ 0] | 0x800000;
3976 break;
3977
3978 case 3:
3979 w[ 0] = w[ 0] | 0x80000000;
3980 break;
3981
3982 case 4:
3983 w[ 1] = 0x80;
3984 break;
3985
3986 case 5:
3987 w[ 1] = w[ 1] | 0x8000;
3988 break;
3989
3990 case 6:
3991 w[ 1] = w[ 1] | 0x800000;
3992 break;
3993
3994 case 7:
3995 w[ 1] = w[ 1] | 0x80000000;
3996 break;
3997
3998 case 8:
3999 w[ 2] = 0x80;
4000 break;
4001
4002 case 9:
4003 w[ 2] = w[ 2] | 0x8000;
4004 break;
4005
4006 case 10:
4007 w[ 2] = w[ 2] | 0x800000;
4008 break;
4009
4010 case 11:
4011 w[ 2] = w[ 2] | 0x80000000;
4012 break;
4013
4014 case 12:
4015 w[ 3] = 0x80;
4016 break;
4017
4018 case 13:
4019 w[ 3] = w[ 3] | 0x8000;
4020 break;
4021
4022 case 14:
4023 w[ 3] = w[ 3] | 0x800000;
4024 break;
4025
4026 case 15:
4027 w[ 3] = w[ 3] | 0x80000000;
4028 break;
4029
4030 case 16:
4031 w[ 4] = 0x80;
4032 break;
4033
4034 case 17:
4035 w[ 4] = w[ 4] | 0x8000;
4036 break;
4037
4038 case 18:
4039 w[ 4] = w[ 4] | 0x800000;
4040 break;
4041
4042 case 19:
4043 w[ 4] = w[ 4] | 0x80000000;
4044 break;
4045
4046 case 20:
4047 w[ 5] = 0x80;
4048 break;
4049
4050 case 21:
4051 w[ 5] = w[ 5] | 0x8000;
4052 break;
4053
4054 case 22:
4055 w[ 5] = w[ 5] | 0x800000;
4056 break;
4057
4058 case 23:
4059 w[ 5] = w[ 5] | 0x80000000;
4060 break;
4061
4062 case 24:
4063 w[ 6] = 0x80;
4064 break;
4065
4066 case 25:
4067 w[ 6] = w[ 6] | 0x8000;
4068 break;
4069
4070 case 26:
4071 w[ 6] = w[ 6] | 0x800000;
4072 break;
4073
4074 case 27:
4075 w[ 6] = w[ 6] | 0x80000000;
4076 break;
4077
4078 case 28:
4079 w[ 7] = 0x80;
4080 break;
4081
4082 case 29:
4083 w[ 7] = w[ 7] | 0x8000;
4084 break;
4085
4086 case 30:
4087 w[ 7] = w[ 7] | 0x800000;
4088 break;
4089
4090 case 31:
4091 w[ 7] = w[ 7] | 0x80000000;
4092 break;
4093
4094 case 32:
4095 w[ 8] = 0x80;
4096 break;
4097
4098 case 33:
4099 w[ 8] = w[ 8] | 0x8000;
4100 break;
4101
4102 case 34:
4103 w[ 8] = w[ 8] | 0x800000;
4104 break;
4105
4106 case 35:
4107 w[ 8] = w[ 8] | 0x80000000;
4108 break;
4109
4110 case 36:
4111 w[ 9] = 0x80;
4112 break;
4113
4114 case 37:
4115 w[ 9] = w[ 9] | 0x8000;
4116 break;
4117
4118 case 38:
4119 w[ 9] = w[ 9] | 0x800000;
4120 break;
4121
4122 case 39:
4123 w[ 9] = w[ 9] | 0x80000000;
4124 break;
4125
4126 case 40:
4127 w[10] = 0x80;
4128 break;
4129
4130 case 41:
4131 w[10] = w[10] | 0x8000;
4132 break;
4133
4134 case 42:
4135 w[10] = w[10] | 0x800000;
4136 break;
4137
4138 case 43:
4139 w[10] = w[10] | 0x80000000;
4140 break;
4141
4142 case 44:
4143 w[11] = 0x80;
4144 break;
4145
4146 case 45:
4147 w[11] = w[11] | 0x8000;
4148 break;
4149
4150 case 46:
4151 w[11] = w[11] | 0x800000;
4152 break;
4153
4154 case 47:
4155 w[11] = w[11] | 0x80000000;
4156 break;
4157
4158 case 48:
4159 w[12] = 0x80;
4160 break;
4161
4162 case 49:
4163 w[12] = w[12] | 0x8000;
4164 break;
4165
4166 case 50:
4167 w[12] = w[12] | 0x800000;
4168 break;
4169
4170 case 51:
4171 w[12] = w[12] | 0x80000000;
4172 break;
4173
4174 case 52:
4175 w[13] = 0x80;
4176 break;
4177
4178 case 53:
4179 w[13] = w[13] | 0x8000;
4180 break;
4181
4182 case 54:
4183 w[13] = w[13] | 0x800000;
4184 break;
4185
4186 case 55:
4187 w[13] = w[13] | 0x80000000;
4188 break;
4189
4190 case 56:
4191 w[14] = 0x80;
4192 break;
4193
4194 case 57:
4195 w[14] = w[14] | 0x8000;
4196 break;
4197
4198 case 58:
4199 w[14] = w[14] | 0x800000;
4200 break;
4201
4202 case 59:
4203 w[14] = w[14] | 0x80000000;
4204 break;
4205
4206 case 60:
4207 w[15] = 0x80;
4208 break;
4209
4210 case 61:
4211 w[15] = w[15] | 0x8000;
4212 break;
4213
4214 case 62:
4215 w[15] = w[15] | 0x800000;
4216 break;
4217
4218 case 63:
4219 w[15] = w[15] | 0x80000000;
4220 break;
4221 }
4222 }
4223
4224 static void append_0x80_8 (u32 w[32], const u32 offset)
4225 {
4226 switch (offset)
4227 {
4228 case 0:
4229 w[ 0] = 0x80;
4230 break;
4231
4232 case 1:
4233 w[ 0] = w[ 0] | 0x8000;
4234 break;
4235
4236 case 2:
4237 w[ 0] = w[ 0] | 0x800000;
4238 break;
4239
4240 case 3:
4241 w[ 0] = w[ 0] | 0x80000000;
4242 break;
4243
4244 case 4:
4245 w[ 1] = 0x80;
4246 break;
4247
4248 case 5:
4249 w[ 1] = w[ 1] | 0x8000;
4250 break;
4251
4252 case 6:
4253 w[ 1] = w[ 1] | 0x800000;
4254 break;
4255
4256 case 7:
4257 w[ 1] = w[ 1] | 0x80000000;
4258 break;
4259
4260 case 8:
4261 w[ 2] = 0x80;
4262 break;
4263
4264 case 9:
4265 w[ 2] = w[ 2] | 0x8000;
4266 break;
4267
4268 case 10:
4269 w[ 2] = w[ 2] | 0x800000;
4270 break;
4271
4272 case 11:
4273 w[ 2] = w[ 2] | 0x80000000;
4274 break;
4275
4276 case 12:
4277 w[ 3] = 0x80;
4278 break;
4279
4280 case 13:
4281 w[ 3] = w[ 3] | 0x8000;
4282 break;
4283
4284 case 14:
4285 w[ 3] = w[ 3] | 0x800000;
4286 break;
4287
4288 case 15:
4289 w[ 3] = w[ 3] | 0x80000000;
4290 break;
4291
4292 case 16:
4293 w[ 4] = 0x80;
4294 break;
4295
4296 case 17:
4297 w[ 4] = w[ 4] | 0x8000;
4298 break;
4299
4300 case 18:
4301 w[ 4] = w[ 4] | 0x800000;
4302 break;
4303
4304 case 19:
4305 w[ 4] = w[ 4] | 0x80000000;
4306 break;
4307
4308 case 20:
4309 w[ 5] = 0x80;
4310 break;
4311
4312 case 21:
4313 w[ 5] = w[ 5] | 0x8000;
4314 break;
4315
4316 case 22:
4317 w[ 5] = w[ 5] | 0x800000;
4318 break;
4319
4320 case 23:
4321 w[ 5] = w[ 5] | 0x80000000;
4322 break;
4323
4324 case 24:
4325 w[ 6] = 0x80;
4326 break;
4327
4328 case 25:
4329 w[ 6] = w[ 6] | 0x8000;
4330 break;
4331
4332 case 26:
4333 w[ 6] = w[ 6] | 0x800000;
4334 break;
4335
4336 case 27:
4337 w[ 6] = w[ 6] | 0x80000000;
4338 break;
4339
4340 case 28:
4341 w[ 7] = 0x80;
4342 break;
4343
4344 case 29:
4345 w[ 7] = w[ 7] | 0x8000;
4346 break;
4347
4348 case 30:
4349 w[ 7] = w[ 7] | 0x800000;
4350 break;
4351
4352 case 31:
4353 w[ 7] = w[ 7] | 0x80000000;
4354 break;
4355
4356 case 32:
4357 w[ 8] = 0x80;
4358 break;
4359
4360 case 33:
4361 w[ 8] = w[ 8] | 0x8000;
4362 break;
4363
4364 case 34:
4365 w[ 8] = w[ 8] | 0x800000;
4366 break;
4367
4368 case 35:
4369 w[ 8] = w[ 8] | 0x80000000;
4370 break;
4371
4372 case 36:
4373 w[ 9] = 0x80;
4374 break;
4375
4376 case 37:
4377 w[ 9] = w[ 9] | 0x8000;
4378 break;
4379
4380 case 38:
4381 w[ 9] = w[ 9] | 0x800000;
4382 break;
4383
4384 case 39:
4385 w[ 9] = w[ 9] | 0x80000000;
4386 break;
4387
4388 case 40:
4389 w[10] = 0x80;
4390 break;
4391
4392 case 41:
4393 w[10] = w[10] | 0x8000;
4394 break;
4395
4396 case 42:
4397 w[10] = w[10] | 0x800000;
4398 break;
4399
4400 case 43:
4401 w[10] = w[10] | 0x80000000;
4402 break;
4403
4404 case 44:
4405 w[11] = 0x80;
4406 break;
4407
4408 case 45:
4409 w[11] = w[11] | 0x8000;
4410 break;
4411
4412 case 46:
4413 w[11] = w[11] | 0x800000;
4414 break;
4415
4416 case 47:
4417 w[11] = w[11] | 0x80000000;
4418 break;
4419
4420 case 48:
4421 w[12] = 0x80;
4422 break;
4423
4424 case 49:
4425 w[12] = w[12] | 0x8000;
4426 break;
4427
4428 case 50:
4429 w[12] = w[12] | 0x800000;
4430 break;
4431
4432 case 51:
4433 w[12] = w[12] | 0x80000000;
4434 break;
4435
4436 case 52:
4437 w[13] = 0x80;
4438 break;
4439
4440 case 53:
4441 w[13] = w[13] | 0x8000;
4442 break;
4443
4444 case 54:
4445 w[13] = w[13] | 0x800000;
4446 break;
4447
4448 case 55:
4449 w[13] = w[13] | 0x80000000;
4450 break;
4451
4452 case 56:
4453 w[14] = 0x80;
4454 break;
4455
4456 case 57:
4457 w[14] = w[14] | 0x8000;
4458 break;
4459
4460 case 58:
4461 w[14] = w[14] | 0x800000;
4462 break;
4463
4464 case 59:
4465 w[14] = w[14] | 0x80000000;
4466 break;
4467
4468 case 60:
4469 w[15] = 0x80;
4470 break;
4471
4472 case 61:
4473 w[15] = w[15] | 0x8000;
4474 break;
4475
4476 case 62:
4477 w[15] = w[15] | 0x800000;
4478 break;
4479
4480 case 63:
4481 w[15] = w[15] | 0x80000000;
4482 break;
4483
4484 case 64:
4485 w[16] = 0x80;
4486 break;
4487
4488 case 65:
4489 w[16] = w[16] | 0x8000;
4490 break;
4491
4492 case 66:
4493 w[16] = w[16] | 0x800000;
4494 break;
4495
4496 case 67:
4497 w[16] = w[16] | 0x80000000;
4498 break;
4499
4500 case 68:
4501 w[17] = 0x80;
4502 break;
4503
4504 case 69:
4505 w[17] = w[17] | 0x8000;
4506 break;
4507
4508 case 70:
4509 w[17] = w[17] | 0x800000;
4510 break;
4511
4512 case 71:
4513 w[17] = w[17] | 0x80000000;
4514 break;
4515
4516 case 72:
4517 w[18] = 0x80;
4518 break;
4519
4520 case 73:
4521 w[18] = w[18] | 0x8000;
4522 break;
4523
4524 case 74:
4525 w[18] = w[18] | 0x800000;
4526 break;
4527
4528 case 75:
4529 w[18] = w[18] | 0x80000000;
4530 break;
4531
4532 case 76:
4533 w[19] = 0x80;
4534 break;
4535
4536 case 77:
4537 w[19] = w[19] | 0x8000;
4538 break;
4539
4540 case 78:
4541 w[19] = w[19] | 0x800000;
4542 break;
4543
4544 case 79:
4545 w[19] = w[19] | 0x80000000;
4546 break;
4547
4548 case 80:
4549 w[20] = 0x80;
4550 break;
4551
4552 case 81:
4553 w[20] = w[20] | 0x8000;
4554 break;
4555
4556 case 82:
4557 w[20] = w[20] | 0x800000;
4558 break;
4559
4560 case 83:
4561 w[20] = w[20] | 0x80000000;
4562 break;
4563
4564 case 84:
4565 w[21] = 0x80;
4566 break;
4567
4568 case 85:
4569 w[21] = w[21] | 0x8000;
4570 break;
4571
4572 case 86:
4573 w[21] = w[21] | 0x800000;
4574 break;
4575
4576 case 87:
4577 w[21] = w[21] | 0x80000000;
4578 break;
4579
4580 case 88:
4581 w[22] = 0x80;
4582 break;
4583
4584 case 89:
4585 w[22] = w[22] | 0x8000;
4586 break;
4587
4588 case 90:
4589 w[22] = w[22] | 0x800000;
4590 break;
4591
4592 case 91:
4593 w[22] = w[22] | 0x80000000;
4594 break;
4595
4596 case 92:
4597 w[23] = 0x80;
4598 break;
4599
4600 case 93:
4601 w[23] = w[23] | 0x8000;
4602 break;
4603
4604 case 94:
4605 w[23] = w[23] | 0x800000;
4606 break;
4607
4608 case 95:
4609 w[23] = w[23] | 0x80000000;
4610 break;
4611
4612 case 96:
4613 w[24] = 0x80;
4614 break;
4615
4616 case 97:
4617 w[24] = w[24] | 0x8000;
4618 break;
4619
4620 case 98:
4621 w[24] = w[24] | 0x800000;
4622 break;
4623
4624 case 99:
4625 w[24] = w[24] | 0x80000000;
4626 break;
4627
4628 case 100:
4629 w[25] = 0x80;
4630 break;
4631
4632 case 101:
4633 w[25] = w[25] | 0x8000;
4634 break;
4635
4636 case 102:
4637 w[25] = w[25] | 0x800000;
4638 break;
4639
4640 case 103:
4641 w[25] = w[25] | 0x80000000;
4642 break;
4643
4644 case 104:
4645 w[26] = 0x80;
4646 break;
4647
4648 case 105:
4649 w[26] = w[26] | 0x8000;
4650 break;
4651
4652 case 106:
4653 w[26] = w[26] | 0x800000;
4654 break;
4655
4656 case 107:
4657 w[26] = w[26] | 0x80000000;
4658 break;
4659
4660 case 108:
4661 w[27] = 0x80;
4662 break;
4663
4664 case 109:
4665 w[27] = w[27] | 0x8000;
4666 break;
4667
4668 case 110:
4669 w[27] = w[27] | 0x800000;
4670 break;
4671
4672 case 111:
4673 w[27] = w[27] | 0x80000000;
4674 break;
4675
4676 case 112:
4677 w[28] = 0x80;
4678 break;
4679
4680 case 113:
4681 w[28] = w[28] | 0x8000;
4682 break;
4683
4684 case 114:
4685 w[28] = w[28] | 0x800000;
4686 break;
4687
4688 case 115:
4689 w[28] = w[28] | 0x80000000;
4690 break;
4691
4692 case 116:
4693 w[29] = 0x80;
4694 break;
4695
4696 case 117:
4697 w[29] = w[29] | 0x8000;
4698 break;
4699
4700 case 118:
4701 w[29] = w[29] | 0x800000;
4702 break;
4703
4704 case 119:
4705 w[29] = w[29] | 0x80000000;
4706 break;
4707
4708 case 120:
4709 w[30] = 0x80;
4710 break;
4711
4712 case 121:
4713 w[30] = w[30] | 0x8000;
4714 break;
4715
4716 case 122:
4717 w[30] = w[30] | 0x800000;
4718 break;
4719
4720 case 123:
4721 w[30] = w[30] | 0x80000000;
4722 break;
4723
4724 case 124:
4725 w[31] = 0x80;
4726 break;
4727
4728 case 125:
4729 w[31] = w[31] | 0x8000;
4730 break;
4731
4732 case 126:
4733 w[31] = w[31] | 0x800000;
4734 break;
4735
4736 case 127:
4737 w[31] = w[31] | 0x80000000;
4738 break;
4739 }
4740 }
4741
4742 static void device_memcat2L (const u32 offset, u32 dst0[2], u32 src_l0[2], u32 src_r0[2])
4743 {
4744 switch (offset)
4745 {
4746 case 1:
4747 dst0[0] = src_l0[0] | src_r0[0] << 8;
4748 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
4749 break;
4750
4751 case 2:
4752 dst0[0] = src_l0[0] | src_r0[0] << 16;
4753 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
4754 break;
4755
4756 case 3:
4757 dst0[0] = src_l0[0] | src_r0[0] << 24;
4758 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
4759 break;
4760
4761 case 4:
4762 dst0[1] = src_r0[0];
4763 break;
4764
4765 case 5:
4766 dst0[1] = src_l0[1] | src_r0[0] << 8;
4767 break;
4768
4769 case 6:
4770 dst0[1] = src_l0[1] | src_r0[0] << 16;
4771 break;
4772
4773 case 7:
4774 dst0[1] = src_l0[1] | src_r0[0] << 24;
4775 break;
4776 }
4777 }
4778
4779 static void device_memcat4L (const u32 offset, u32 dst0[4], u32 src_l0[4], u32 src_r0[4])
4780 {
4781 switch (offset)
4782 {
4783 case 1:
4784 dst0[0] = src_l0[0] | src_r0[0] << 8;
4785 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
4786 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
4787 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
4788 break;
4789
4790 case 2:
4791 dst0[0] = src_l0[0] | src_r0[0] << 16;
4792 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
4793 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
4794 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
4795 break;
4796
4797 case 3:
4798 dst0[0] = src_l0[0] | src_r0[0] << 24;
4799 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
4800 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
4801 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
4802 break;
4803
4804 case 4:
4805 dst0[1] = src_r0[0];
4806 dst0[2] = src_r0[1];
4807 dst0[3] = src_r0[2];
4808 break;
4809
4810 case 5:
4811 dst0[1] = src_l0[1] | src_r0[0] << 8;
4812 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
4813 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
4814 break;
4815
4816 case 6:
4817 dst0[1] = src_l0[1] | src_r0[0] << 16;
4818 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
4819 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
4820 break;
4821
4822 case 7:
4823 dst0[1] = src_l0[1] | src_r0[0] << 24;
4824 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
4825 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
4826 break;
4827
4828 case 8:
4829 dst0[2] = src_r0[0];
4830 dst0[3] = src_r0[1];
4831 break;
4832
4833 case 9:
4834 dst0[2] = src_l0[2] | src_r0[0] << 8;
4835 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
4836 break;
4837
4838 case 10:
4839 dst0[2] = src_l0[2] | src_r0[0] << 16;
4840 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
4841 break;
4842
4843 case 11:
4844 dst0[2] = src_l0[2] | src_r0[0] << 24;
4845 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
4846 break;
4847
4848 case 12:
4849 dst0[3] = src_r0[0];
4850 break;
4851
4852 case 13:
4853 dst0[3] = src_l0[3] | src_r0[0] << 8;
4854 break;
4855
4856 case 14:
4857 dst0[3] = src_l0[3] | src_r0[0] << 16;
4858 break;
4859
4860 case 15:
4861 dst0[3] = src_l0[3] | src_r0[0] << 24;
4862 break;
4863 }
4864 }
4865
4866 static void device_memcat8L (const u32 offset, u32 dst0[4], u32 dst1[4], u32 src_l0[4], u32 src_l1[4], u32 src_r0[4])
4867 {
4868 switch (offset)
4869 {
4870 case 1:
4871 dst0[0] = src_l0[0] | src_r0[0] << 8;
4872 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
4873 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
4874 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
4875 dst1[0] = src_r0[3] >> 24;
4876 break;
4877
4878 case 2:
4879 dst0[0] = src_l0[0] | src_r0[0] << 16;
4880 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
4881 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
4882 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
4883 dst1[0] = src_r0[3] >> 16;
4884 break;
4885
4886 case 3:
4887 dst0[0] = src_l0[0] | src_r0[0] << 24;
4888 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
4889 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
4890 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
4891 dst1[0] = src_r0[3] >> 8;
4892 break;
4893
4894 case 4:
4895 dst0[1] = src_r0[0];
4896 dst0[2] = src_r0[1];
4897 dst0[3] = src_r0[2];
4898 dst1[0] = src_r0[3];
4899 break;
4900
4901 case 5:
4902 dst0[1] = src_l0[1] | src_r0[0] << 8;
4903 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
4904 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
4905 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
4906 dst1[1] = src_r0[3] >> 24;
4907 break;
4908
4909 case 6:
4910 dst0[1] = src_l0[1] | src_r0[0] << 16;
4911 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
4912 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
4913 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
4914 dst1[1] = src_r0[3] >> 16;
4915 break;
4916
4917 case 7:
4918 dst0[1] = src_l0[1] | src_r0[0] << 24;
4919 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
4920 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
4921 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
4922 dst1[1] = src_r0[3] >> 8;
4923 break;
4924
4925 case 8:
4926 dst0[2] = src_r0[0];
4927 dst0[3] = src_r0[1];
4928 dst1[0] = src_r0[2];
4929 dst1[1] = src_r0[3];
4930 break;
4931
4932 case 9:
4933 dst0[2] = src_l0[2] | src_r0[0] << 8;
4934 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
4935 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
4936 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
4937 dst1[2] = src_r0[3] >> 24;
4938 break;
4939
4940 case 10:
4941 dst0[2] = src_l0[2] | src_r0[0] << 16;
4942 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
4943 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
4944 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
4945 dst1[2] = src_r0[3] >> 16;
4946 break;
4947
4948 case 11:
4949 dst0[2] = src_l0[2] | src_r0[0] << 24;
4950 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
4951 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
4952 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
4953 dst1[2] = src_r0[3] >> 8;
4954 break;
4955
4956 case 12:
4957 dst0[3] = src_r0[0];
4958 dst1[0] = src_r0[1];
4959 dst1[1] = src_r0[2];
4960 dst1[2] = src_r0[3];
4961 break;
4962
4963 case 13:
4964 dst0[3] = src_l0[3] | src_r0[0] << 8;
4965 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
4966 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
4967 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
4968 dst1[3] = src_r0[3] >> 24;
4969 break;
4970
4971 case 14:
4972 dst0[3] = src_l0[3] | src_r0[0] << 16;
4973 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
4974 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
4975 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
4976 dst1[3] = src_r0[3] >> 16;
4977 break;
4978
4979 case 15:
4980 dst0[3] = src_l0[3] | src_r0[0] << 24;
4981 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
4982 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
4983 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
4984 dst1[3] = src_r0[3] >> 8;
4985 break;
4986
4987 case 16:
4988 dst1[0] = src_r0[0];
4989 dst1[1] = src_r0[1];
4990 dst1[2] = src_r0[2];
4991 dst1[3] = src_r0[3];
4992 break;
4993
4994 case 17:
4995 dst1[0] = src_l1[0] | src_r0[0] << 8;
4996 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
4997 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
4998 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
4999 break;
5000
5001 case 18:
5002 dst1[0] = src_l1[0] | src_r0[0] << 16;
5003 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5004 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5005 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5006 break;
5007
5008 case 19:
5009 dst1[0] = src_l1[0] | src_r0[0] << 24;
5010 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5011 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5012 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5013 break;
5014
5015 case 20:
5016 dst1[1] = src_r0[0];
5017 dst1[2] = src_r0[1];
5018 dst1[3] = src_r0[2];
5019 break;
5020
5021 case 21:
5022 dst1[1] = src_l1[1] | src_r0[0] << 8;
5023 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5024 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5025 break;
5026
5027 case 22:
5028 dst1[1] = src_l1[1] | src_r0[0] << 16;
5029 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5030 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5031 break;
5032
5033 case 23:
5034 dst1[1] = src_l1[1] | src_r0[0] << 24;
5035 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5036 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5037 break;
5038
5039 case 24:
5040 dst1[2] = src_r0[0];
5041 dst1[3] = src_r0[1];
5042 break;
5043
5044 case 25:
5045 dst1[2] = src_l1[2] | src_r0[0] << 8;
5046 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5047 break;
5048
5049 case 26:
5050 dst1[2] = src_l1[2] | src_r0[0] << 16;
5051 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5052 break;
5053
5054 case 27:
5055 dst1[2] = src_l1[2] | src_r0[0] << 24;
5056 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5057 break;
5058
5059 case 28:
5060 dst1[3] = src_r0[0];
5061 break;
5062
5063 case 29:
5064 dst1[3] = src_l1[3] | src_r0[0] << 8;
5065 break;
5066
5067 case 30:
5068 dst1[3] = src_l1[3] | src_r0[0] << 16;
5069 break;
5070
5071 case 31:
5072 dst1[3] = src_l1[3] | src_r0[0] << 24;
5073 break;
5074 }
5075 }
5076
5077 static void device_memcat12L (const u32 offset, u32 dst0[4], u32 dst1[4], u32 dst2[4], u32 src_l0[4], u32 src_l1[4], u32 src_l2[4], u32 src_r0[4])
5078 {
5079 switch (offset)
5080 {
5081 case 1:
5082 dst0[0] = src_l0[0] | src_r0[0] << 8;
5083 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
5084 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
5085 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
5086 dst1[0] = src_r0[3] >> 24;
5087 break;
5088
5089 case 2:
5090 dst0[0] = src_l0[0] | src_r0[0] << 16;
5091 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5092 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5093 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5094 dst1[0] = src_r0[3] >> 16;
5095 break;
5096
5097 case 3:
5098 dst0[0] = src_l0[0] | src_r0[0] << 24;
5099 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5100 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5101 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5102 dst1[0] = src_r0[3] >> 8;
5103 break;
5104
5105 case 4:
5106 dst0[1] = src_r0[0];
5107 dst0[2] = src_r0[1];
5108 dst0[3] = src_r0[2];
5109 dst1[0] = src_r0[3];
5110 break;
5111
5112 case 5:
5113 dst0[1] = src_l0[1] | src_r0[0] << 8;
5114 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5115 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5116 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
5117 dst1[1] = src_r0[3] >> 24;
5118 break;
5119
5120 case 6:
5121 dst0[1] = src_l0[1] | src_r0[0] << 16;
5122 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5123 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5124 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
5125 dst1[1] = src_r0[3] >> 16;
5126 break;
5127
5128 case 7:
5129 dst0[1] = src_l0[1] | src_r0[0] << 24;
5130 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5131 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5132 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
5133 dst1[1] = src_r0[3] >> 8;
5134 break;
5135
5136 case 8:
5137 dst0[2] = src_r0[0];
5138 dst0[3] = src_r0[1];
5139 dst1[0] = src_r0[2];
5140 dst1[1] = src_r0[3];
5141 break;
5142
5143 case 9:
5144 dst0[2] = src_l0[2] | src_r0[0] << 8;
5145 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5146 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
5147 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
5148 dst1[2] = src_r0[3] >> 24;
5149 break;
5150
5151 case 10:
5152 dst0[2] = src_l0[2] | src_r0[0] << 16;
5153 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5154 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
5155 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
5156 dst1[2] = src_r0[3] >> 16;
5157 break;
5158
5159 case 11:
5160 dst0[2] = src_l0[2] | src_r0[0] << 24;
5161 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5162 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
5163 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
5164 dst1[2] = src_r0[3] >> 8;
5165 break;
5166
5167 case 12:
5168 dst0[3] = src_r0[0];
5169 dst1[0] = src_r0[1];
5170 dst1[1] = src_r0[2];
5171 dst1[2] = src_r0[3];
5172 break;
5173
5174 case 13:
5175 dst0[3] = src_l0[3] | src_r0[0] << 8;
5176 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
5177 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
5178 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
5179 dst1[3] = src_r0[3] >> 24;
5180 break;
5181
5182 case 14:
5183 dst0[3] = src_l0[3] | src_r0[0] << 16;
5184 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
5185 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
5186 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
5187 dst1[3] = src_r0[3] >> 16;
5188 break;
5189
5190 case 15:
5191 dst0[3] = src_l0[3] | src_r0[0] << 24;
5192 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
5193 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
5194 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
5195 dst1[3] = src_r0[3] >> 8;
5196 break;
5197
5198 case 16:
5199 dst1[0] = src_r0[0];
5200 dst1[1] = src_r0[1];
5201 dst1[2] = src_r0[2];
5202 dst1[3] = src_r0[3];
5203 break;
5204
5205 case 17:
5206 dst1[0] = src_l1[0] | src_r0[0] << 8;
5207 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
5208 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
5209 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
5210 dst2[0] = src_r0[3] >> 24;
5211 break;
5212
5213 case 18:
5214 dst1[0] = src_l1[0] | src_r0[0] << 16;
5215 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5216 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5217 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5218 dst2[0] = src_r0[3] >> 16;
5219 break;
5220
5221 case 19:
5222 dst1[0] = src_l1[0] | src_r0[0] << 24;
5223 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5224 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5225 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5226 dst2[0] = src_r0[3] >> 8;
5227 break;
5228
5229 case 20:
5230 dst1[1] = src_r0[0];
5231 dst1[2] = src_r0[1];
5232 dst1[3] = src_r0[2];
5233 dst2[0] = src_r0[3];
5234 break;
5235
5236 case 21:
5237 dst1[1] = src_l1[1] | src_r0[0] << 8;
5238 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5239 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5240 dst2[0] = src_r0[2] >> 24 | src_r0[3] << 8;
5241 dst2[1] = src_r0[3] >> 24;
5242 break;
5243
5244 case 22:
5245 dst1[1] = src_l1[1] | src_r0[0] << 16;
5246 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5247 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5248 dst2[0] = src_r0[2] >> 16 | src_r0[3] << 16;
5249 dst2[1] = src_r0[3] >> 16;
5250 break;
5251
5252 case 23:
5253 dst1[1] = src_l1[1] | src_r0[0] << 24;
5254 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5255 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5256 dst2[0] = src_r0[2] >> 8 | src_r0[3] << 24;
5257 dst2[1] = src_r0[3] >> 8;
5258 break;
5259
5260 case 24:
5261 dst1[2] = src_r0[0];
5262 dst1[3] = src_r0[1];
5263 dst2[0] = src_r0[2];
5264 dst2[1] = src_r0[3];
5265 break;
5266
5267 case 25:
5268 dst1[2] = src_l1[2] | src_r0[0] << 8;
5269 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5270 dst2[0] = src_r0[1] >> 24 | src_r0[2] << 8;
5271 dst2[1] = src_r0[2] >> 24 | src_r0[3] << 8;
5272 dst2[2] = src_r0[3] >> 24;
5273 break;
5274
5275 case 26:
5276 dst1[2] = src_l1[2] | src_r0[0] << 16;
5277 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5278 dst2[0] = src_r0[1] >> 16 | src_r0[2] << 16;
5279 dst2[1] = src_r0[2] >> 16 | src_r0[3] << 16;
5280 dst2[2] = src_r0[3] >> 16;
5281 break;
5282
5283 case 27:
5284 dst1[2] = src_l1[2] | src_r0[0] << 24;
5285 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5286 dst2[0] = src_r0[1] >> 8 | src_r0[2] << 24;
5287 dst2[1] = src_r0[2] >> 8 | src_r0[3] << 24;
5288 dst2[2] = src_r0[3] >> 8;
5289 break;
5290
5291 case 28:
5292 dst1[3] = src_r0[0];
5293 dst2[0] = src_r0[1];
5294 dst2[1] = src_r0[2];
5295 dst2[2] = src_r0[3];
5296 break;
5297
5298 case 29:
5299 dst1[3] = src_l1[3] | src_r0[0] << 8;
5300 dst2[0] = src_r0[0] >> 24 | src_r0[1] << 8;
5301 dst2[1] = src_r0[1] >> 24 | src_r0[2] << 8;
5302 dst2[2] = src_r0[2] >> 24 | src_r0[3] << 8;
5303 dst2[3] = src_r0[3] >> 24;
5304 break;
5305
5306 case 30:
5307 dst1[3] = src_l1[3] | src_r0[0] << 16;
5308 dst2[0] = src_r0[0] >> 16 | src_r0[1] << 16;
5309 dst2[1] = src_r0[1] >> 16 | src_r0[2] << 16;
5310 dst2[2] = src_r0[2] >> 16 | src_r0[3] << 16;
5311 dst2[3] = src_r0[3] >> 16;
5312 break;
5313
5314 case 31:
5315 dst1[3] = src_l1[3] | src_r0[0] << 24;
5316 dst2[0] = src_r0[0] >> 8 | src_r0[1] << 24;
5317 dst2[1] = src_r0[1] >> 8 | src_r0[2] << 24;
5318 dst2[2] = src_r0[2] >> 8 | src_r0[3] << 24;
5319 dst2[3] = src_r0[3] >> 8;
5320 break;
5321
5322 case 32:
5323 dst2[0] = src_r0[0];
5324 dst2[1] = src_r0[1];
5325 dst2[2] = src_r0[2];
5326 dst2[3] = src_r0[3];
5327 break;
5328
5329 case 33:
5330 dst2[0] = src_l2[0] | src_r0[0] << 8;
5331 dst2[1] = src_r0[0] >> 24 | src_r0[1] << 8;
5332 dst2[2] = src_r0[1] >> 24 | src_r0[2] << 8;
5333 dst2[3] = src_r0[2] >> 24 | src_r0[3] << 8;
5334 break;
5335
5336 case 34:
5337 dst2[0] = src_l2[0] | src_r0[0] << 16;
5338 dst2[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5339 dst2[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5340 dst2[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5341 break;
5342
5343 case 35:
5344 dst2[0] = src_l2[0] | src_r0[0] << 24;
5345 dst2[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5346 dst2[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5347 dst2[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5348 break;
5349
5350 case 36:
5351 dst2[1] = src_r0[0];
5352 dst2[2] = src_r0[1];
5353 dst2[3] = src_r0[2];
5354 break;
5355
5356 case 37:
5357 dst2[1] = src_l2[1] | src_r0[0] << 8;
5358 dst2[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5359 dst2[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5360 break;
5361
5362 case 38:
5363 dst2[1] = src_l2[1] | src_r0[0] << 16;
5364 dst2[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5365 dst2[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5366 break;
5367
5368 case 39:
5369 dst2[1] = src_l2[1] | src_r0[0] << 24;
5370 dst2[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5371 dst2[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5372 break;
5373
5374 case 40:
5375 dst2[2] = src_r0[0];
5376 dst2[3] = src_r0[1];
5377 break;
5378
5379 case 41:
5380 dst2[2] = src_l2[2] | src_r0[0] << 8;
5381 dst2[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5382 break;
5383
5384 case 42:
5385 dst2[2] = src_l2[2] | src_r0[0] << 16;
5386 dst2[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5387 break;
5388
5389 case 43:
5390 dst2[2] = src_l2[2] | src_r0[0] << 24;
5391 dst2[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5392 break;
5393
5394 case 44:
5395 dst2[3] = src_r0[0];
5396 break;
5397
5398 case 45:
5399 dst2[3] = src_l2[3] | src_r0[0] << 8;
5400 break;
5401
5402 case 46:
5403 dst2[3] = src_l2[3] | src_r0[0] << 16;
5404 break;
5405
5406 case 47:
5407 dst2[3] = src_l2[3] | src_r0[0] << 24;
5408 break;
5409 }
5410 }
5411
5412 static void device_memcat12L (const u32 offset, u32 dst0[4], u32 dst1[4], u32 dst2[4], u32 src_l0[4], u32 src_l1[4], u32 src_l2[4], u32 src_r0[4], u32 src_r1[4])
5413 {
5414 switch (offset)
5415 {
5416 case 0:
5417 dst0[0] = src_r0[0];
5418 dst0[1] = src_r0[1];
5419 dst0[2] = src_r0[2];
5420 dst0[3] = src_r0[3];
5421 dst1[0] = src_r1[0];
5422 dst1[1] = src_r1[1];
5423 dst1[2] = src_r1[2];
5424 dst1[3] = src_r1[3];
5425 break;
5426
5427 case 1:
5428 dst0[0] = src_l0[0] | src_r0[0] << 8;
5429 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
5430 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
5431 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
5432 dst1[0] = src_r0[3] >> 24 | src_r1[0] << 8;
5433 dst1[1] = src_r1[0] >> 24 | src_r1[1] << 8;
5434 dst1[2] = src_r1[1] >> 24 | src_r1[2] << 8;
5435 dst1[3] = src_r1[2] >> 24 | src_r1[3] << 8;
5436 dst2[0] = src_r1[3] >> 24;
5437 break;
5438
5439 case 2:
5440 dst0[0] = src_l0[0] | src_r0[0] << 16;
5441 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5442 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5443 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5444 dst1[0] = src_r0[3] >> 16 | src_r1[0] << 16;
5445 dst1[1] = src_r1[0] >> 16 | src_r1[1] << 16;
5446 dst1[2] = src_r1[1] >> 16 | src_r1[2] << 16;
5447 dst1[3] = src_r1[2] >> 16 | src_r1[3] << 16;
5448 dst2[0] = src_r1[3] >> 16;
5449 break;
5450
5451 case 3:
5452 dst0[0] = src_l0[0] | src_r0[0] << 24;
5453 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5454 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5455 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5456 dst1[0] = src_r0[3] >> 8 | src_r1[0] << 24;
5457 dst1[1] = src_r1[0] >> 8 | src_r1[1] << 24;
5458 dst1[2] = src_r1[1] >> 8 | src_r1[2] << 24;
5459 dst1[3] = src_r1[2] >> 8 | src_r1[3] << 24;
5460 dst2[0] = src_r1[3] >> 8;
5461 break;
5462
5463 case 4:
5464 dst0[1] = src_r0[0];
5465 dst0[2] = src_r0[1];
5466 dst0[3] = src_r0[2];
5467 dst1[0] = src_r0[3];
5468 dst1[1] = src_r1[0];
5469 dst1[2] = src_r1[1];
5470 dst1[3] = src_r1[2];
5471 dst2[0] = src_r1[3];
5472 break;
5473
5474 case 5:
5475 dst0[1] = src_l0[1] | src_r0[0] << 8;
5476 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5477 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5478 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
5479 dst1[1] = src_r0[3] >> 24 | src_r1[0] << 8;
5480 dst1[2] = src_r1[0] >> 24 | src_r1[1] << 8;
5481 dst1[3] = src_r1[1] >> 24 | src_r1[2] << 8;
5482 dst2[0] = src_r1[2] >> 24 | src_r1[3] << 8;
5483 dst2[1] = src_r1[3] >> 24;
5484 break;
5485
5486 case 6:
5487 dst0[1] = src_l0[1] | src_r0[0] << 16;
5488 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5489 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5490 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
5491 dst1[1] = src_r0[3] >> 16 | src_r1[0] << 16;
5492 dst1[2] = src_r1[0] >> 16 | src_r1[1] << 16;
5493 dst1[3] = src_r1[1] >> 16 | src_r1[2] << 16;
5494 dst2[0] = src_r1[2] >> 16 | src_r1[3] << 16;
5495 dst2[1] = src_r1[3] >> 16;
5496 break;
5497
5498 case 7:
5499 dst0[1] = src_l0[1] | src_r0[0] << 24;
5500 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5501 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5502 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
5503 dst1[1] = src_r0[3] >> 8 | src_r1[0] << 24;
5504 dst1[2] = src_r1[0] >> 8 | src_r1[1] << 24;
5505 dst1[3] = src_r1[1] >> 8 | src_r1[2] << 24;
5506 dst2[0] = src_r1[2] >> 8 | src_r1[3] << 24;
5507 dst2[1] = src_r1[3] >> 8;
5508 break;
5509
5510 case 8:
5511 dst0[2] = src_r0[0];
5512 dst0[3] = src_r0[1];
5513 dst1[0] = src_r0[2];
5514 dst1[1] = src_r0[3];
5515 dst1[2] = src_r1[0];
5516 dst1[3] = src_r1[1];
5517 dst2[0] = src_r1[2];
5518 dst2[1] = src_r1[3];
5519 break;
5520
5521 case 9:
5522 dst0[2] = src_l0[2] | src_r0[0] << 8;
5523 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5524 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
5525 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
5526 dst1[2] = src_r0[3] >> 24 | src_r1[0] << 8;
5527 dst1[3] = src_r1[0] >> 24 | src_r1[1] << 8;
5528 dst2[0] = src_r1[1] >> 24 | src_r1[2] << 8;
5529 dst2[1] = src_r1[2] >> 24 | src_r1[3] << 8;
5530 dst2[2] = src_r1[3] >> 24;
5531 break;
5532
5533 case 10:
5534 dst0[2] = src_l0[2] | src_r0[0] << 16;
5535 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5536 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
5537 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
5538 dst1[2] = src_r0[3] >> 16 | src_r1[0] << 16;
5539 dst1[3] = src_r1[0] >> 16 | src_r1[1] << 16;
5540 dst2[0] = src_r1[1] >> 16 | src_r1[2] << 16;
5541 dst2[1] = src_r1[2] >> 16 | src_r1[3] << 16;
5542 dst2[2] = src_r1[3] >> 16;
5543 break;
5544
5545 case 11:
5546 dst0[2] = src_l0[2] | src_r0[0] << 24;
5547 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5548 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
5549 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
5550 dst1[2] = src_r0[3] >> 8 | src_r1[0] << 24;
5551 dst1[3] = src_r1[0] >> 8 | src_r1[1] << 24;
5552 dst2[0] = src_r1[1] >> 8 | src_r1[2] << 24;
5553 dst2[1] = src_r1[2] >> 8 | src_r1[3] << 24;
5554 dst2[2] = src_r1[3] >> 8;
5555 break;
5556
5557 case 12:
5558 dst0[3] = src_r0[0];
5559 dst1[0] = src_r0[1];
5560 dst1[1] = src_r0[2];
5561 dst1[2] = src_r0[3];
5562 dst1[3] = src_r1[0];
5563 dst2[0] = src_r1[1];
5564 dst2[1] = src_r1[2];
5565 dst2[2] = src_r1[3];
5566 break;
5567
5568 case 13:
5569 dst0[3] = src_l0[3] | src_r0[0] << 8;
5570 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
5571 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
5572 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
5573 dst1[3] = src_r0[3] >> 24 | src_r1[0] << 8;
5574 dst2[0] = src_r1[0] >> 24 | src_r1[1] << 8;
5575 dst2[1] = src_r1[1] >> 24 | src_r1[2] << 8;
5576 dst2[2] = src_r1[2] >> 24 | src_r1[3] << 8;
5577 dst2[3] = src_r1[3] >> 24;
5578 break;
5579
5580 case 14:
5581 dst0[3] = src_l0[3] | src_r0[0] << 16;
5582 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
5583 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
5584 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
5585 dst1[3] = src_r0[3] >> 16 | src_r1[0] << 16;
5586 dst2[0] = src_r1[0] >> 16 | src_r1[1] << 16;
5587 dst2[1] = src_r1[1] >> 16 | src_r1[2] << 16;
5588 dst2[2] = src_r1[2] >> 16 | src_r1[3] << 16;
5589 dst2[3] = src_r1[3] >> 16;
5590 break;
5591
5592 case 15:
5593 dst0[3] = src_l0[3] | src_r0[0] << 24;
5594 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
5595 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
5596 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
5597 dst1[3] = src_r0[3] >> 8 | src_r1[0] << 24;
5598 dst2[0] = src_r1[0] >> 8 | src_r1[1] << 24;
5599 dst2[1] = src_r1[1] >> 8 | src_r1[2] << 24;
5600 dst2[2] = src_r1[2] >> 8 | src_r1[3] << 24;
5601 dst2[3] = src_r1[3] >> 8;
5602 break;
5603
5604 case 16:
5605 dst1[0] = src_r0[0];
5606 dst1[1] = src_r0[1];
5607 dst1[2] = src_r0[2];
5608 dst1[3] = src_r0[3];
5609 dst2[0] = src_r1[0];
5610 dst2[1] = src_r1[1];
5611 dst2[2] = src_r1[2];
5612 dst2[3] = src_r1[3];
5613 break;
5614
5615 case 17:
5616 dst1[0] = src_l1[0] | src_r0[0] << 8;
5617 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
5618 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
5619 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
5620 dst2[0] = src_r0[3] >> 24 | src_r1[0] << 8;
5621 dst2[1] = src_r1[0] >> 24 | src_r1[1] << 8;
5622 dst2[2] = src_r1[1] >> 24 | src_r1[2] << 8;
5623 dst2[3] = src_r1[2] >> 24 | src_r1[3] << 8;
5624 break;
5625
5626 case 18:
5627 dst1[0] = src_l1[0] | src_r0[0] << 16;
5628 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5629 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5630 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5631 dst2[0] = src_r0[3] >> 16 | src_r1[0] << 16;
5632 dst2[1] = src_r1[0] >> 16 | src_r1[1] << 16;
5633 dst2[2] = src_r1[1] >> 16 | src_r1[2] << 16;
5634 dst2[3] = src_r1[2] >> 16 | src_r1[3] << 16;
5635 break;
5636
5637 case 19:
5638 dst1[0] = src_l1[0] | src_r0[0] << 24;
5639 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5640 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5641 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5642 dst2[0] = src_r0[3] >> 8 | src_r1[0] << 24;
5643 dst2[1] = src_r1[0] >> 8 | src_r1[1] << 24;
5644 dst2[2] = src_r1[1] >> 8 | src_r1[2] << 24;
5645 dst2[3] = src_r1[2] >> 8 | src_r1[3] << 24;
5646 break;
5647
5648 case 20:
5649 dst1[1] = src_r1[0];
5650 dst1[2] = src_r0[1];
5651 dst1[3] = src_r0[2];
5652 dst2[0] = src_r0[3];
5653 dst2[1] = src_r1[0];
5654 dst2[2] = src_r1[1];
5655 dst2[3] = src_r1[2];
5656 break;
5657
5658 case 21:
5659 dst1[1] = src_l1[1] | src_r0[0] << 8;
5660 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5661 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5662 dst2[0] = src_r0[2] >> 24 | src_r0[3] << 8;
5663 dst2[1] = src_r0[3] >> 24 | src_r1[0] << 8;
5664 dst2[2] = src_r1[0] >> 24 | src_r1[1] << 8;
5665 dst2[3] = src_r1[1] >> 24 | src_r1[2] << 8;
5666 break;
5667
5668 case 22:
5669 dst1[1] = src_l1[1] | src_r0[0] << 16;
5670 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5671 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5672 dst2[0] = src_r0[2] >> 16 | src_r0[3] << 16;
5673 dst2[1] = src_r0[3] >> 16 | src_r1[0] << 16;
5674 dst2[2] = src_r1[0] >> 16 | src_r1[1] << 16;
5675 dst2[3] = src_r1[1] >> 16 | src_r1[2] << 16;
5676 break;
5677
5678 case 23:
5679 dst1[1] = src_l1[1] | src_r0[0] << 24;
5680 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5681 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5682 dst2[0] = src_r0[2] >> 8 | src_r0[3] << 24;
5683 dst2[1] = src_r0[3] >> 8 | src_r1[0] << 24;
5684 dst2[2] = src_r1[0] >> 8 | src_r1[1] << 24;
5685 dst2[3] = src_r1[1] >> 8 | src_r1[2] << 24;
5686 break;
5687
5688 case 24:
5689 dst1[2] = src_r1[0];
5690 dst1[3] = src_r0[1];
5691 dst2[0] = src_r0[2];
5692 dst2[1] = src_r0[3];
5693 dst2[2] = src_r1[0];
5694 dst2[3] = src_r1[1];
5695 break;
5696
5697 case 25:
5698 dst1[2] = src_l1[2] | src_r0[0] << 8;
5699 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5700 dst2[0] = src_r0[1] >> 24 | src_r0[2] << 8;
5701 dst2[1] = src_r0[2] >> 24 | src_r0[3] << 8;
5702 dst2[2] = src_r0[3] >> 24 | src_r1[0] << 8;
5703 dst2[3] = src_r1[0] >> 24 | src_r1[1] << 8;
5704 break;
5705
5706 case 26:
5707 dst1[2] = src_l1[2] | src_r0[0] << 16;
5708 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5709 dst2[0] = src_r0[1] >> 16 | src_r0[2] << 16;
5710 dst2[1] = src_r0[2] >> 16 | src_r0[3] << 16;
5711 dst2[2] = src_r0[3] >> 16 | src_r1[0] << 16;
5712 dst2[3] = src_r1[0] >> 16 | src_r1[1] << 16;
5713 break;
5714
5715 case 27:
5716 dst1[2] = src_l1[2] | src_r0[0] << 24;
5717 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5718 dst2[0] = src_r0[1] >> 8 | src_r0[2] << 24;
5719 dst2[1] = src_r0[2] >> 8 | src_r0[3] << 24;
5720 dst2[2] = src_r0[3] >> 8 | src_r1[0] << 24;
5721 dst2[3] = src_r1[0] >> 8 | src_r1[1] << 24;
5722 break;
5723
5724 case 28:
5725 dst1[3] = src_r1[0];
5726 dst2[0] = src_r0[1];
5727 dst2[1] = src_r0[2];
5728 dst2[2] = src_r0[3];
5729 dst2[3] = src_r1[0];
5730 break;
5731
5732 case 29:
5733 dst1[3] = src_l1[3] | src_r0[0] << 8;
5734 dst2[0] = src_r0[0] >> 24 | src_r0[1] << 8;
5735 dst2[1] = src_r0[1] >> 24 | src_r0[2] << 8;
5736 dst2[2] = src_r0[2] >> 24 | src_r0[3] << 8;
5737 dst2[3] = src_r0[3] >> 24 | src_r1[0] << 8;
5738 break;
5739
5740 case 30:
5741 dst1[3] = src_l1[3] | src_r0[0] << 16;
5742 dst2[0] = src_r0[0] >> 16 | src_r0[1] << 16;
5743 dst2[1] = src_r0[1] >> 16 | src_r0[2] << 16;
5744 dst2[2] = src_r0[2] >> 16 | src_r0[3] << 16;
5745 dst2[3] = src_r0[3] >> 16 | src_r1[0] << 16;
5746 break;
5747
5748 case 31:
5749 dst1[3] = src_l1[3] | src_r0[0] << 24;
5750 dst2[0] = src_r0[0] >> 8 | src_r0[1] << 24;
5751 dst2[1] = src_r0[1] >> 8 | src_r0[2] << 24;
5752 dst2[2] = src_r0[2] >> 8 | src_r0[3] << 24;
5753 dst2[3] = src_r0[3] >> 8 | src_r1[0] << 24;
5754 break;
5755
5756 case 32:
5757 dst2[0] = src_r0[0];
5758 dst2[1] = src_r0[1];
5759 dst2[2] = src_r0[2];
5760 dst2[3] = src_r0[3];
5761 break;
5762
5763 case 33:
5764 dst2[0] = src_l2[0] | src_r0[0] << 8;
5765 dst2[1] = src_r0[0] >> 24 | src_r0[1] << 8;
5766 dst2[2] = src_r0[1] >> 24 | src_r0[2] << 8;
5767 dst2[3] = src_r0[2] >> 24 | src_r0[3] << 8;
5768 break;
5769
5770 case 34:
5771 dst2[0] = src_l2[0] | src_r0[0] << 16;
5772 dst2[1] = src_r0[0] >> 16 | src_r0[1] << 16;
5773 dst2[2] = src_r0[1] >> 16 | src_r0[2] << 16;
5774 dst2[3] = src_r0[2] >> 16 | src_r0[3] << 16;
5775 break;
5776
5777 case 35:
5778 dst2[0] = src_l2[0] | src_r0[0] << 24;
5779 dst2[1] = src_r0[0] >> 8 | src_r0[1] << 24;
5780 dst2[2] = src_r0[1] >> 8 | src_r0[2] << 24;
5781 dst2[3] = src_r0[2] >> 8 | src_r0[3] << 24;
5782 break;
5783
5784 case 36:
5785 dst2[1] = src_r0[0];
5786 dst2[2] = src_r0[1];
5787 dst2[3] = src_r0[2];
5788 break;
5789
5790 case 37:
5791 dst2[1] = src_l2[1] | src_r0[0] << 8;
5792 dst2[2] = src_r0[0] >> 24 | src_r0[1] << 8;
5793 dst2[3] = src_r0[1] >> 24 | src_r0[2] << 8;
5794 break;
5795
5796 case 38:
5797 dst2[1] = src_l2[1] | src_r0[0] << 16;
5798 dst2[2] = src_r0[0] >> 16 | src_r0[1] << 16;
5799 dst2[3] = src_r0[1] >> 16 | src_r0[2] << 16;
5800 break;
5801
5802 case 39:
5803 dst2[1] = src_l2[1] | src_r0[0] << 24;
5804 dst2[2] = src_r0[0] >> 8 | src_r0[1] << 24;
5805 dst2[3] = src_r0[1] >> 8 | src_r0[2] << 24;
5806 break;
5807
5808 case 40:
5809 dst2[2] = src_r0[0];
5810 dst2[3] = src_r0[1];
5811 break;
5812
5813 case 41:
5814 dst2[2] = src_l2[2] | src_r0[0] << 8;
5815 dst2[3] = src_r0[0] >> 24 | src_r0[1] << 8;
5816 break;
5817
5818 case 42:
5819 dst2[2] = src_l2[2] | src_r0[0] << 16;
5820 dst2[3] = src_r0[0] >> 16 | src_r0[1] << 16;
5821 break;
5822
5823 case 43:
5824 dst2[2] = src_l2[2] | src_r0[0] << 24;
5825 dst2[3] = src_r0[0] >> 8 | src_r0[1] << 24;
5826 break;
5827
5828 case 44:
5829 dst2[3] = src_r0[0];
5830 break;
5831
5832 case 45:
5833 dst2[3] = src_l2[3] | src_r0[0] << 8;
5834 break;
5835
5836 case 46:
5837 dst2[3] = src_l2[3] | src_r0[0] << 16;
5838 break;
5839
5840 case 47:
5841 dst2[3] = src_l2[3] | src_r0[0] << 24;
5842 break;
5843 }
5844 }
5845
5846 static void memcat16_9 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 append0[4], const u32 append1[4], const u32 append2[4], const u32 offset)
5847 {
5848 switch (offset)
5849 {
5850 case 0:
5851 w0[0] = append0[0];
5852 w0[1] = append0[1];
5853 w0[2] = append0[2];
5854 w0[3] = append0[3];
5855 w1[0] = append1[0];
5856 w1[1] = append1[1];
5857 w1[2] = append1[2];
5858 w1[3] = append1[3];
5859 w2[0] = append2[0];
5860 break;
5861
5862 case 1:
5863 w0[0] = w0[0] | append0[0] << 8;
5864 w0[1] = append0[0] >> 24 | append0[1] << 8;
5865 w0[2] = append0[1] >> 24 | append0[2] << 8;
5866 w0[3] = append0[2] >> 24 | append0[3] << 8;
5867 w1[0] = append0[3] >> 24 | append1[0] << 8;
5868 w1[1] = append1[0] >> 24 | append1[1] << 8;
5869 w1[2] = append1[1] >> 24 | append1[2] << 8;
5870 w1[3] = append1[2] >> 24 | append1[3] << 8;
5871 w2[0] = append1[3] >> 24 | append2[0] << 8;
5872 w2[1] = append2[0] >> 24;
5873 break;
5874
5875 case 2:
5876 w0[0] = w0[0] | append0[0] << 16;
5877 w0[1] = append0[0] >> 16 | append0[1] << 16;
5878 w0[2] = append0[1] >> 16 | append0[2] << 16;
5879 w0[3] = append0[2] >> 16 | append0[3] << 16;
5880 w1[0] = append0[3] >> 16 | append1[0] << 16;
5881 w1[1] = append1[0] >> 16 | append1[1] << 16;
5882 w1[2] = append1[1] >> 16 | append1[2] << 16;
5883 w1[3] = append1[2] >> 16 | append1[3] << 16;
5884 w2[0] = append1[3] >> 16 | append2[0] << 16;
5885 w2[1] = append2[0] >> 16;
5886 break;
5887
5888 case 3:
5889 w0[0] = w0[0] | append0[0] << 24;
5890 w0[1] = append0[0] >> 8 | append0[1] << 24;
5891 w0[2] = append0[1] >> 8 | append0[2] << 24;
5892 w0[3] = append0[2] >> 8 | append0[3] << 24;
5893 w1[0] = append0[3] >> 8 | append1[0] << 24;
5894 w1[1] = append1[0] >> 8 | append1[1] << 24;
5895 w1[2] = append1[1] >> 8 | append1[2] << 24;
5896 w1[3] = append1[2] >> 8 | append1[3] << 24;
5897 w2[0] = append1[3] >> 8 | append2[0] << 24;
5898 w2[1] = append2[0] >> 8;
5899 break;
5900
5901 case 4:
5902 w0[1] = append0[0];
5903 w0[2] = append0[1];
5904 w0[3] = append0[2];
5905 w1[0] = append0[3];
5906 w1[1] = append1[0];
5907 w1[2] = append1[1];
5908 w1[3] = append1[2];
5909 w2[0] = append1[3];
5910 w2[1] = append2[0];
5911 break;
5912
5913 case 5:
5914 w0[1] = w0[1] | append0[0] << 8;
5915 w0[2] = append0[0] >> 24 | append0[1] << 8;
5916 w0[3] = append0[1] >> 24 | append0[2] << 8;
5917 w1[0] = append0[2] >> 24 | append0[3] << 8;
5918 w1[1] = append0[3] >> 24 | append1[0] << 8;
5919 w1[2] = append1[0] >> 24 | append1[1] << 8;
5920 w1[3] = append1[1] >> 24 | append1[2] << 8;
5921 w2[0] = append1[2] >> 24 | append1[3] << 8;
5922 w2[1] = append1[3] >> 24 | append2[0] << 8;
5923 w2[2] = append2[0] >> 24;
5924 break;
5925
5926 case 6:
5927 w0[1] = w0[1] | append0[0] << 16;
5928 w0[2] = append0[0] >> 16 | append0[1] << 16;
5929 w0[3] = append0[1] >> 16 | append0[2] << 16;
5930 w1[0] = append0[2] >> 16 | append0[3] << 16;
5931 w1[1] = append0[3] >> 16 | append1[0] << 16;
5932 w1[2] = append1[0] >> 16 | append1[1] << 16;
5933 w1[3] = append1[1] >> 16 | append1[2] << 16;
5934 w2[0] = append1[2] >> 16 | append1[3] << 16;
5935 w2[1] = append1[3] >> 16 | append2[0] << 16;
5936 w2[2] = append2[0] >> 16;
5937 break;
5938
5939 case 7:
5940 w0[1] = w0[1] | append0[0] << 24;
5941 w0[2] = append0[0] >> 8 | append0[1] << 24;
5942 w0[3] = append0[1] >> 8 | append0[2] << 24;
5943 w1[0] = append0[2] >> 8 | append0[3] << 24;
5944 w1[1] = append0[3] >> 8 | append1[0] << 24;
5945 w1[2] = append1[0] >> 8 | append1[1] << 24;
5946 w1[3] = append1[1] >> 8 | append1[2] << 24;
5947 w2[0] = append1[2] >> 8 | append1[3] << 24;
5948 w2[1] = append1[3] >> 8 | append2[0] << 24;
5949 w2[2] = append2[0] >> 8;
5950 break;
5951
5952 case 8:
5953 w0[2] = append0[0];
5954 w0[3] = append0[1];
5955 w1[0] = append0[2];
5956 w1[1] = append0[3];
5957 w1[2] = append1[0];
5958 w1[3] = append1[1];
5959 w2[0] = append1[2];
5960 w2[1] = append1[3];
5961 w2[2] = append2[0];
5962 break;
5963
5964 case 9:
5965 w0[2] = w0[2] | append0[0] << 8;
5966 w0[3] = append0[0] >> 24 | append0[1] << 8;
5967 w1[0] = append0[1] >> 24 | append0[2] << 8;
5968 w1[1] = append0[2] >> 24 | append0[3] << 8;
5969 w1[2] = append0[3] >> 24 | append1[0] << 8;
5970 w1[3] = append1[0] >> 24 | append1[1] << 8;
5971 w2[0] = append1[1] >> 24 | append1[2] << 8;
5972 w2[1] = append1[2] >> 24 | append1[3] << 8;
5973 w2[2] = append1[3] >> 24 | append2[0] << 8;
5974 w2[3] = append2[0] >> 24;
5975 break;
5976
5977 case 10:
5978 w0[2] = w0[2] | append0[0] << 16;
5979 w0[3] = append0[0] >> 16 | append0[1] << 16;
5980 w1[0] = append0[1] >> 16 | append0[2] << 16;
5981 w1[1] = append0[2] >> 16 | append0[3] << 16;
5982 w1[2] = append0[3] >> 16 | append1[0] << 16;
5983 w1[3] = append1[0] >> 16 | append1[1] << 16;
5984 w2[0] = append1[1] >> 16 | append1[2] << 16;
5985 w2[1] = append1[2] >> 16 | append1[3] << 16;
5986 w2[2] = append1[3] >> 16 | append2[0] << 16;
5987 w2[3] = append2[0] >> 16;
5988 break;
5989
5990 case 11:
5991 w0[2] = w0[2] | append0[0] << 24;
5992 w0[3] = append0[0] >> 8 | append0[1] << 24;
5993 w1[0] = append0[1] >> 8 | append0[2] << 24;
5994 w1[1] = append0[2] >> 8 | append0[3] << 24;
5995 w1[2] = append0[3] >> 8 | append1[0] << 24;
5996 w1[3] = append1[0] >> 8 | append1[1] << 24;
5997 w2[0] = append1[1] >> 8 | append1[2] << 24;
5998 w2[1] = append1[2] >> 8 | append1[3] << 24;
5999 w2[2] = append1[3] >> 8 | append2[0] << 24;
6000 w2[3] = append2[0] >> 8;
6001 break;
6002
6003 case 12:
6004 w0[3] = append0[0];
6005 w1[0] = append0[1];
6006 w1[1] = append0[2];
6007 w1[2] = append0[3];
6008 w1[3] = append1[0];
6009 w2[0] = append1[1];
6010 w2[1] = append1[2];
6011 w2[2] = append1[3];
6012 w2[3] = append2[0];
6013 break;
6014
6015 case 13:
6016 w0[3] = w0[3] | append0[0] << 8;
6017 w1[0] = append0[0] >> 24 | append0[1] << 8;
6018 w1[1] = append0[1] >> 24 | append0[2] << 8;
6019 w1[2] = append0[2] >> 24 | append0[3] << 8;
6020 w1[3] = append0[3] >> 24 | append1[0] << 8;
6021 w2[0] = append1[0] >> 24 | append1[1] << 8;
6022 w2[1] = append1[1] >> 24 | append1[2] << 8;
6023 w2[2] = append1[2] >> 24 | append1[3] << 8;
6024 w2[3] = append1[3] >> 24 | append2[0] << 8;
6025 w3[0] = append2[0] >> 24;
6026 break;
6027
6028 case 14:
6029 w0[3] = w0[3] | append0[0] << 16;
6030 w1[0] = append0[0] >> 16 | append0[1] << 16;
6031 w1[1] = append0[1] >> 16 | append0[2] << 16;
6032 w1[2] = append0[2] >> 16 | append0[3] << 16;
6033 w1[3] = append0[3] >> 16 | append1[0] << 16;
6034 w2[0] = append1[0] >> 16 | append1[1] << 16;
6035 w2[1] = append1[1] >> 16 | append1[2] << 16;
6036 w2[2] = append1[2] >> 16 | append1[3] << 16;
6037 w2[3] = append1[3] >> 16 | append2[0] << 16;
6038 w3[0] = append2[0] >> 16;
6039 break;
6040
6041 case 15:
6042 w0[3] = w0[3] | append0[0] << 24;
6043 w1[0] = append0[0] >> 8 | append0[1] << 24;
6044 w1[1] = append0[1] >> 8 | append0[2] << 24;
6045 w1[2] = append0[2] >> 8 | append0[3] << 24;
6046 w1[3] = append0[3] >> 8 | append1[0] << 24;
6047 w2[0] = append1[0] >> 8 | append1[1] << 24;
6048 w2[1] = append1[1] >> 8 | append1[2] << 24;
6049 w2[2] = append1[2] >> 8 | append1[3] << 24;
6050 w2[3] = append1[3] >> 8 | append2[0] << 24;
6051 w3[0] = append2[0] >> 8;
6052 break;
6053 }
6054 }
6055
6056 static void memcat32_8 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 append0[4], const u32 append1[4], const u32 offset)
6057 {
6058 switch (offset)
6059 {
6060 case 0:
6061 w0[0] = append0[0];
6062 w0[1] = append0[1];
6063 w0[2] = append0[2];
6064 w0[3] = append0[3];
6065 w1[0] = append1[0];
6066 w1[1] = append1[1];
6067 w1[2] = append1[2];
6068 w1[3] = append1[3];
6069 break;
6070
6071 case 1:
6072 w0[0] = w0[0] | append0[0] << 8;
6073 w0[1] = append0[0] >> 24 | append0[1] << 8;
6074 w0[2] = append0[1] >> 24 | append0[2] << 8;
6075 w0[3] = append0[2] >> 24 | append0[3] << 8;
6076 w1[0] = append0[3] >> 24 | append1[0] << 8;
6077 w1[1] = append1[0] >> 24 | append1[1] << 8;
6078 w1[2] = append1[1] >> 24 | append1[2] << 8;
6079 w1[3] = append1[2] >> 24 | append1[3] << 8;
6080 w2[0] = append1[3] >> 24;
6081 break;
6082
6083 case 2:
6084 w0[0] = w0[0] | append0[0] << 16;
6085 w0[1] = append0[0] >> 16 | append0[1] << 16;
6086 w0[2] = append0[1] >> 16 | append0[2] << 16;
6087 w0[3] = append0[2] >> 16 | append0[3] << 16;
6088 w1[0] = append0[3] >> 16 | append1[0] << 16;
6089 w1[1] = append1[0] >> 16 | append1[1] << 16;
6090 w1[2] = append1[1] >> 16 | append1[2] << 16;
6091 w1[3] = append1[2] >> 16 | append1[3] << 16;
6092 w2[0] = append1[3] >> 16;
6093 break;
6094
6095 case 3:
6096 w0[0] = w0[0] | append0[0] << 24;
6097 w0[1] = append0[0] >> 8 | append0[1] << 24;
6098 w0[2] = append0[1] >> 8 | append0[2] << 24;
6099 w0[3] = append0[2] >> 8 | append0[3] << 24;
6100 w1[0] = append0[3] >> 8 | append1[0] << 24;
6101 w1[1] = append1[0] >> 8 | append1[1] << 24;
6102 w1[2] = append1[1] >> 8 | append1[2] << 24;
6103 w1[3] = append1[2] >> 8 | append1[3] << 24;
6104 w2[0] = append1[3] >> 8;
6105 break;
6106
6107 case 4:
6108 w0[1] = append0[0];
6109 w0[2] = append0[1];
6110 w0[3] = append0[2];
6111 w1[0] = append0[3];
6112 w1[1] = append1[0];
6113 w1[2] = append1[1];
6114 w1[3] = append1[2];
6115 w2[0] = append1[3];
6116 break;
6117
6118 case 5:
6119 w0[1] = w0[1] | append0[0] << 8;
6120 w0[2] = append0[0] >> 24 | append0[1] << 8;
6121 w0[3] = append0[1] >> 24 | append0[2] << 8;
6122 w1[0] = append0[2] >> 24 | append0[3] << 8;
6123 w1[1] = append0[3] >> 24 | append1[0] << 8;
6124 w1[2] = append1[0] >> 24 | append1[1] << 8;
6125 w1[3] = append1[1] >> 24 | append1[2] << 8;
6126 w2[0] = append1[2] >> 24 | append1[3] << 8;
6127 w2[1] = append1[3] >> 24;
6128 break;
6129
6130 case 6:
6131 w0[1] = w0[1] | append0[0] << 16;
6132 w0[2] = append0[0] >> 16 | append0[1] << 16;
6133 w0[3] = append0[1] >> 16 | append0[2] << 16;
6134 w1[0] = append0[2] >> 16 | append0[3] << 16;
6135 w1[1] = append0[3] >> 16 | append1[0] << 16;
6136 w1[2] = append1[0] >> 16 | append1[1] << 16;
6137 w1[3] = append1[1] >> 16 | append1[2] << 16;
6138 w2[0] = append1[2] >> 16 | append1[3] << 16;
6139 w2[1] = append1[3] >> 16;
6140 break;
6141
6142 case 7:
6143 w0[1] = w0[1] | append0[0] << 24;
6144 w0[2] = append0[0] >> 8 | append0[1] << 24;
6145 w0[3] = append0[1] >> 8 | append0[2] << 24;
6146 w1[0] = append0[2] >> 8 | append0[3] << 24;
6147 w1[1] = append0[3] >> 8 | append1[0] << 24;
6148 w1[2] = append1[0] >> 8 | append1[1] << 24;
6149 w1[3] = append1[1] >> 8 | append1[2] << 24;
6150 w2[0] = append1[2] >> 8 | append1[3] << 24;
6151 w2[1] = append1[3] >> 8;
6152 break;
6153
6154 case 8:
6155 w0[2] = append0[0];
6156 w0[3] = append0[1];
6157 w1[0] = append0[2];
6158 w1[1] = append0[3];
6159 w1[2] = append1[0];
6160 w1[3] = append1[1];
6161 w2[0] = append1[2];
6162 w2[1] = append1[3];
6163 break;
6164
6165 case 9:
6166 w0[2] = w0[2] | append0[0] << 8;
6167 w0[3] = append0[0] >> 24 | append0[1] << 8;
6168 w1[0] = append0[1] >> 24 | append0[2] << 8;
6169 w1[1] = append0[2] >> 24 | append0[3] << 8;
6170 w1[2] = append0[3] >> 24 | append1[0] << 8;
6171 w1[3] = append1[0] >> 24 | append1[1] << 8;
6172 w2[0] = append1[1] >> 24 | append1[2] << 8;
6173 w2[1] = append1[2] >> 24 | append1[3] << 8;
6174 w2[2] = append1[3] >> 24;
6175 break;
6176
6177 case 10:
6178 w0[2] = w0[2] | append0[0] << 16;
6179 w0[3] = append0[0] >> 16 | append0[1] << 16;
6180 w1[0] = append0[1] >> 16 | append0[2] << 16;
6181 w1[1] = append0[2] >> 16 | append0[3] << 16;
6182 w1[2] = append0[3] >> 16 | append1[0] << 16;
6183 w1[3] = append1[0] >> 16 | append1[1] << 16;
6184 w2[0] = append1[1] >> 16 | append1[2] << 16;
6185 w2[1] = append1[2] >> 16 | append1[3] << 16;
6186 w2[2] = append1[3] >> 16;
6187 break;
6188
6189 case 11:
6190 w0[2] = w0[2] | append0[0] << 24;
6191 w0[3] = append0[0] >> 8 | append0[1] << 24;
6192 w1[0] = append0[1] >> 8 | append0[2] << 24;
6193 w1[1] = append0[2] >> 8 | append0[3] << 24;
6194 w1[2] = append0[3] >> 8 | append1[0] << 24;
6195 w1[3] = append1[0] >> 8 | append1[1] << 24;
6196 w2[0] = append1[1] >> 8 | append1[2] << 24;
6197 w2[1] = append1[2] >> 8 | append1[3] << 24;
6198 w2[2] = append1[3] >> 8;
6199 break;
6200
6201 case 12:
6202 w0[3] = append0[0];
6203 w1[0] = append0[1];
6204 w1[1] = append0[2];
6205 w1[2] = append0[3];
6206 w1[3] = append1[0];
6207 w2[0] = append1[1];
6208 w2[1] = append1[2];
6209 w2[2] = append1[3];
6210 break;
6211
6212 case 13:
6213 w0[3] = w0[3] | append0[0] << 8;
6214 w1[0] = append0[0] >> 24 | append0[1] << 8;
6215 w1[1] = append0[1] >> 24 | append0[2] << 8;
6216 w1[2] = append0[2] >> 24 | append0[3] << 8;
6217 w1[3] = append0[3] >> 24 | append1[0] << 8;
6218 w2[0] = append1[0] >> 24 | append1[1] << 8;
6219 w2[1] = append1[1] >> 24 | append1[2] << 8;
6220 w2[2] = append1[2] >> 24 | append1[3] << 8;
6221 w2[3] = append1[3] >> 24;
6222 break;
6223
6224 case 14:
6225 w0[3] = w0[3] | append0[0] << 16;
6226 w1[0] = append0[0] >> 16 | append0[1] << 16;
6227 w1[1] = append0[1] >> 16 | append0[2] << 16;
6228 w1[2] = append0[2] >> 16 | append0[3] << 16;
6229 w1[3] = append0[3] >> 16 | append1[0] << 16;
6230 w2[0] = append1[0] >> 16 | append1[1] << 16;
6231 w2[1] = append1[1] >> 16 | append1[2] << 16;
6232 w2[2] = append1[2] >> 16 | append1[3] << 16;
6233 w2[3] = append1[3] >> 16;
6234 break;
6235
6236 case 15:
6237 w0[3] = w0[3] | append0[0] << 24;
6238 w1[0] = append0[0] >> 8 | append0[1] << 24;
6239 w1[1] = append0[1] >> 8 | append0[2] << 24;
6240 w1[2] = append0[2] >> 8 | append0[3] << 24;
6241 w1[3] = append0[3] >> 8 | append1[0] << 24;
6242 w2[0] = append1[0] >> 8 | append1[1] << 24;
6243 w2[1] = append1[1] >> 8 | append1[2] << 24;
6244 w2[2] = append1[2] >> 8 | append1[3] << 24;
6245 w2[3] = append1[3] >> 8;
6246 break;
6247
6248 case 16:
6249 w1[0] = append0[0];
6250 w1[1] = append0[1];
6251 w1[2] = append0[2];
6252 w1[3] = append0[3];
6253 w2[0] = append1[0];
6254 w2[1] = append1[1];
6255 w2[2] = append1[2];
6256 w2[3] = append1[3];
6257 break;
6258
6259 case 17:
6260 w1[0] = w1[0] | append0[0] << 8;
6261 w1[1] = append0[0] >> 24 | append0[1] << 8;
6262 w1[2] = append0[1] >> 24 | append0[2] << 8;
6263 w1[3] = append0[2] >> 24 | append0[3] << 8;
6264 w2[0] = append0[3] >> 24 | append1[0] << 8;
6265 w2[1] = append1[0] >> 24 | append1[1] << 8;
6266 w2[2] = append1[1] >> 24 | append1[2] << 8;
6267 w2[3] = append1[2] >> 24 | append1[3] << 8;
6268 w3[0] = append1[3] >> 24;
6269 break;
6270
6271 case 18:
6272 w1[0] = w1[0] | append0[0] << 16;
6273 w1[1] = append0[0] >> 16 | append0[1] << 16;
6274 w1[2] = append0[1] >> 16 | append0[2] << 16;
6275 w1[3] = append0[2] >> 16 | append0[3] << 16;
6276 w2[0] = append0[3] >> 16 | append1[0] << 16;
6277 w2[1] = append1[0] >> 16 | append1[1] << 16;
6278 w2[2] = append1[1] >> 16 | append1[2] << 16;
6279 w2[3] = append1[2] >> 16 | append1[3] << 16;
6280 w3[0] = append1[3] >> 16;
6281 break;
6282
6283 case 19:
6284 w1[0] = w1[0] | append0[0] << 24;
6285 w1[1] = append0[0] >> 8 | append0[1] << 24;
6286 w1[2] = append0[1] >> 8 | append0[2] << 24;
6287 w1[3] = append0[2] >> 8 | append0[3] << 24;
6288 w2[0] = append0[3] >> 8 | append1[0] << 24;
6289 w2[1] = append1[0] >> 8 | append1[1] << 24;
6290 w2[2] = append1[1] >> 8 | append1[2] << 24;
6291 w2[3] = append1[2] >> 8 | append1[3] << 24;
6292 w3[0] = append1[3] >> 8;
6293 break;
6294
6295 case 20:
6296 w1[1] = append0[0];
6297 w1[2] = append0[1];
6298 w1[3] = append0[2];
6299 w2[0] = append0[3];
6300 w2[1] = append1[0];
6301 w2[2] = append1[1];
6302 w2[3] = append1[2];
6303 w3[0] = append1[3];
6304 break;
6305
6306 case 21:
6307 w1[1] = w1[1] | append0[0] << 8;
6308 w1[2] = append0[0] >> 24 | append0[1] << 8;
6309 w1[3] = append0[1] >> 24 | append0[2] << 8;
6310 w2[0] = append0[2] >> 24 | append0[3] << 8;
6311 w2[1] = append0[3] >> 24 | append1[0] << 8;
6312 w2[2] = append1[0] >> 24 | append1[1] << 8;
6313 w2[3] = append1[1] >> 24 | append1[2] << 8;
6314 w3[0] = append1[2] >> 24 | append1[3] << 8;
6315 w3[1] = append1[3] >> 24;
6316 break;
6317
6318 case 22:
6319 w1[1] = w1[1] | append0[0] << 16;
6320 w1[2] = append0[0] >> 16 | append0[1] << 16;
6321 w1[3] = append0[1] >> 16 | append0[2] << 16;
6322 w2[0] = append0[2] >> 16 | append0[3] << 16;
6323 w2[1] = append0[3] >> 16 | append1[0] << 16;
6324 w2[2] = append1[0] >> 16 | append1[1] << 16;
6325 w2[3] = append1[1] >> 16 | append1[2] << 16;
6326 w3[0] = append1[2] >> 16 | append1[3] << 16;
6327 w3[1] = append1[3] >> 16;
6328 break;
6329
6330 case 23:
6331 w1[1] = w1[1] | append0[0] << 24;
6332 w1[2] = append0[0] >> 8 | append0[1] << 24;
6333 w1[3] = append0[1] >> 8 | append0[2] << 24;
6334 w2[0] = append0[2] >> 8 | append0[3] << 24;
6335 w2[1] = append0[3] >> 8 | append1[0] << 24;
6336 w2[2] = append1[0] >> 8 | append1[1] << 24;
6337 w2[3] = append1[1] >> 8 | append1[2] << 24;
6338 w3[0] = append1[2] >> 8 | append1[3] << 24;
6339 w3[1] = append1[3] >> 8;
6340 break;
6341
6342 case 24:
6343 w1[2] = append0[0];
6344 w1[3] = append0[1];
6345 w2[0] = append0[2];
6346 w2[1] = append0[3];
6347 w2[2] = append1[0];
6348 w2[3] = append1[1];
6349 w3[0] = append1[2];
6350 w3[1] = append1[3];
6351 break;
6352
6353 case 25:
6354 w1[2] = w1[2] | append0[0] << 8;
6355 w1[3] = append0[0] >> 24 | append0[1] << 8;
6356 w2[0] = append0[1] >> 24 | append0[2] << 8;
6357 w2[1] = append0[2] >> 24 | append0[3] << 8;
6358 w2[2] = append0[3] >> 24 | append1[0] << 8;
6359 w2[3] = append1[0] >> 24 | append1[1] << 8;
6360 w3[0] = append1[1] >> 24 | append1[2] << 8;
6361 w3[1] = append1[2] >> 24 | append1[3] << 8;
6362 break;
6363
6364 case 26:
6365 w1[2] = w1[2] | append0[0] << 16;
6366 w1[3] = append0[0] >> 16 | append0[1] << 16;
6367 w2[0] = append0[1] >> 16 | append0[2] << 16;
6368 w2[1] = append0[2] >> 16 | append0[3] << 16;
6369 w2[2] = append0[3] >> 16 | append1[0] << 16;
6370 w2[3] = append1[0] >> 16 | append1[1] << 16;
6371 w3[0] = append1[1] >> 16 | append1[2] << 16;
6372 w3[1] = append1[2] >> 16 | append1[3] << 16;
6373 break;
6374
6375 case 27:
6376 w1[2] = w1[2] | append0[0] << 24;
6377 w1[3] = append0[0] >> 8 | append0[1] << 24;
6378 w2[0] = append0[1] >> 8 | append0[2] << 24;
6379 w2[1] = append0[2] >> 8 | append0[3] << 24;
6380 w2[2] = append0[3] >> 8 | append1[0] << 24;
6381 w2[3] = append1[0] >> 8 | append1[1] << 24;
6382 w3[0] = append1[1] >> 8 | append1[2] << 24;
6383 w3[1] = append1[2] >> 8 | append1[3] << 24;
6384 break;
6385
6386 case 28:
6387 w1[3] = append0[0];
6388 w2[0] = append0[1];
6389 w2[1] = append0[2];
6390 w2[2] = append0[3];
6391 w2[3] = append1[0];
6392 w3[0] = append1[1];
6393 w3[1] = append1[2];
6394 break;
6395
6396 case 29:
6397 w1[3] = w1[3] | append0[0] << 8;
6398 w2[0] = append0[0] >> 24 | append0[1] << 8;
6399 w2[1] = append0[1] >> 24 | append0[2] << 8;
6400 w2[2] = append0[2] >> 24 | append0[3] << 8;
6401 w2[3] = append0[3] >> 24 | append1[0] << 8;
6402 w3[0] = append1[0] >> 24 | append1[1] << 8;
6403 w3[1] = append1[1] >> 24 | append1[2] << 8;
6404 break;
6405
6406 case 30:
6407 w1[3] = w1[3] | append0[0] << 16;
6408 w2[0] = append0[0] >> 16 | append0[1] << 16;
6409 w2[1] = append0[1] >> 16 | append0[2] << 16;
6410 w2[2] = append0[2] >> 16 | append0[3] << 16;
6411 w2[3] = append0[3] >> 16 | append1[0] << 16;
6412 w3[0] = append1[0] >> 16 | append1[1] << 16;
6413 w3[1] = append1[1] >> 16 | append1[2] << 16;
6414 break;
6415
6416 case 31:
6417 w1[3] = w1[3] | append0[0] << 24;
6418 w2[0] = append0[0] >> 8 | append0[1] << 24;
6419 w2[1] = append0[1] >> 8 | append0[2] << 24;
6420 w2[2] = append0[2] >> 8 | append0[3] << 24;
6421 w2[3] = append0[3] >> 8 | append1[0] << 24;
6422 w3[0] = append1[0] >> 8 | append1[1] << 24;
6423 w3[1] = append1[1] >> 8 | append1[2] << 24;
6424 break;
6425
6426 case 32:
6427 w2[0] = append0[0];
6428 w2[1] = append0[1];
6429 w2[2] = append0[2];
6430 w2[3] = append0[3];
6431 w3[0] = append1[0];
6432 w3[1] = append1[1];
6433 break;
6434 }
6435 }
6436
6437 static void memcat32_9 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 append0[4], const u32 append1[4], const u32 append2[4], const u32 offset)
6438 {
6439 switch (offset)
6440 {
6441 case 0:
6442 w0[0] = append0[0];
6443 w0[1] = append0[1];
6444 w0[2] = append0[2];
6445 w0[3] = append0[3];
6446 w1[0] = append1[0];
6447 w1[1] = append1[1];
6448 w1[2] = append1[2];
6449 w1[3] = append1[3];
6450 w2[0] = append2[0];
6451 break;
6452
6453 case 1:
6454 w0[0] = w0[0] | append0[0] << 8;
6455 w0[1] = append0[0] >> 24 | append0[1] << 8;
6456 w0[2] = append0[1] >> 24 | append0[2] << 8;
6457 w0[3] = append0[2] >> 24 | append0[3] << 8;
6458 w1[0] = append0[3] >> 24 | append1[0] << 8;
6459 w1[1] = append1[0] >> 24 | append1[1] << 8;
6460 w1[2] = append1[1] >> 24 | append1[2] << 8;
6461 w1[3] = append1[2] >> 24 | append1[3] << 8;
6462 w2[0] = append1[3] >> 24 | append2[0] << 8;
6463 w2[1] = append2[0] >> 24;
6464 break;
6465
6466 case 2:
6467 w0[0] = w0[0] | append0[0] << 16;
6468 w0[1] = append0[0] >> 16 | append0[1] << 16;
6469 w0[2] = append0[1] >> 16 | append0[2] << 16;
6470 w0[3] = append0[2] >> 16 | append0[3] << 16;
6471 w1[0] = append0[3] >> 16 | append1[0] << 16;
6472 w1[1] = append1[0] >> 16 | append1[1] << 16;
6473 w1[2] = append1[1] >> 16 | append1[2] << 16;
6474 w1[3] = append1[2] >> 16 | append1[3] << 16;
6475 w2[0] = append1[3] >> 16 | append2[0] << 16;
6476 w2[1] = append2[0] >> 16;
6477 break;
6478
6479 case 3:
6480 w0[0] = w0[0] | append0[0] << 24;
6481 w0[1] = append0[0] >> 8 | append0[1] << 24;
6482 w0[2] = append0[1] >> 8 | append0[2] << 24;
6483 w0[3] = append0[2] >> 8 | append0[3] << 24;
6484 w1[0] = append0[3] >> 8 | append1[0] << 24;
6485 w1[1] = append1[0] >> 8 | append1[1] << 24;
6486 w1[2] = append1[1] >> 8 | append1[2] << 24;
6487 w1[3] = append1[2] >> 8 | append1[3] << 24;
6488 w2[0] = append1[3] >> 8 | append2[0] << 24;
6489 w2[1] = append2[0] >> 8;
6490 break;
6491
6492 case 4:
6493 w0[1] = append0[0];
6494 w0[2] = append0[1];
6495 w0[3] = append0[2];
6496 w1[0] = append0[3];
6497 w1[1] = append1[0];
6498 w1[2] = append1[1];
6499 w1[3] = append1[2];
6500 w2[0] = append1[3];
6501 w2[1] = append2[0];
6502 break;
6503
6504 case 5:
6505 w0[1] = w0[1] | append0[0] << 8;
6506 w0[2] = append0[0] >> 24 | append0[1] << 8;
6507 w0[3] = append0[1] >> 24 | append0[2] << 8;
6508 w1[0] = append0[2] >> 24 | append0[3] << 8;
6509 w1[1] = append0[3] >> 24 | append1[0] << 8;
6510 w1[2] = append1[0] >> 24 | append1[1] << 8;
6511 w1[3] = append1[1] >> 24 | append1[2] << 8;
6512 w2[0] = append1[2] >> 24 | append1[3] << 8;
6513 w2[1] = append1[3] >> 24 | append2[0] << 8;
6514 w2[2] = append2[0] >> 24;
6515 break;
6516
6517 case 6:
6518 w0[1] = w0[1] | append0[0] << 16;
6519 w0[2] = append0[0] >> 16 | append0[1] << 16;
6520 w0[3] = append0[1] >> 16 | append0[2] << 16;
6521 w1[0] = append0[2] >> 16 | append0[3] << 16;
6522 w1[1] = append0[3] >> 16 | append1[0] << 16;
6523 w1[2] = append1[0] >> 16 | append1[1] << 16;
6524 w1[3] = append1[1] >> 16 | append1[2] << 16;
6525 w2[0] = append1[2] >> 16 | append1[3] << 16;
6526 w2[1] = append1[3] >> 16 | append2[0] << 16;
6527 w2[2] = append2[0] >> 16;
6528 break;
6529
6530 case 7:
6531 w0[1] = w0[1] | append0[0] << 24;
6532 w0[2] = append0[0] >> 8 | append0[1] << 24;
6533 w0[3] = append0[1] >> 8 | append0[2] << 24;
6534 w1[0] = append0[2] >> 8 | append0[3] << 24;
6535 w1[1] = append0[3] >> 8 | append1[0] << 24;
6536 w1[2] = append1[0] >> 8 | append1[1] << 24;
6537 w1[3] = append1[1] >> 8 | append1[2] << 24;
6538 w2[0] = append1[2] >> 8 | append1[3] << 24;
6539 w2[1] = append1[3] >> 8 | append2[0] << 24;
6540 w2[2] = append2[0] >> 8;
6541 break;
6542
6543 case 8:
6544 w0[2] = append0[0];
6545 w0[3] = append0[1];
6546 w1[0] = append0[2];
6547 w1[1] = append0[3];
6548 w1[2] = append1[0];
6549 w1[3] = append1[1];
6550 w2[0] = append1[2];
6551 w2[1] = append1[3];
6552 w2[2] = append2[0];
6553 break;
6554
6555 case 9:
6556 w0[2] = w0[2] | append0[0] << 8;
6557 w0[3] = append0[0] >> 24 | append0[1] << 8;
6558 w1[0] = append0[1] >> 24 | append0[2] << 8;
6559 w1[1] = append0[2] >> 24 | append0[3] << 8;
6560 w1[2] = append0[3] >> 24 | append1[0] << 8;
6561 w1[3] = append1[0] >> 24 | append1[1] << 8;
6562 w2[0] = append1[1] >> 24 | append1[2] << 8;
6563 w2[1] = append1[2] >> 24 | append1[3] << 8;
6564 w2[2] = append1[3] >> 24 | append2[0] << 8;
6565 w2[3] = append2[0] >> 24;
6566 break;
6567
6568 case 10:
6569 w0[2] = w0[2] | append0[0] << 16;
6570 w0[3] = append0[0] >> 16 | append0[1] << 16;
6571 w1[0] = append0[1] >> 16 | append0[2] << 16;
6572 w1[1] = append0[2] >> 16 | append0[3] << 16;
6573 w1[2] = append0[3] >> 16 | append1[0] << 16;
6574 w1[3] = append1[0] >> 16 | append1[1] << 16;
6575 w2[0] = append1[1] >> 16 | append1[2] << 16;
6576 w2[1] = append1[2] >> 16 | append1[3] << 16;
6577 w2[2] = append1[3] >> 16 | append2[0] << 16;
6578 w2[3] = append2[0] >> 16;
6579 break;
6580
6581 case 11:
6582 w0[2] = w0[2] | append0[0] << 24;
6583 w0[3] = append0[0] >> 8 | append0[1] << 24;
6584 w1[0] = append0[1] >> 8 | append0[2] << 24;
6585 w1[1] = append0[2] >> 8 | append0[3] << 24;
6586 w1[2] = append0[3] >> 8 | append1[0] << 24;
6587 w1[3] = append1[0] >> 8 | append1[1] << 24;
6588 w2[0] = append1[1] >> 8 | append1[2] << 24;
6589 w2[1] = append1[2] >> 8 | append1[3] << 24;
6590 w2[2] = append1[3] >> 8 | append2[0] << 24;
6591 w2[3] = append2[0] >> 8;
6592 break;
6593
6594 case 12:
6595 w0[3] = append0[0];
6596 w1[0] = append0[1];
6597 w1[1] = append0[2];
6598 w1[2] = append0[3];
6599 w1[3] = append1[0];
6600 w2[0] = append1[1];
6601 w2[1] = append1[2];
6602 w2[2] = append1[3];
6603 w2[3] = append2[0];
6604 break;
6605
6606 case 13:
6607 w0[3] = w0[3] | append0[0] << 8;
6608 w1[0] = append0[0] >> 24 | append0[1] << 8;
6609 w1[1] = append0[1] >> 24 | append0[2] << 8;
6610 w1[2] = append0[2] >> 24 | append0[3] << 8;
6611 w1[3] = append0[3] >> 24 | append1[0] << 8;
6612 w2[0] = append1[0] >> 24 | append1[1] << 8;
6613 w2[1] = append1[1] >> 24 | append1[2] << 8;
6614 w2[2] = append1[2] >> 24 | append1[3] << 8;
6615 w2[3] = append1[3] >> 24 | append2[0] << 8;
6616 w3[0] = append2[0] >> 24;
6617 break;
6618
6619 case 14:
6620 w0[3] = w0[3] | append0[0] << 16;
6621 w1[0] = append0[0] >> 16 | append0[1] << 16;
6622 w1[1] = append0[1] >> 16 | append0[2] << 16;
6623 w1[2] = append0[2] >> 16 | append0[3] << 16;
6624 w1[3] = append0[3] >> 16 | append1[0] << 16;
6625 w2[0] = append1[0] >> 16 | append1[1] << 16;
6626 w2[1] = append1[1] >> 16 | append1[2] << 16;
6627 w2[2] = append1[2] >> 16 | append1[3] << 16;
6628 w2[3] = append1[3] >> 16 | append2[0] << 16;
6629 w3[0] = append2[0] >> 16;
6630 break;
6631
6632 case 15:
6633 w0[3] = w0[3] | append0[0] << 24;
6634 w1[0] = append0[0] >> 8 | append0[1] << 24;
6635 w1[1] = append0[1] >> 8 | append0[2] << 24;
6636 w1[2] = append0[2] >> 8 | append0[3] << 24;
6637 w1[3] = append0[3] >> 8 | append1[0] << 24;
6638 w2[0] = append1[0] >> 8 | append1[1] << 24;
6639 w2[1] = append1[1] >> 8 | append1[2] << 24;
6640 w2[2] = append1[2] >> 8 | append1[3] << 24;
6641 w2[3] = append1[3] >> 8 | append2[0] << 24;
6642 w3[0] = append2[0] >> 8;
6643 break;
6644
6645 case 16:
6646 w1[0] = append0[0];
6647 w1[1] = append0[1];
6648 w1[2] = append0[2];
6649 w1[3] = append0[3];
6650 w2[0] = append1[0];
6651 w2[1] = append1[1];
6652 w2[2] = append1[2];
6653 w2[3] = append1[3];
6654 w3[0] = append2[0];
6655 break;
6656
6657 case 17:
6658 w1[0] = w1[0] | append0[0] << 8;
6659 w1[1] = append0[0] >> 24 | append0[1] << 8;
6660 w1[2] = append0[1] >> 24 | append0[2] << 8;
6661 w1[3] = append0[2] >> 24 | append0[3] << 8;
6662 w2[0] = append0[3] >> 24 | append1[0] << 8;
6663 w2[1] = append1[0] >> 24 | append1[1] << 8;
6664 w2[2] = append1[1] >> 24 | append1[2] << 8;
6665 w2[3] = append1[2] >> 24 | append1[3] << 8;
6666 w3[0] = append1[3] >> 24 | append2[0] << 8;
6667 w3[1] = append2[0] >> 24;
6668 break;
6669
6670 case 18:
6671 w1[0] = w1[0] | append0[0] << 16;
6672 w1[1] = append0[0] >> 16 | append0[1] << 16;
6673 w1[2] = append0[1] >> 16 | append0[2] << 16;
6674 w1[3] = append0[2] >> 16 | append0[3] << 16;
6675 w2[0] = append0[3] >> 16 | append1[0] << 16;
6676 w2[1] = append1[0] >> 16 | append1[1] << 16;
6677 w2[2] = append1[1] >> 16 | append1[2] << 16;
6678 w2[3] = append1[2] >> 16 | append1[3] << 16;
6679 w3[0] = append1[3] >> 16 | append2[0] << 16;
6680 w3[1] = append2[0] >> 16;
6681 break;
6682
6683 case 19:
6684 w1[0] = w1[0] | append0[0] << 24;
6685 w1[1] = append0[0] >> 8 | append0[1] << 24;
6686 w1[2] = append0[1] >> 8 | append0[2] << 24;
6687 w1[3] = append0[2] >> 8 | append0[3] << 24;
6688 w2[0] = append0[3] >> 8 | append1[0] << 24;
6689 w2[1] = append1[0] >> 8 | append1[1] << 24;
6690 w2[2] = append1[1] >> 8 | append1[2] << 24;
6691 w2[3] = append1[2] >> 8 | append1[3] << 24;
6692 w3[0] = append1[3] >> 8 | append2[0] << 24;
6693 w3[1] = append2[0] >> 8;
6694 break;
6695
6696 case 20:
6697 w1[1] = append0[0];
6698 w1[2] = append0[1];
6699 w1[3] = append0[2];
6700 w2[0] = append0[3];
6701 w2[1] = append1[0];
6702 w2[2] = append1[1];
6703 w2[3] = append1[2];
6704 w3[0] = append1[3];
6705 w3[1] = append2[0];
6706 break;
6707
6708 case 21:
6709 w1[1] = w1[1] | append0[0] << 8;
6710 w1[2] = append0[0] >> 24 | append0[1] << 8;
6711 w1[3] = append0[1] >> 24 | append0[2] << 8;
6712 w2[0] = append0[2] >> 24 | append0[3] << 8;
6713 w2[1] = append0[3] >> 24 | append1[0] << 8;
6714 w2[2] = append1[0] >> 24 | append1[1] << 8;
6715 w2[3] = append1[1] >> 24 | append1[2] << 8;
6716 w3[0] = append1[2] >> 24 | append1[3] << 8;
6717 w3[1] = append1[3] >> 24 | append2[0] << 8;
6718 break;
6719
6720 case 22:
6721 w1[1] = w1[1] | append0[0] << 16;
6722 w1[2] = append0[0] >> 16 | append0[1] << 16;
6723 w1[3] = append0[1] >> 16 | append0[2] << 16;
6724 w2[0] = append0[2] >> 16 | append0[3] << 16;
6725 w2[1] = append0[3] >> 16 | append1[0] << 16;
6726 w2[2] = append1[0] >> 16 | append1[1] << 16;
6727 w2[3] = append1[1] >> 16 | append1[2] << 16;
6728 w3[0] = append1[2] >> 16 | append1[3] << 16;
6729 w3[1] = append1[3] >> 16 | append2[0] << 16;
6730 break;
6731
6732 case 23:
6733 w1[1] = w1[1] | append0[0] << 24;
6734 w1[2] = append0[0] >> 8 | append0[1] << 24;
6735 w1[3] = append0[1] >> 8 | append0[2] << 24;
6736 w2[0] = append0[2] >> 8 | append0[3] << 24;
6737 w2[1] = append0[3] >> 8 | append1[0] << 24;
6738 w2[2] = append1[0] >> 8 | append1[1] << 24;
6739 w2[3] = append1[1] >> 8 | append1[2] << 24;
6740 w3[0] = append1[2] >> 8 | append1[3] << 24;
6741 w3[1] = append1[3] >> 8 | append2[0] << 24;
6742 break;
6743
6744 case 24:
6745 w1[2] = append0[0];
6746 w1[3] = append0[1];
6747 w2[0] = append0[2];
6748 w2[1] = append0[3];
6749 w2[2] = append1[0];
6750 w2[3] = append1[1];
6751 w3[0] = append1[2];
6752 w3[1] = append1[3];
6753 break;
6754
6755 case 25:
6756 w1[2] = w1[2] | append0[0] << 8;
6757 w1[3] = append0[0] >> 24 | append0[1] << 8;
6758 w2[0] = append0[1] >> 24 | append0[2] << 8;
6759 w2[1] = append0[2] >> 24 | append0[3] << 8;
6760 w2[2] = append0[3] >> 24 | append1[0] << 8;
6761 w2[3] = append1[0] >> 24 | append1[1] << 8;
6762 w3[0] = append1[1] >> 24 | append1[2] << 8;
6763 w3[1] = append1[2] >> 24 | append1[3] << 8;
6764 break;
6765
6766 case 26:
6767 w1[2] = w1[2] | append0[0] << 16;
6768 w1[3] = append0[0] >> 16 | append0[1] << 16;
6769 w2[0] = append0[1] >> 16 | append0[2] << 16;
6770 w2[1] = append0[2] >> 16 | append0[3] << 16;
6771 w2[2] = append0[3] >> 16 | append1[0] << 16;
6772 w2[3] = append1[0] >> 16 | append1[1] << 16;
6773 w3[0] = append1[1] >> 16 | append1[2] << 16;
6774 w3[1] = append1[2] >> 16 | append1[3] << 16;
6775 break;
6776
6777 case 27:
6778 w1[2] = w1[2] | append0[0] << 24;
6779 w1[3] = append0[0] >> 8 | append0[1] << 24;
6780 w2[0] = append0[1] >> 8 | append0[2] << 24;
6781 w2[1] = append0[2] >> 8 | append0[3] << 24;
6782 w2[2] = append0[3] >> 8 | append1[0] << 24;
6783 w2[3] = append1[0] >> 8 | append1[1] << 24;
6784 w3[0] = append1[1] >> 8 | append1[2] << 24;
6785 w3[1] = append1[2] >> 8 | append1[3] << 24;
6786 break;
6787
6788 case 28:
6789 w1[3] = append0[0];
6790 w2[0] = append0[1];
6791 w2[1] = append0[2];
6792 w2[2] = append0[3];
6793 w2[3] = append1[0];
6794 w3[0] = append1[1];
6795 w3[1] = append1[2];
6796 break;
6797
6798 case 29:
6799 w1[3] = w1[3] | append0[0] << 8;
6800 w2[0] = append0[0] >> 24 | append0[1] << 8;
6801 w2[1] = append0[1] >> 24 | append0[2] << 8;
6802 w2[2] = append0[2] >> 24 | append0[3] << 8;
6803 w2[3] = append0[3] >> 24 | append1[0] << 8;
6804 w3[0] = append1[0] >> 24 | append1[1] << 8;
6805 w3[1] = append1[1] >> 24 | append1[2] << 8;
6806 break;
6807
6808 case 30:
6809 w1[3] = w1[3] | append0[0] << 16;
6810 w2[0] = append0[0] >> 16 | append0[1] << 16;
6811 w2[1] = append0[1] >> 16 | append0[2] << 16;
6812 w2[2] = append0[2] >> 16 | append0[3] << 16;
6813 w2[3] = append0[3] >> 16 | append1[0] << 16;
6814 w3[0] = append1[0] >> 16 | append1[1] << 16;
6815 w3[1] = append1[1] >> 16 | append1[2] << 16;
6816 break;
6817
6818 case 31:
6819 w1[3] = w1[3] | append0[0] << 24;
6820 w2[0] = append0[0] >> 8 | append0[1] << 24;
6821 w2[1] = append0[1] >> 8 | append0[2] << 24;
6822 w2[2] = append0[2] >> 8 | append0[3] << 24;
6823 w2[3] = append0[3] >> 8 | append1[0] << 24;
6824 w3[0] = append1[0] >> 8 | append1[1] << 24;
6825 w3[1] = append1[1] >> 8 | append1[2] << 24;
6826 break;
6827
6828 case 32:
6829 w2[0] = append0[0];
6830 w2[1] = append0[1];
6831 w2[2] = append0[2];
6832 w2[3] = append0[3];
6833 w3[0] = append1[0];
6834 w3[1] = append1[1];
6835 break;
6836 }
6837 }
6838
6839 static void switch_buffer_by_offset (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 offset)
6840 {
6841 const int offset_mod_4 = offset & 3;
6842
6843 const int offset_minus_4 = 4 - offset;
6844
6845 switch (offset / 4)
6846 {
6847 case 0:
6848 w3[2] = amd_bytealign ( 0, w3[1], offset_minus_4);
6849 w3[1] = amd_bytealign (w3[1], w3[0], offset_minus_4);
6850 w3[0] = amd_bytealign (w3[0], w2[3], offset_minus_4);
6851 w2[3] = amd_bytealign (w2[3], w2[2], offset_minus_4);
6852 w2[2] = amd_bytealign (w2[2], w2[1], offset_minus_4);
6853 w2[1] = amd_bytealign (w2[1], w2[0], offset_minus_4);
6854 w2[0] = amd_bytealign (w2[0], w1[3], offset_minus_4);
6855 w1[3] = amd_bytealign (w1[3], w1[2], offset_minus_4);
6856 w1[2] = amd_bytealign (w1[2], w1[1], offset_minus_4);
6857 w1[1] = amd_bytealign (w1[1], w1[0], offset_minus_4);
6858 w1[0] = amd_bytealign (w1[0], w0[3], offset_minus_4);
6859 w0[3] = amd_bytealign (w0[3], w0[2], offset_minus_4);
6860 w0[2] = amd_bytealign (w0[2], w0[1], offset_minus_4);
6861 w0[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
6862 w0[0] = amd_bytealign (w0[0], 0, offset_minus_4);
6863
6864 if (offset_mod_4 == 0)
6865 {
6866 w0[0] = w0[1];
6867 w0[1] = w0[2];
6868 w0[2] = w0[3];
6869 w0[3] = w1[0];
6870 w1[0] = w1[1];
6871 w1[1] = w1[2];
6872 w1[2] = w1[3];
6873 w1[3] = w2[0];
6874 w2[0] = w2[1];
6875 w2[1] = w2[2];
6876 w2[2] = w2[3];
6877 w2[3] = w3[0];
6878 w3[0] = w3[1];
6879 w3[1] = w3[2];
6880 w3[2] = 0;
6881 }
6882
6883 break;
6884
6885 case 1:
6886 w3[2] = amd_bytealign ( 0, w3[0], offset_minus_4);
6887 w3[1] = amd_bytealign (w3[0], w2[3], offset_minus_4);
6888 w3[0] = amd_bytealign (w2[3], w2[2], offset_minus_4);
6889 w2[3] = amd_bytealign (w2[2], w2[1], offset_minus_4);
6890 w2[2] = amd_bytealign (w2[1], w2[0], offset_minus_4);
6891 w2[1] = amd_bytealign (w2[0], w1[3], offset_minus_4);
6892 w2[0] = amd_bytealign (w1[3], w1[2], offset_minus_4);
6893 w1[3] = amd_bytealign (w1[2], w1[1], offset_minus_4);
6894 w1[2] = amd_bytealign (w1[1], w1[0], offset_minus_4);
6895 w1[1] = amd_bytealign (w1[0], w0[3], offset_minus_4);
6896 w1[0] = amd_bytealign (w0[3], w0[2], offset_minus_4);
6897 w0[3] = amd_bytealign (w0[2], w0[1], offset_minus_4);
6898 w0[2] = amd_bytealign (w0[1], w0[0], offset_minus_4);
6899 w0[1] = amd_bytealign (w0[0], 0, offset_minus_4);
6900 w0[0] = 0;
6901
6902 if (offset_mod_4 == 0)
6903 {
6904 w0[1] = w0[2];
6905 w0[2] = w0[3];
6906 w0[3] = w1[0];
6907 w1[0] = w1[1];
6908 w1[1] = w1[2];
6909 w1[2] = w1[3];
6910 w1[3] = w2[0];
6911 w2[0] = w2[1];
6912 w2[1] = w2[2];
6913 w2[2] = w2[3];
6914 w2[3] = w3[0];
6915 w3[0] = w3[1];
6916 w3[1] = w3[2];
6917 w3[2] = 0;
6918 }
6919
6920 break;
6921
6922 case 2:
6923 w3[2] = amd_bytealign ( 0, w2[3], offset_minus_4);
6924 w3[1] = amd_bytealign (w2[3], w2[2], offset_minus_4);
6925 w3[0] = amd_bytealign (w2[2], w2[1], offset_minus_4);
6926 w2[3] = amd_bytealign (w2[1], w2[0], offset_minus_4);
6927 w2[2] = amd_bytealign (w2[0], w1[3], offset_minus_4);
6928 w2[1] = amd_bytealign (w1[3], w1[2], offset_minus_4);
6929 w2[0] = amd_bytealign (w1[2], w1[1], offset_minus_4);
6930 w1[3] = amd_bytealign (w1[1], w1[0], offset_minus_4);
6931 w1[2] = amd_bytealign (w1[0], w0[3], offset_minus_4);
6932 w1[1] = amd_bytealign (w0[3], w0[2], offset_minus_4);
6933 w1[0] = amd_bytealign (w0[2], w0[1], offset_minus_4);
6934 w0[3] = amd_bytealign (w0[1], w0[0], offset_minus_4);
6935 w0[2] = amd_bytealign (w0[0], 0, offset_minus_4);
6936 w0[1] = 0;
6937 w0[0] = 0;
6938
6939 if (offset_mod_4 == 0)
6940 {
6941 w0[2] = w0[3];
6942 w0[3] = w1[0];
6943 w1[0] = w1[1];
6944 w1[1] = w1[2];
6945 w1[2] = w1[3];
6946 w1[3] = w2[0];
6947 w2[0] = w2[1];
6948 w2[1] = w2[2];
6949 w2[2] = w2[3];
6950 w2[3] = w3[0];
6951 w3[0] = w3[1];
6952 w3[1] = w3[2];
6953 w3[2] = 0;
6954 }
6955
6956 break;
6957
6958 case 3:
6959 w3[2] = amd_bytealign ( 0, w2[2], offset_minus_4);
6960 w3[1] = amd_bytealign (w2[2], w2[1], offset_minus_4);
6961 w3[0] = amd_bytealign (w2[1], w2[0], offset_minus_4);
6962 w2[3] = amd_bytealign (w2[0], w1[3], offset_minus_4);
6963 w2[2] = amd_bytealign (w1[3], w1[2], offset_minus_4);
6964 w2[1] = amd_bytealign (w1[2], w1[1], offset_minus_4);
6965 w2[0] = amd_bytealign (w1[1], w1[0], offset_minus_4);
6966 w1[3] = amd_bytealign (w1[0], w0[3], offset_minus_4);
6967 w1[2] = amd_bytealign (w0[3], w0[2], offset_minus_4);
6968 w1[1] = amd_bytealign (w0[2], w0[1], offset_minus_4);
6969 w1[0] = amd_bytealign (w0[1], w0[0], offset_minus_4);
6970 w0[3] = amd_bytealign (w0[0], 0, offset_minus_4);
6971 w0[2] = 0;
6972 w0[1] = 0;
6973 w0[0] = 0;
6974
6975 if (offset_mod_4 == 0)
6976 {
6977 w0[3] = w1[0];
6978 w1[0] = w1[1];
6979 w1[1] = w1[2];
6980 w1[2] = w1[3];
6981 w1[3] = w2[0];
6982 w2[0] = w2[1];
6983 w2[1] = w2[2];
6984 w2[2] = w2[3];
6985 w2[3] = w3[0];
6986 w3[0] = w3[1];
6987 w3[1] = w3[2];
6988 w3[2] = 0;
6989 }
6990
6991 break;
6992
6993 case 4:
6994 w3[2] = amd_bytealign ( 0, w2[1], offset_minus_4);
6995 w3[1] = amd_bytealign (w2[1], w2[0], offset_minus_4);
6996 w3[0] = amd_bytealign (w2[0], w1[3], offset_minus_4);
6997 w2[3] = amd_bytealign (w1[3], w1[2], offset_minus_4);
6998 w2[2] = amd_bytealign (w1[2], w1[1], offset_minus_4);
6999 w2[1] = amd_bytealign (w1[1], w1[0], offset_minus_4);
7000 w2[0] = amd_bytealign (w1[0], w0[3], offset_minus_4);
7001 w1[3] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7002 w1[2] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7003 w1[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7004 w1[0] = amd_bytealign (w0[0], 0, offset_minus_4);
7005 w0[3] = 0;
7006 w0[2] = 0;
7007 w0[1] = 0;
7008 w0[0] = 0;
7009
7010 if (offset_mod_4 == 0)
7011 {
7012 w1[0] = w1[1];
7013 w1[1] = w1[2];
7014 w1[2] = w1[3];
7015 w1[3] = w2[0];
7016 w2[0] = w2[1];
7017 w2[1] = w2[2];
7018 w2[2] = w2[3];
7019 w2[3] = w3[0];
7020 w3[0] = w3[1];
7021 w3[1] = w3[2];
7022 w3[2] = 0;
7023 }
7024
7025 break;
7026
7027 case 5:
7028 w3[2] = amd_bytealign ( 0, w2[0], offset_minus_4);
7029 w3[1] = amd_bytealign (w2[0], w1[3], offset_minus_4);
7030 w3[0] = amd_bytealign (w1[3], w1[2], offset_minus_4);
7031 w2[3] = amd_bytealign (w1[2], w1[1], offset_minus_4);
7032 w2[2] = amd_bytealign (w1[1], w1[0], offset_minus_4);
7033 w2[1] = amd_bytealign (w1[0], w0[3], offset_minus_4);
7034 w2[0] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7035 w1[3] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7036 w1[2] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7037 w1[1] = amd_bytealign (w0[0], 0, offset_minus_4);
7038 w1[0] = 0;
7039 w0[3] = 0;
7040 w0[2] = 0;
7041 w0[1] = 0;
7042 w0[0] = 0;
7043
7044 if (offset_mod_4 == 0)
7045 {
7046 w1[1] = w1[2];
7047 w1[2] = w1[3];
7048 w1[3] = w2[0];
7049 w2[0] = w2[1];
7050 w2[1] = w2[2];
7051 w2[2] = w2[3];
7052 w2[3] = w3[0];
7053 w3[0] = w3[1];
7054 w3[1] = w3[2];
7055 w3[2] = 0;
7056 }
7057
7058 break;
7059
7060 case 6:
7061 w3[2] = amd_bytealign ( 0, w1[3], offset_minus_4);
7062 w3[1] = amd_bytealign (w1[3], w1[2], offset_minus_4);
7063 w3[0] = amd_bytealign (w1[2], w1[1], offset_minus_4);
7064 w2[3] = amd_bytealign (w1[1], w1[0], offset_minus_4);
7065 w2[2] = amd_bytealign (w1[0], w0[3], offset_minus_4);
7066 w2[1] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7067 w2[0] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7068 w1[3] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7069 w1[2] = amd_bytealign (w0[0], 0, offset_minus_4);
7070 w1[1] = 0;
7071 w1[0] = 0;
7072 w0[3] = 0;
7073 w0[2] = 0;
7074 w0[1] = 0;
7075 w0[0] = 0;
7076
7077 if (offset_mod_4 == 0)
7078 {
7079 w1[2] = w1[3];
7080 w1[3] = w2[0];
7081 w2[0] = w2[1];
7082 w2[1] = w2[2];
7083 w2[2] = w2[3];
7084 w2[3] = w3[0];
7085 w3[0] = w3[1];
7086 w3[1] = w3[2];
7087 w3[2] = 0;
7088 }
7089
7090 break;
7091
7092 case 7:
7093 w3[2] = amd_bytealign ( 0, w1[2], offset_minus_4);
7094 w3[1] = amd_bytealign (w1[2], w1[1], offset_minus_4);
7095 w3[0] = amd_bytealign (w1[1], w1[0], offset_minus_4);
7096 w2[3] = amd_bytealign (w1[0], w0[3], offset_minus_4);
7097 w2[2] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7098 w2[1] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7099 w2[0] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7100 w1[3] = amd_bytealign (w0[0], 0, offset_minus_4);
7101 w1[2] = 0;
7102 w1[1] = 0;
7103 w1[0] = 0;
7104 w0[3] = 0;
7105 w0[2] = 0;
7106 w0[1] = 0;
7107 w0[0] = 0;
7108
7109 if (offset_mod_4 == 0)
7110 {
7111 w1[3] = w2[0];
7112 w2[0] = w2[1];
7113 w2[1] = w2[2];
7114 w2[2] = w2[3];
7115 w2[3] = w3[0];
7116 w3[0] = w3[1];
7117 w3[1] = w3[2];
7118 w3[2] = 0;
7119 }
7120
7121 break;
7122
7123 case 8:
7124 w3[2] = amd_bytealign ( 0, w1[1], offset_minus_4);
7125 w3[1] = amd_bytealign (w1[1], w1[0], offset_minus_4);
7126 w3[0] = amd_bytealign (w1[0], w0[3], offset_minus_4);
7127 w2[3] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7128 w2[2] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7129 w2[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7130 w2[0] = amd_bytealign (w0[0], 0, offset_minus_4);
7131 w1[3] = 0;
7132 w1[2] = 0;
7133 w1[1] = 0;
7134 w1[0] = 0;
7135 w0[3] = 0;
7136 w0[2] = 0;
7137 w0[1] = 0;
7138 w0[0] = 0;
7139
7140 if (offset_mod_4 == 0)
7141 {
7142 w2[0] = w2[1];
7143 w2[1] = w2[2];
7144 w2[2] = w2[3];
7145 w2[3] = w3[0];
7146 w3[0] = w3[1];
7147 w3[1] = w3[2];
7148 w3[2] = 0;
7149 }
7150
7151 break;
7152
7153 case 9:
7154 w3[2] = amd_bytealign ( 0, w1[0], offset_minus_4);
7155 w3[1] = amd_bytealign (w1[0], w0[3], offset_minus_4);
7156 w3[0] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7157 w2[3] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7158 w2[2] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7159 w2[1] = amd_bytealign (w0[0], 0, offset_minus_4);
7160 w2[0] = 0;
7161 w1[3] = 0;
7162 w1[2] = 0;
7163 w1[1] = 0;
7164 w1[0] = 0;
7165 w0[3] = 0;
7166 w0[2] = 0;
7167 w0[1] = 0;
7168 w0[0] = 0;
7169
7170 if (offset_mod_4 == 0)
7171 {
7172 w2[1] = w2[2];
7173 w2[2] = w2[3];
7174 w2[3] = w3[0];
7175 w3[0] = w3[1];
7176 w3[1] = w3[2];
7177 w3[2] = 0;
7178 }
7179
7180 break;
7181
7182 case 10:
7183 w3[2] = amd_bytealign ( 0, w0[3], offset_minus_4);
7184 w3[1] = amd_bytealign (w0[3], w0[2], offset_minus_4);
7185 w3[0] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7186 w2[3] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7187 w2[2] = amd_bytealign (w0[0], 0, offset_minus_4);
7188 w2[1] = 0;
7189 w2[0] = 0;
7190 w1[3] = 0;
7191 w1[2] = 0;
7192 w1[1] = 0;
7193 w1[0] = 0;
7194 w0[3] = 0;
7195 w0[2] = 0;
7196 w0[1] = 0;
7197 w0[0] = 0;
7198
7199 if (offset_mod_4 == 0)
7200 {
7201 w2[2] = w2[3];
7202 w2[3] = w3[0];
7203 w3[0] = w3[1];
7204 w3[1] = w3[2];
7205 w3[2] = 0;
7206 }
7207
7208 break;
7209
7210 case 11:
7211 w3[2] = amd_bytealign ( 0, w0[2], offset_minus_4);
7212 w3[1] = amd_bytealign (w0[2], w0[1], offset_minus_4);
7213 w3[0] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7214 w2[3] = amd_bytealign (w0[0], 0, offset_minus_4);
7215 w2[2] = 0;
7216 w2[1] = 0;
7217 w2[0] = 0;
7218 w1[3] = 0;
7219 w1[2] = 0;
7220 w1[1] = 0;
7221 w1[0] = 0;
7222 w0[3] = 0;
7223 w0[2] = 0;
7224 w0[1] = 0;
7225 w0[0] = 0;
7226
7227 if (offset_mod_4 == 0)
7228 {
7229 w2[3] = w3[0];
7230 w3[0] = w3[1];
7231 w3[1] = w3[2];
7232 w3[2] = 0;
7233 }
7234
7235 break;
7236
7237 case 12:
7238 w3[2] = amd_bytealign ( 0, w0[1], offset_minus_4);
7239 w3[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
7240 w3[0] = amd_bytealign (w0[0], 0, offset_minus_4);
7241 w2[3] = 0;
7242 w2[2] = 0;
7243 w2[1] = 0;
7244 w2[0] = 0;
7245 w1[3] = 0;
7246 w1[2] = 0;
7247 w1[1] = 0;
7248 w1[0] = 0;
7249 w0[3] = 0;
7250 w0[2] = 0;
7251 w0[1] = 0;
7252 w0[0] = 0;
7253
7254 if (offset_mod_4 == 0)
7255 {
7256 w3[0] = w3[1];
7257 w3[1] = w3[2];
7258 w3[2] = 0;
7259 }
7260
7261 break;
7262
7263 case 13:
7264 w3[2] = amd_bytealign ( 0, w0[0], offset_minus_4);
7265 w3[1] = amd_bytealign (w0[0], 0, offset_minus_4);
7266 w3[0] = 0;
7267 w2[3] = 0;
7268 w2[2] = 0;
7269 w2[1] = 0;
7270 w2[0] = 0;
7271 w1[3] = 0;
7272 w1[2] = 0;
7273 w1[1] = 0;
7274 w1[0] = 0;
7275 w0[3] = 0;
7276 w0[2] = 0;
7277 w0[1] = 0;
7278 w0[0] = 0;
7279
7280 if (offset_mod_4 == 0)
7281 {
7282 w3[1] = w3[2];
7283 w3[2] = 0;
7284 }
7285
7286 break;
7287 }
7288 }
7289
7290 static void switch_buffer_by_offset_be (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 offset)
7291 {
7292 switch (offset / 4)
7293 {
7294 case 0:
7295 w3[2] = amd_bytealign (w3[1], 0, offset);
7296 w3[1] = amd_bytealign (w3[0], w3[1], offset);
7297 w3[0] = amd_bytealign (w2[3], w3[0], offset);
7298 w2[3] = amd_bytealign (w2[2], w2[3], offset);
7299 w2[2] = amd_bytealign (w2[1], w2[2], offset);
7300 w2[1] = amd_bytealign (w2[0], w2[1], offset);
7301 w2[0] = amd_bytealign (w1[3], w2[0], offset);
7302 w1[3] = amd_bytealign (w1[2], w1[3], offset);
7303 w1[2] = amd_bytealign (w1[1], w1[2], offset);
7304 w1[1] = amd_bytealign (w1[0], w1[1], offset);
7305 w1[0] = amd_bytealign (w0[3], w1[0], offset);
7306 w0[3] = amd_bytealign (w0[2], w0[3], offset);
7307 w0[2] = amd_bytealign (w0[1], w0[2], offset);
7308 w0[1] = amd_bytealign (w0[0], w0[1], offset);
7309 w0[0] = amd_bytealign ( 0, w0[0], offset);
7310 break;
7311
7312 case 1:
7313 w3[2] = amd_bytealign (w3[0], 0, offset);
7314 w3[1] = amd_bytealign (w2[3], w3[0], offset);
7315 w3[0] = amd_bytealign (w2[2], w2[3], offset);
7316 w2[3] = amd_bytealign (w2[1], w2[2], offset);
7317 w2[2] = amd_bytealign (w2[0], w2[1], offset);
7318 w2[1] = amd_bytealign (w1[3], w2[0], offset);
7319 w2[0] = amd_bytealign (w1[2], w1[3], offset);
7320 w1[3] = amd_bytealign (w1[1], w1[2], offset);
7321 w1[2] = amd_bytealign (w1[0], w1[1], offset);
7322 w1[1] = amd_bytealign (w0[3], w1[0], offset);
7323 w1[0] = amd_bytealign (w0[2], w0[3], offset);
7324 w0[3] = amd_bytealign (w0[1], w0[2], offset);
7325 w0[2] = amd_bytealign (w0[0], w0[1], offset);
7326 w0[1] = amd_bytealign ( 0, w0[0], offset);
7327 w0[0] = 0;
7328 break;
7329
7330 case 2:
7331 w3[2] = amd_bytealign (w2[3], 0, offset);
7332 w3[1] = amd_bytealign (w2[2], w2[3], offset);
7333 w3[0] = amd_bytealign (w2[1], w2[2], offset);
7334 w2[3] = amd_bytealign (w2[0], w2[1], offset);
7335 w2[2] = amd_bytealign (w1[3], w2[0], offset);
7336 w2[1] = amd_bytealign (w1[2], w1[3], offset);
7337 w2[0] = amd_bytealign (w1[1], w1[2], offset);
7338 w1[3] = amd_bytealign (w1[0], w1[1], offset);
7339 w1[2] = amd_bytealign (w0[3], w1[0], offset);
7340 w1[1] = amd_bytealign (w0[2], w0[3], offset);
7341 w1[0] = amd_bytealign (w0[1], w0[2], offset);
7342 w0[3] = amd_bytealign (w0[0], w0[1], offset);
7343 w0[2] = amd_bytealign ( 0, w0[0], offset);
7344 w0[1] = 0;
7345 w0[0] = 0;
7346 break;
7347
7348 case 3:
7349 w3[2] = amd_bytealign (w2[2], 0, offset);
7350 w3[1] = amd_bytealign (w2[1], w2[2], offset);
7351 w3[0] = amd_bytealign (w2[0], w2[1], offset);
7352 w2[3] = amd_bytealign (w1[3], w2[0], offset);
7353 w2[2] = amd_bytealign (w1[2], w1[3], offset);
7354 w2[1] = amd_bytealign (w1[1], w1[2], offset);
7355 w2[0] = amd_bytealign (w1[0], w1[1], offset);
7356 w1[3] = amd_bytealign (w0[3], w1[0], offset);
7357 w1[2] = amd_bytealign (w0[2], w0[3], offset);
7358 w1[1] = amd_bytealign (w0[1], w0[2], offset);
7359 w1[0] = amd_bytealign (w0[0], w0[1], offset);
7360 w0[3] = amd_bytealign ( 0, w0[0], offset);
7361 w0[2] = 0;
7362 w0[1] = 0;
7363 w0[0] = 0;
7364 break;
7365
7366 case 4:
7367 w3[2] = amd_bytealign (w2[1], 0, offset);
7368 w3[1] = amd_bytealign (w2[0], w2[1], offset);
7369 w3[0] = amd_bytealign (w1[3], w2[0], offset);
7370 w2[3] = amd_bytealign (w1[2], w1[3], offset);
7371 w2[2] = amd_bytealign (w1[1], w1[2], offset);
7372 w2[1] = amd_bytealign (w1[0], w1[1], offset);
7373 w2[0] = amd_bytealign (w0[3], w1[0], offset);
7374 w1[3] = amd_bytealign (w0[2], w0[3], offset);
7375 w1[2] = amd_bytealign (w0[1], w0[2], offset);
7376 w1[1] = amd_bytealign (w0[0], w0[1], offset);
7377 w1[0] = amd_bytealign ( 0, w0[0], offset);
7378 w0[3] = 0;
7379 w0[2] = 0;
7380 w0[1] = 0;
7381 w0[0] = 0;
7382 break;
7383
7384 case 5:
7385 w3[2] = amd_bytealign (w2[0], 0, offset);
7386 w3[1] = amd_bytealign (w1[3], w2[0], offset);
7387 w3[0] = amd_bytealign (w1[2], w1[3], offset);
7388 w2[3] = amd_bytealign (w1[1], w1[2], offset);
7389 w2[2] = amd_bytealign (w1[0], w1[1], offset);
7390 w2[1] = amd_bytealign (w0[3], w1[0], offset);
7391 w2[0] = amd_bytealign (w0[2], w0[3], offset);
7392 w1[3] = amd_bytealign (w0[1], w0[2], offset);
7393 w1[2] = amd_bytealign (w0[0], w0[1], offset);
7394 w1[1] = amd_bytealign ( 0, w0[0], offset);
7395 w1[0] = 0;
7396 w0[3] = 0;
7397 w0[2] = 0;
7398 w0[1] = 0;
7399 w0[0] = 0;
7400 break;
7401
7402 case 6:
7403 w3[2] = amd_bytealign (w1[3], 0, offset);
7404 w3[1] = amd_bytealign (w1[2], w1[3], offset);
7405 w3[0] = amd_bytealign (w1[1], w1[2], offset);
7406 w2[3] = amd_bytealign (w1[0], w1[1], offset);
7407 w2[2] = amd_bytealign (w0[3], w1[0], offset);
7408 w2[1] = amd_bytealign (w0[2], w0[3], offset);
7409 w2[0] = amd_bytealign (w0[1], w0[2], offset);
7410 w1[3] = amd_bytealign (w0[0], w0[1], offset);
7411 w1[2] = amd_bytealign ( 0, w0[0], offset);
7412 w1[1] = 0;
7413 w1[0] = 0;
7414 w0[3] = 0;
7415 w0[2] = 0;
7416 w0[1] = 0;
7417 w0[0] = 0;
7418 break;
7419
7420 case 7:
7421 w3[2] = amd_bytealign (w1[2], 0, offset);
7422 w3[1] = amd_bytealign (w1[1], w1[2], offset);
7423 w3[0] = amd_bytealign (w1[0], w1[1], offset);
7424 w2[3] = amd_bytealign (w0[3], w1[0], offset);
7425 w2[2] = amd_bytealign (w0[2], w0[3], offset);
7426 w2[1] = amd_bytealign (w0[1], w0[2], offset);
7427 w2[0] = amd_bytealign (w0[0], w0[1], offset);
7428 w1[3] = amd_bytealign ( 0, w0[0], offset);
7429 w1[2] = 0;
7430 w1[1] = 0;
7431 w1[0] = 0;
7432 w0[3] = 0;
7433 w0[2] = 0;
7434 w0[1] = 0;
7435 w0[0] = 0;
7436 break;
7437
7438 case 8:
7439 w3[2] = amd_bytealign (w1[1], 0, offset);
7440 w3[1] = amd_bytealign (w1[0], w1[1], offset);
7441 w3[0] = amd_bytealign (w0[3], w1[0], offset);
7442 w2[3] = amd_bytealign (w0[2], w0[3], offset);
7443 w2[2] = amd_bytealign (w0[1], w0[2], offset);
7444 w2[1] = amd_bytealign (w0[0], w0[1], offset);
7445 w2[0] = amd_bytealign ( 0, w0[0], offset);
7446 w1[3] = 0;
7447 w1[2] = 0;
7448 w1[1] = 0;
7449 w1[0] = 0;
7450 w0[3] = 0;
7451 w0[2] = 0;
7452 w0[1] = 0;
7453 w0[0] = 0;
7454 break;
7455
7456 case 9:
7457 w3[2] = amd_bytealign (w1[0], 0, offset);
7458 w3[1] = amd_bytealign (w0[3], w1[0], offset);
7459 w3[0] = amd_bytealign (w0[2], w0[3], offset);
7460 w2[3] = amd_bytealign (w0[1], w0[2], offset);
7461 w2[2] = amd_bytealign (w0[0], w0[1], offset);
7462 w2[1] = amd_bytealign ( 0, w0[0], offset);
7463 w2[0] = 0;
7464 w1[3] = 0;
7465 w1[2] = 0;
7466 w1[1] = 0;
7467 w1[0] = 0;
7468 w0[3] = 0;
7469 w0[2] = 0;
7470 w0[1] = 0;
7471 w0[0] = 0;
7472 break;
7473
7474 case 10:
7475 w3[2] = amd_bytealign (w0[3], 0, offset);
7476 w3[1] = amd_bytealign (w0[2], w0[3], offset);
7477 w3[0] = amd_bytealign (w0[1], w0[2], offset);
7478 w2[3] = amd_bytealign (w0[0], w0[1], offset);
7479 w2[2] = amd_bytealign ( 0, w0[0], offset);
7480 w2[1] = 0;
7481 w2[0] = 0;
7482 w1[3] = 0;
7483 w1[2] = 0;
7484 w1[1] = 0;
7485 w1[0] = 0;
7486 w0[3] = 0;
7487 w0[2] = 0;
7488 w0[1] = 0;
7489 w0[0] = 0;
7490 break;
7491
7492 case 11:
7493 w3[2] = amd_bytealign (w0[2], 0, offset);
7494 w3[1] = amd_bytealign (w0[1], w0[2], offset);
7495 w3[0] = amd_bytealign (w0[0], w0[1], offset);
7496 w2[3] = amd_bytealign ( 0, w0[0], offset);
7497 w2[2] = 0;
7498 w2[1] = 0;
7499 w2[0] = 0;
7500 w1[3] = 0;
7501 w1[2] = 0;
7502 w1[1] = 0;
7503 w1[0] = 0;
7504 w0[3] = 0;
7505 w0[2] = 0;
7506 w0[1] = 0;
7507 w0[0] = 0;
7508 break;
7509
7510 case 12:
7511 w3[2] = amd_bytealign (w0[1], 0, offset);
7512 w3[1] = amd_bytealign (w0[0], w0[1], offset);
7513 w3[0] = amd_bytealign ( 0, w0[0], offset);
7514 w2[3] = 0;
7515 w2[2] = 0;
7516 w2[1] = 0;
7517 w2[0] = 0;
7518 w1[3] = 0;
7519 w1[2] = 0;
7520 w1[1] = 0;
7521 w1[0] = 0;
7522 w0[3] = 0;
7523 w0[2] = 0;
7524 w0[1] = 0;
7525 w0[0] = 0;
7526 break;
7527
7528 case 13:
7529 w3[2] = amd_bytealign (w0[0], 0, offset);
7530 w3[1] = amd_bytealign ( 0, w0[0], offset);
7531 w3[0] = 0;
7532 w2[3] = 0;
7533 w2[2] = 0;
7534 w2[1] = 0;
7535 w2[0] = 0;
7536 w1[3] = 0;
7537 w1[2] = 0;
7538 w1[1] = 0;
7539 w1[0] = 0;
7540 w0[3] = 0;
7541 w0[2] = 0;
7542 w0[1] = 0;
7543 w0[0] = 0;
7544 break;
7545 }
7546 }
7547
7548 /**
7549 * vector
7550 */
7551
7552 #ifndef VECT_SIZE1
7553 static u32x swap_workaround (const u32x v)
7554 {
7555 return rotl32 ((v & 0x00FF00FF), 24u)
7556 | rotl32 ((v & 0xFF00FF00), 8u);
7557 }
7558
7559 static u64x swap_workaround (const u64x v)
7560 {
7561 return (((v & 0xff00000000000000) >> 56)
7562 | ((v & 0x00ff000000000000) >> 40)
7563 | ((v & 0x0000ff0000000000) >> 24)
7564 | ((v & 0x000000ff00000000) >> 8)
7565 | ((v & 0x00000000ff000000) << 8)
7566 | ((v & 0x0000000000ff0000) << 24)
7567 | ((v & 0x000000000000ff00) << 40)
7568 | ((v & 0x00000000000000ff) << 56));
7569 }
7570
7571 static void truncate_block (u32x w[4], const u32 len)
7572 {
7573 switch (len)
7574 {
7575 case 0: w[0] &= 0;
7576 w[1] &= 0;
7577 w[2] &= 0;
7578 w[3] &= 0;
7579 break;
7580 case 1: w[0] &= 0x000000FF;
7581 w[1] &= 0;
7582 w[2] &= 0;
7583 w[3] &= 0;
7584 break;
7585 case 2: w[0] &= 0x0000FFFF;
7586 w[1] &= 0;
7587 w[2] &= 0;
7588 w[3] &= 0;
7589 break;
7590 case 3: w[0] &= 0x00FFFFFF;
7591 w[1] &= 0;
7592 w[2] &= 0;
7593 w[3] &= 0;
7594 break;
7595 case 4: w[1] &= 0;
7596 w[2] &= 0;
7597 w[3] &= 0;
7598 break;
7599 case 5: w[1] &= 0x000000FF;
7600 w[2] &= 0;
7601 w[3] &= 0;
7602 break;
7603 case 6: w[1] &= 0x0000FFFF;
7604 w[2] &= 0;
7605 w[3] &= 0;
7606 break;
7607 case 7: w[1] &= 0x00FFFFFF;
7608 w[2] &= 0;
7609 w[3] &= 0;
7610 break;
7611 case 8: w[2] &= 0;
7612 w[3] &= 0;
7613 break;
7614 case 9: w[2] &= 0x000000FF;
7615 w[3] &= 0;
7616 break;
7617 case 10: w[2] &= 0x0000FFFF;
7618 w[3] &= 0;
7619 break;
7620 case 11: w[2] &= 0x00FFFFFF;
7621 w[3] &= 0;
7622 break;
7623 case 12: w[3] &= 0;
7624 break;
7625 case 13: w[3] &= 0x000000FF;
7626 break;
7627 case 14: w[3] &= 0x0000FFFF;
7628 break;
7629 case 15: w[3] &= 0x00FFFFFF;
7630 break;
7631 }
7632 }
7633
7634 static void make_unicode (const u32x in[4], u32x out1[4], u32x out2[4])
7635 {
7636 out2[3] = ((in[3] >> 8) & 0x00FF0000) | ((in[3] >> 16) & 0x000000FF);
7637 out2[2] = ((in[3] << 8) & 0x00FF0000) | ((in[3] >> 0) & 0x000000FF);
7638 out2[1] = ((in[2] >> 8) & 0x00FF0000) | ((in[2] >> 16) & 0x000000FF);
7639 out2[0] = ((in[2] << 8) & 0x00FF0000) | ((in[2] >> 0) & 0x000000FF);
7640 out1[3] = ((in[1] >> 8) & 0x00FF0000) | ((in[1] >> 16) & 0x000000FF);
7641 out1[2] = ((in[1] << 8) & 0x00FF0000) | ((in[1] >> 0) & 0x000000FF);
7642 out1[1] = ((in[0] >> 8) & 0x00FF0000) | ((in[0] >> 16) & 0x000000FF);
7643 out1[0] = ((in[0] << 8) & 0x00FF0000) | ((in[0] >> 0) & 0x000000FF);
7644 }
7645
7646 static void append_0x01_1 (u32x w0[4], const u32 offset)
7647 {
7648 switch (offset)
7649 {
7650 case 0:
7651 w0[0] = 0x01;
7652 break;
7653
7654 case 1:
7655 w0[0] = w0[0] | 0x0100;
7656 break;
7657
7658 case 2:
7659 w0[0] = w0[0] | 0x010000;
7660 break;
7661
7662 case 3:
7663 w0[0] = w0[0] | 0x01000000;
7664 break;
7665
7666 case 4:
7667 w0[1] = 0x01;
7668 break;
7669
7670 case 5:
7671 w0[1] = w0[1] | 0x0100;
7672 break;
7673
7674 case 6:
7675 w0[1] = w0[1] | 0x010000;
7676 break;
7677
7678 case 7:
7679 w0[1] = w0[1] | 0x01000000;
7680 break;
7681
7682 case 8:
7683 w0[2] = 0x01;
7684 break;
7685
7686 case 9:
7687 w0[2] = w0[2] | 0x0100;
7688 break;
7689
7690 case 10:
7691 w0[2] = w0[2] | 0x010000;
7692 break;
7693
7694 case 11:
7695 w0[2] = w0[2] | 0x01000000;
7696 break;
7697
7698 case 12:
7699 w0[3] = 0x01;
7700 break;
7701
7702 case 13:
7703 w0[3] = w0[3] | 0x0100;
7704 break;
7705
7706 case 14:
7707 w0[3] = w0[3] | 0x010000;
7708 break;
7709
7710 case 15:
7711 w0[3] = w0[3] | 0x01000000;
7712 break;
7713 }
7714 }
7715
7716 static void append_0x01_2 (u32x w0[4], u32x w1[4], const u32 offset)
7717 {
7718 switch (offset)
7719 {
7720 case 0:
7721 w0[0] = 0x01;
7722 break;
7723
7724 case 1:
7725 w0[0] = w0[0] | 0x0100;
7726 break;
7727
7728 case 2:
7729 w0[0] = w0[0] | 0x010000;
7730 break;
7731
7732 case 3:
7733 w0[0] = w0[0] | 0x01000000;
7734 break;
7735
7736 case 4:
7737 w0[1] = 0x01;
7738 break;
7739
7740 case 5:
7741 w0[1] = w0[1] | 0x0100;
7742 break;
7743
7744 case 6:
7745 w0[1] = w0[1] | 0x010000;
7746 break;
7747
7748 case 7:
7749 w0[1] = w0[1] | 0x01000000;
7750 break;
7751
7752 case 8:
7753 w0[2] = 0x01;
7754 break;
7755
7756 case 9:
7757 w0[2] = w0[2] | 0x0100;
7758 break;
7759
7760 case 10:
7761 w0[2] = w0[2] | 0x010000;
7762 break;
7763
7764 case 11:
7765 w0[2] = w0[2] | 0x01000000;
7766 break;
7767
7768 case 12:
7769 w0[3] = 0x01;
7770 break;
7771
7772 case 13:
7773 w0[3] = w0[3] | 0x0100;
7774 break;
7775
7776 case 14:
7777 w0[3] = w0[3] | 0x010000;
7778 break;
7779
7780 case 15:
7781 w0[3] = w0[3] | 0x01000000;
7782 break;
7783
7784 case 16:
7785 w1[0] = 0x01;
7786 break;
7787
7788 case 17:
7789 w1[0] = w1[0] | 0x0100;
7790 break;
7791
7792 case 18:
7793 w1[0] = w1[0] | 0x010000;
7794 break;
7795
7796 case 19:
7797 w1[0] = w1[0] | 0x01000000;
7798 break;
7799
7800 case 20:
7801 w1[1] = 0x01;
7802 break;
7803
7804 case 21:
7805 w1[1] = w1[1] | 0x0100;
7806 break;
7807
7808 case 22:
7809 w1[1] = w1[1] | 0x010000;
7810 break;
7811
7812 case 23:
7813 w1[1] = w1[1] | 0x01000000;
7814 break;
7815
7816 case 24:
7817 w1[2] = 0x01;
7818 break;
7819
7820 case 25:
7821 w1[2] = w1[2] | 0x0100;
7822 break;
7823
7824 case 26:
7825 w1[2] = w1[2] | 0x010000;
7826 break;
7827
7828 case 27:
7829 w1[2] = w1[2] | 0x01000000;
7830 break;
7831
7832 case 28:
7833 w1[3] = 0x01;
7834 break;
7835
7836 case 29:
7837 w1[3] = w1[3] | 0x0100;
7838 break;
7839
7840 case 30:
7841 w1[3] = w1[3] | 0x010000;
7842 break;
7843
7844 case 31:
7845 w1[3] = w1[3] | 0x01000000;
7846 break;
7847 }
7848 }
7849
7850 static void append_0x01_3 (u32x w0[4], u32x w1[4], u32x w2[4], const u32 offset)
7851 {
7852 switch (offset)
7853 {
7854 case 0:
7855 w0[0] = 0x01;
7856 break;
7857
7858 case 1:
7859 w0[0] = w0[0] | 0x0100;
7860 break;
7861
7862 case 2:
7863 w0[0] = w0[0] | 0x010000;
7864 break;
7865
7866 case 3:
7867 w0[0] = w0[0] | 0x01000000;
7868 break;
7869
7870 case 4:
7871 w0[1] = 0x01;
7872 break;
7873
7874 case 5:
7875 w0[1] = w0[1] | 0x0100;
7876 break;
7877
7878 case 6:
7879 w0[1] = w0[1] | 0x010000;
7880 break;
7881
7882 case 7:
7883 w0[1] = w0[1] | 0x01000000;
7884 break;
7885
7886 case 8:
7887 w0[2] = 0x01;
7888 break;
7889
7890 case 9:
7891 w0[2] = w0[2] | 0x0100;
7892 break;
7893
7894 case 10:
7895 w0[2] = w0[2] | 0x010000;
7896 break;
7897
7898 case 11:
7899 w0[2] = w0[2] | 0x01000000;
7900 break;
7901
7902 case 12:
7903 w0[3] = 0x01;
7904 break;
7905
7906 case 13:
7907 w0[3] = w0[3] | 0x0100;
7908 break;
7909
7910 case 14:
7911 w0[3] = w0[3] | 0x010000;
7912 break;
7913
7914 case 15:
7915 w0[3] = w0[3] | 0x01000000;
7916 break;
7917
7918 case 16:
7919 w1[0] = 0x01;
7920 break;
7921
7922 case 17:
7923 w1[0] = w1[0] | 0x0100;
7924 break;
7925
7926 case 18:
7927 w1[0] = w1[0] | 0x010000;
7928 break;
7929
7930 case 19:
7931 w1[0] = w1[0] | 0x01000000;
7932 break;
7933
7934 case 20:
7935 w1[1] = 0x01;
7936 break;
7937
7938 case 21:
7939 w1[1] = w1[1] | 0x0100;
7940 break;
7941
7942 case 22:
7943 w1[1] = w1[1] | 0x010000;
7944 break;
7945
7946 case 23:
7947 w1[1] = w1[1] | 0x01000000;
7948 break;
7949
7950 case 24:
7951 w1[2] = 0x01;
7952 break;
7953
7954 case 25:
7955 w1[2] = w1[2] | 0x0100;
7956 break;
7957
7958 case 26:
7959 w1[2] = w1[2] | 0x010000;
7960 break;
7961
7962 case 27:
7963 w1[2] = w1[2] | 0x01000000;
7964 break;
7965
7966 case 28:
7967 w1[3] = 0x01;
7968 break;
7969
7970 case 29:
7971 w1[3] = w1[3] | 0x0100;
7972 break;
7973
7974 case 30:
7975 w1[3] = w1[3] | 0x010000;
7976 break;
7977
7978 case 31:
7979 w1[3] = w1[3] | 0x01000000;
7980 break;
7981
7982 case 32:
7983 w2[0] = 0x01;
7984 break;
7985
7986 case 33:
7987 w2[0] = w2[0] | 0x0100;
7988 break;
7989
7990 case 34:
7991 w2[0] = w2[0] | 0x010000;
7992 break;
7993
7994 case 35:
7995 w2[0] = w2[0] | 0x01000000;
7996 break;
7997
7998 case 36:
7999 w2[1] = 0x01;
8000 break;
8001
8002 case 37:
8003 w2[1] = w2[1] | 0x0100;
8004 break;
8005
8006 case 38:
8007 w2[1] = w2[1] | 0x010000;
8008 break;
8009
8010 case 39:
8011 w2[1] = w2[1] | 0x01000000;
8012 break;
8013
8014 case 40:
8015 w2[2] = 0x01;
8016 break;
8017
8018 case 41:
8019 w2[2] = w2[2] | 0x0100;
8020 break;
8021
8022 case 42:
8023 w2[2] = w2[2] | 0x010000;
8024 break;
8025
8026 case 43:
8027 w2[2] = w2[2] | 0x01000000;
8028 break;
8029
8030 case 44:
8031 w2[3] = 0x01;
8032 break;
8033
8034 case 45:
8035 w2[3] = w2[3] | 0x0100;
8036 break;
8037
8038 case 46:
8039 w2[3] = w2[3] | 0x010000;
8040 break;
8041
8042 case 47:
8043 w2[3] = w2[3] | 0x01000000;
8044 break;
8045 }
8046 }
8047
8048 static void append_0x01_4 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 offset)
8049 {
8050 switch (offset)
8051 {
8052 case 0:
8053 w0[0] = 0x01;
8054 break;
8055
8056 case 1:
8057 w0[0] = w0[0] | 0x0100;
8058 break;
8059
8060 case 2:
8061 w0[0] = w0[0] | 0x010000;
8062 break;
8063
8064 case 3:
8065 w0[0] = w0[0] | 0x01000000;
8066 break;
8067
8068 case 4:
8069 w0[1] = 0x01;
8070 break;
8071
8072 case 5:
8073 w0[1] = w0[1] | 0x0100;
8074 break;
8075
8076 case 6:
8077 w0[1] = w0[1] | 0x010000;
8078 break;
8079
8080 case 7:
8081 w0[1] = w0[1] | 0x01000000;
8082 break;
8083
8084 case 8:
8085 w0[2] = 0x01;
8086 break;
8087
8088 case 9:
8089 w0[2] = w0[2] | 0x0100;
8090 break;
8091
8092 case 10:
8093 w0[2] = w0[2] | 0x010000;
8094 break;
8095
8096 case 11:
8097 w0[2] = w0[2] | 0x01000000;
8098 break;
8099
8100 case 12:
8101 w0[3] = 0x01;
8102 break;
8103
8104 case 13:
8105 w0[3] = w0[3] | 0x0100;
8106 break;
8107
8108 case 14:
8109 w0[3] = w0[3] | 0x010000;
8110 break;
8111
8112 case 15:
8113 w0[3] = w0[3] | 0x01000000;
8114 break;
8115
8116 case 16:
8117 w1[0] = 0x01;
8118 break;
8119
8120 case 17:
8121 w1[0] = w1[0] | 0x0100;
8122 break;
8123
8124 case 18:
8125 w1[0] = w1[0] | 0x010000;
8126 break;
8127
8128 case 19:
8129 w1[0] = w1[0] | 0x01000000;
8130 break;
8131
8132 case 20:
8133 w1[1] = 0x01;
8134 break;
8135
8136 case 21:
8137 w1[1] = w1[1] | 0x0100;
8138 break;
8139
8140 case 22:
8141 w1[1] = w1[1] | 0x010000;
8142 break;
8143
8144 case 23:
8145 w1[1] = w1[1] | 0x01000000;
8146 break;
8147
8148 case 24:
8149 w1[2] = 0x01;
8150 break;
8151
8152 case 25:
8153 w1[2] = w1[2] | 0x0100;
8154 break;
8155
8156 case 26:
8157 w1[2] = w1[2] | 0x010000;
8158 break;
8159
8160 case 27:
8161 w1[2] = w1[2] | 0x01000000;
8162 break;
8163
8164 case 28:
8165 w1[3] = 0x01;
8166 break;
8167
8168 case 29:
8169 w1[3] = w1[3] | 0x0100;
8170 break;
8171
8172 case 30:
8173 w1[3] = w1[3] | 0x010000;
8174 break;
8175
8176 case 31:
8177 w1[3] = w1[3] | 0x01000000;
8178 break;
8179
8180 case 32:
8181 w2[0] = 0x01;
8182 break;
8183
8184 case 33:
8185 w2[0] = w2[0] | 0x0100;
8186 break;
8187
8188 case 34:
8189 w2[0] = w2[0] | 0x010000;
8190 break;
8191
8192 case 35:
8193 w2[0] = w2[0] | 0x01000000;
8194 break;
8195
8196 case 36:
8197 w2[1] = 0x01;
8198 break;
8199
8200 case 37:
8201 w2[1] = w2[1] | 0x0100;
8202 break;
8203
8204 case 38:
8205 w2[1] = w2[1] | 0x010000;
8206 break;
8207
8208 case 39:
8209 w2[1] = w2[1] | 0x01000000;
8210 break;
8211
8212 case 40:
8213 w2[2] = 0x01;
8214 break;
8215
8216 case 41:
8217 w2[2] = w2[2] | 0x0100;
8218 break;
8219
8220 case 42:
8221 w2[2] = w2[2] | 0x010000;
8222 break;
8223
8224 case 43:
8225 w2[2] = w2[2] | 0x01000000;
8226 break;
8227
8228 case 44:
8229 w2[3] = 0x01;
8230 break;
8231
8232 case 45:
8233 w2[3] = w2[3] | 0x0100;
8234 break;
8235
8236 case 46:
8237 w2[3] = w2[3] | 0x010000;
8238 break;
8239
8240 case 47:
8241 w2[3] = w2[3] | 0x01000000;
8242 break;
8243
8244 case 48:
8245 w3[0] = 0x01;
8246 break;
8247
8248 case 49:
8249 w3[0] = w3[0] | 0x0100;
8250 break;
8251
8252 case 50:
8253 w3[0] = w3[0] | 0x010000;
8254 break;
8255
8256 case 51:
8257 w3[0] = w3[0] | 0x01000000;
8258 break;
8259
8260 case 52:
8261 w3[1] = 0x01;
8262 break;
8263
8264 case 53:
8265 w3[1] = w3[1] | 0x0100;
8266 break;
8267
8268 case 54:
8269 w3[1] = w3[1] | 0x010000;
8270 break;
8271
8272 case 55:
8273 w3[1] = w3[1] | 0x01000000;
8274 break;
8275
8276 case 56:
8277 w3[2] = 0x01;
8278 break;
8279
8280 case 57:
8281 w3[2] = w3[2] | 0x0100;
8282 break;
8283
8284 case 58:
8285 w3[2] = w3[2] | 0x010000;
8286 break;
8287
8288 case 59:
8289 w3[2] = w3[2] | 0x01000000;
8290 break;
8291
8292 case 60:
8293 w3[3] = 0x01;
8294 break;
8295
8296 case 61:
8297 w3[3] = w3[3] | 0x0100;
8298 break;
8299
8300 case 62:
8301 w3[3] = w3[3] | 0x010000;
8302 break;
8303
8304 case 63:
8305 w3[3] = w3[3] | 0x01000000;
8306 break;
8307 }
8308 }
8309
8310 static void append_0x01_8 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], u32x w4[4], u32x w5[4], u32x w6[4], u32x w7[4], const u32 offset)
8311 {
8312 switch (offset)
8313 {
8314 case 0:
8315 w0[0] = 0x01;
8316 break;
8317
8318 case 1:
8319 w0[0] = w0[0] | 0x0100;
8320 break;
8321
8322 case 2:
8323 w0[0] = w0[0] | 0x010000;
8324 break;
8325
8326 case 3:
8327 w0[0] = w0[0] | 0x01000000;
8328 break;
8329
8330 case 4:
8331 w0[1] = 0x01;
8332 break;
8333
8334 case 5:
8335 w0[1] = w0[1] | 0x0100;
8336 break;
8337
8338 case 6:
8339 w0[1] = w0[1] | 0x010000;
8340 break;
8341
8342 case 7:
8343 w0[1] = w0[1] | 0x01000000;
8344 break;
8345
8346 case 8:
8347 w0[2] = 0x01;
8348 break;
8349
8350 case 9:
8351 w0[2] = w0[2] | 0x0100;
8352 break;
8353
8354 case 10:
8355 w0[2] = w0[2] | 0x010000;
8356 break;
8357
8358 case 11:
8359 w0[2] = w0[2] | 0x01000000;
8360 break;
8361
8362 case 12:
8363 w0[3] = 0x01;
8364 break;
8365
8366 case 13:
8367 w0[3] = w0[3] | 0x0100;
8368 break;
8369
8370 case 14:
8371 w0[3] = w0[3] | 0x010000;
8372 break;
8373
8374 case 15:
8375 w0[3] = w0[3] | 0x01000000;
8376 break;
8377
8378 case 16:
8379 w1[0] = 0x01;
8380 break;
8381
8382 case 17:
8383 w1[0] = w1[0] | 0x0100;
8384 break;
8385
8386 case 18:
8387 w1[0] = w1[0] | 0x010000;
8388 break;
8389
8390 case 19:
8391 w1[0] = w1[0] | 0x01000000;
8392 break;
8393
8394 case 20:
8395 w1[1] = 0x01;
8396 break;
8397
8398 case 21:
8399 w1[1] = w1[1] | 0x0100;
8400 break;
8401
8402 case 22:
8403 w1[1] = w1[1] | 0x010000;
8404 break;
8405
8406 case 23:
8407 w1[1] = w1[1] | 0x01000000;
8408 break;
8409
8410 case 24:
8411 w1[2] = 0x01;
8412 break;
8413
8414 case 25:
8415 w1[2] = w1[2] | 0x0100;
8416 break;
8417
8418 case 26:
8419 w1[2] = w1[2] | 0x010000;
8420 break;
8421
8422 case 27:
8423 w1[2] = w1[2] | 0x01000000;
8424 break;
8425
8426 case 28:
8427 w1[3] = 0x01;
8428 break;
8429
8430 case 29:
8431 w1[3] = w1[3] | 0x0100;
8432 break;
8433
8434 case 30:
8435 w1[3] = w1[3] | 0x010000;
8436 break;
8437
8438 case 31:
8439 w1[3] = w1[3] | 0x01000000;
8440 break;
8441
8442 case 32:
8443 w2[0] = 0x01;
8444 break;
8445
8446 case 33:
8447 w2[0] = w2[0] | 0x0100;
8448 break;
8449
8450 case 34:
8451 w2[0] = w2[0] | 0x010000;
8452 break;
8453
8454 case 35:
8455 w2[0] = w2[0] | 0x01000000;
8456 break;
8457
8458 case 36:
8459 w2[1] = 0x01;
8460 break;
8461
8462 case 37:
8463 w2[1] = w2[1] | 0x0100;
8464 break;
8465
8466 case 38:
8467 w2[1] = w2[1] | 0x010000;
8468 break;
8469
8470 case 39:
8471 w2[1] = w2[1] | 0x01000000;
8472 break;
8473
8474 case 40:
8475 w2[2] = 0x01;
8476 break;
8477
8478 case 41:
8479 w2[2] = w2[2] | 0x0100;
8480 break;
8481
8482 case 42:
8483 w2[2] = w2[2] | 0x010000;
8484 break;
8485
8486 case 43:
8487 w2[2] = w2[2] | 0x01000000;
8488 break;
8489
8490 case 44:
8491 w2[3] = 0x01;
8492 break;
8493
8494 case 45:
8495 w2[3] = w2[3] | 0x0100;
8496 break;
8497
8498 case 46:
8499 w2[3] = w2[3] | 0x010000;
8500 break;
8501
8502 case 47:
8503 w2[3] = w2[3] | 0x01000000;
8504 break;
8505
8506 case 48:
8507 w3[0] = 0x01;
8508 break;
8509
8510 case 49:
8511 w3[0] = w3[0] | 0x0100;
8512 break;
8513
8514 case 50:
8515 w3[0] = w3[0] | 0x010000;
8516 break;
8517
8518 case 51:
8519 w3[0] = w3[0] | 0x01000000;
8520 break;
8521
8522 case 52:
8523 w3[1] = 0x01;
8524 break;
8525
8526 case 53:
8527 w3[1] = w3[1] | 0x0100;
8528 break;
8529
8530 case 54:
8531 w3[1] = w3[1] | 0x010000;
8532 break;
8533
8534 case 55:
8535 w3[1] = w3[1] | 0x01000000;
8536 break;
8537
8538 case 56:
8539 w3[2] = 0x01;
8540 break;
8541
8542 case 57:
8543 w3[2] = w3[2] | 0x0100;
8544 break;
8545
8546 case 58:
8547 w3[2] = w3[2] | 0x010000;
8548 break;
8549
8550 case 59:
8551 w3[2] = w3[2] | 0x01000000;
8552 break;
8553
8554 case 60:
8555 w3[3] = 0x01;
8556 break;
8557
8558 case 61:
8559 w3[3] = w3[3] | 0x0100;
8560 break;
8561
8562 case 62:
8563 w3[3] = w3[3] | 0x010000;
8564 break;
8565
8566 case 63:
8567 w3[3] = w3[3] | 0x01000000;
8568 break;
8569
8570 case 64:
8571 w4[0] = 0x01;
8572 break;
8573
8574 case 65:
8575 w4[0] = w4[0] | 0x0100;
8576 break;
8577
8578 case 66:
8579 w4[0] = w4[0] | 0x010000;
8580 break;
8581
8582 case 67:
8583 w4[0] = w4[0] | 0x01000000;
8584 break;
8585
8586 case 68:
8587 w4[1] = 0x01;
8588 break;
8589
8590 case 69:
8591 w4[1] = w4[1] | 0x0100;
8592 break;
8593
8594 case 70:
8595 w4[1] = w4[1] | 0x010000;
8596 break;
8597
8598 case 71:
8599 w4[1] = w4[1] | 0x01000000;
8600 break;
8601
8602 case 72:
8603 w4[2] = 0x01;
8604 break;
8605
8606 case 73:
8607 w4[2] = w4[2] | 0x0100;
8608 break;
8609
8610 case 74:
8611 w4[2] = w4[2] | 0x010000;
8612 break;
8613
8614 case 75:
8615 w4[2] = w4[2] | 0x01000000;
8616 break;
8617
8618 case 76:
8619 w4[3] = 0x01;
8620 break;
8621
8622 case 77:
8623 w4[3] = w4[3] | 0x0100;
8624 break;
8625
8626 case 78:
8627 w4[3] = w4[3] | 0x010000;
8628 break;
8629
8630 case 79:
8631 w4[3] = w4[3] | 0x01000000;
8632 break;
8633
8634 case 80:
8635 w5[0] = 0x01;
8636 break;
8637
8638 case 81:
8639 w5[0] = w5[0] | 0x0100;
8640 break;
8641
8642 case 82:
8643 w5[0] = w5[0] | 0x010000;
8644 break;
8645
8646 case 83:
8647 w5[0] = w5[0] | 0x01000000;
8648 break;
8649
8650 case 84:
8651 w5[1] = 0x01;
8652 break;
8653
8654 case 85:
8655 w5[1] = w5[1] | 0x0100;
8656 break;
8657
8658 case 86:
8659 w5[1] = w5[1] | 0x010000;
8660 break;
8661
8662 case 87:
8663 w5[1] = w5[1] | 0x01000000;
8664 break;
8665
8666 case 88:
8667 w5[2] = 0x01;
8668 break;
8669
8670 case 89:
8671 w5[2] = w5[2] | 0x0100;
8672 break;
8673
8674 case 90:
8675 w5[2] = w5[2] | 0x010000;
8676 break;
8677
8678 case 91:
8679 w5[2] = w5[2] | 0x01000000;
8680 break;
8681
8682 case 92:
8683 w5[3] = 0x01;
8684 break;
8685
8686 case 93:
8687 w5[3] = w5[3] | 0x0100;
8688 break;
8689
8690 case 94:
8691 w5[3] = w5[3] | 0x010000;
8692 break;
8693
8694 case 95:
8695 w5[3] = w5[3] | 0x01000000;
8696 break;
8697
8698 case 96:
8699 w6[0] = 0x01;
8700 break;
8701
8702 case 97:
8703 w6[0] = w6[0] | 0x0100;
8704 break;
8705
8706 case 98:
8707 w6[0] = w6[0] | 0x010000;
8708 break;
8709
8710 case 99:
8711 w6[0] = w6[0] | 0x01000000;
8712 break;
8713
8714 case 100:
8715 w6[1] = 0x01;
8716 break;
8717
8718 case 101:
8719 w6[1] = w6[1] | 0x0100;
8720 break;
8721
8722 case 102:
8723 w6[1] = w6[1] | 0x010000;
8724 break;
8725
8726 case 103:
8727 w6[1] = w6[1] | 0x01000000;
8728 break;
8729
8730 case 104:
8731 w6[2] = 0x01;
8732 break;
8733
8734 case 105:
8735 w6[2] = w6[2] | 0x0100;
8736 break;
8737
8738 case 106:
8739 w6[2] = w6[2] | 0x010000;
8740 break;
8741
8742 case 107:
8743 w6[2] = w6[2] | 0x01000000;
8744 break;
8745
8746 case 108:
8747 w6[3] = 0x01;
8748 break;
8749
8750 case 109:
8751 w6[3] = w6[3] | 0x0100;
8752 break;
8753
8754 case 110:
8755 w6[3] = w6[3] | 0x010000;
8756 break;
8757
8758 case 111:
8759 w6[3] = w6[3] | 0x01000000;
8760 break;
8761
8762 case 112:
8763 w7[0] = 0x01;
8764 break;
8765
8766 case 113:
8767 w7[0] = w7[0] | 0x0100;
8768 break;
8769
8770 case 114:
8771 w7[0] = w7[0] | 0x010000;
8772 break;
8773
8774 case 115:
8775 w7[0] = w7[0] | 0x01000000;
8776 break;
8777
8778 case 116:
8779 w7[1] = 0x01;
8780 break;
8781
8782 case 117:
8783 w7[1] = w7[1] | 0x0100;
8784 break;
8785
8786 case 118:
8787 w7[1] = w7[1] | 0x010000;
8788 break;
8789
8790 case 119:
8791 w7[1] = w7[1] | 0x01000000;
8792 break;
8793
8794 case 120:
8795 w7[2] = 0x01;
8796 break;
8797
8798 case 121:
8799 w7[2] = w7[2] | 0x0100;
8800 break;
8801
8802 case 122:
8803 w7[2] = w7[2] | 0x010000;
8804 break;
8805
8806 case 123:
8807 w7[2] = w7[2] | 0x01000000;
8808 break;
8809
8810 case 124:
8811 w7[3] = 0x01;
8812 break;
8813
8814 case 125:
8815 w7[3] = w7[3] | 0x0100;
8816 break;
8817
8818 case 126:
8819 w7[3] = w7[3] | 0x010000;
8820 break;
8821
8822 case 127:
8823 w7[3] = w7[3] | 0x01000000;
8824 break;
8825 }
8826 }
8827
8828 static void append_0x02_1 (u32x w0[4], const u32 offset)
8829 {
8830 switch (offset)
8831 {
8832 case 0:
8833 w0[0] = 0x02;
8834 break;
8835
8836 case 1:
8837 w0[0] = w0[0] | 0x0200;
8838 break;
8839
8840 case 2:
8841 w0[0] = w0[0] | 0x020000;
8842 break;
8843
8844 case 3:
8845 w0[0] = w0[0] | 0x02000000;
8846 break;
8847
8848 case 4:
8849 w0[1] = 0x02;
8850 break;
8851
8852 case 5:
8853 w0[1] = w0[1] | 0x0200;
8854 break;
8855
8856 case 6:
8857 w0[1] = w0[1] | 0x020000;
8858 break;
8859
8860 case 7:
8861 w0[1] = w0[1] | 0x02000000;
8862 break;
8863
8864 case 8:
8865 w0[2] = 0x02;
8866 break;
8867
8868 case 9:
8869 w0[2] = w0[2] | 0x0200;
8870 break;
8871
8872 case 10:
8873 w0[2] = w0[2] | 0x020000;
8874 break;
8875
8876 case 11:
8877 w0[2] = w0[2] | 0x02000000;
8878 break;
8879
8880 case 12:
8881 w0[3] = 0x02;
8882 break;
8883
8884 case 13:
8885 w0[3] = w0[3] | 0x0200;
8886 break;
8887
8888 case 14:
8889 w0[3] = w0[3] | 0x020000;
8890 break;
8891
8892 case 15:
8893 w0[3] = w0[3] | 0x02000000;
8894 break;
8895 }
8896 }
8897
8898 static void append_0x02_2 (u32x w0[4], u32x w1[4], const u32 offset)
8899 {
8900 switch (offset)
8901 {
8902 case 0:
8903 w0[0] = 0x02;
8904 break;
8905
8906 case 1:
8907 w0[0] = w0[0] | 0x0200;
8908 break;
8909
8910 case 2:
8911 w0[0] = w0[0] | 0x020000;
8912 break;
8913
8914 case 3:
8915 w0[0] = w0[0] | 0x02000000;
8916 break;
8917
8918 case 4:
8919 w0[1] = 0x02;
8920 break;
8921
8922 case 5:
8923 w0[1] = w0[1] | 0x0200;
8924 break;
8925
8926 case 6:
8927 w0[1] = w0[1] | 0x020000;
8928 break;
8929
8930 case 7:
8931 w0[1] = w0[1] | 0x02000000;
8932 break;
8933
8934 case 8:
8935 w0[2] = 0x02;
8936 break;
8937
8938 case 9:
8939 w0[2] = w0[2] | 0x0200;
8940 break;
8941
8942 case 10:
8943 w0[2] = w0[2] | 0x020000;
8944 break;
8945
8946 case 11:
8947 w0[2] = w0[2] | 0x02000000;
8948 break;
8949
8950 case 12:
8951 w0[3] = 0x02;
8952 break;
8953
8954 case 13:
8955 w0[3] = w0[3] | 0x0200;
8956 break;
8957
8958 case 14:
8959 w0[3] = w0[3] | 0x020000;
8960 break;
8961
8962 case 15:
8963 w0[3] = w0[3] | 0x02000000;
8964 break;
8965
8966 case 16:
8967 w1[0] = 0x02;
8968 break;
8969
8970 case 17:
8971 w1[0] = w1[0] | 0x0200;
8972 break;
8973
8974 case 18:
8975 w1[0] = w1[0] | 0x020000;
8976 break;
8977
8978 case 19:
8979 w1[0] = w1[0] | 0x02000000;
8980 break;
8981
8982 case 20:
8983 w1[1] = 0x02;
8984 break;
8985
8986 case 21:
8987 w1[1] = w1[1] | 0x0200;
8988 break;
8989
8990 case 22:
8991 w1[1] = w1[1] | 0x020000;
8992 break;
8993
8994 case 23:
8995 w1[1] = w1[1] | 0x02000000;
8996 break;
8997
8998 case 24:
8999 w1[2] = 0x02;
9000 break;
9001
9002 case 25:
9003 w1[2] = w1[2] | 0x0200;
9004 break;
9005
9006 case 26:
9007 w1[2] = w1[2] | 0x020000;
9008 break;
9009
9010 case 27:
9011 w1[2] = w1[2] | 0x02000000;
9012 break;
9013
9014 case 28:
9015 w1[3] = 0x02;
9016 break;
9017
9018 case 29:
9019 w1[3] = w1[3] | 0x0200;
9020 break;
9021
9022 case 30:
9023 w1[3] = w1[3] | 0x020000;
9024 break;
9025
9026 case 31:
9027 w1[3] = w1[3] | 0x02000000;
9028 break;
9029 }
9030 }
9031
9032 static void append_0x02_3 (u32x w0[4], u32x w1[4], u32x w2[4], const u32 offset)
9033 {
9034 switch (offset)
9035 {
9036 case 0:
9037 w0[0] = 0x02;
9038 break;
9039
9040 case 1:
9041 w0[0] = w0[0] | 0x0200;
9042 break;
9043
9044 case 2:
9045 w0[0] = w0[0] | 0x020000;
9046 break;
9047
9048 case 3:
9049 w0[0] = w0[0] | 0x02000000;
9050 break;
9051
9052 case 4:
9053 w0[1] = 0x02;
9054 break;
9055
9056 case 5:
9057 w0[1] = w0[1] | 0x0200;
9058 break;
9059
9060 case 6:
9061 w0[1] = w0[1] | 0x020000;
9062 break;
9063
9064 case 7:
9065 w0[1] = w0[1] | 0x02000000;
9066 break;
9067
9068 case 8:
9069 w0[2] = 0x02;
9070 break;
9071
9072 case 9:
9073 w0[2] = w0[2] | 0x0200;
9074 break;
9075
9076 case 10:
9077 w0[2] = w0[2] | 0x020000;
9078 break;
9079
9080 case 11:
9081 w0[2] = w0[2] | 0x02000000;
9082 break;
9083
9084 case 12:
9085 w0[3] = 0x02;
9086 break;
9087
9088 case 13:
9089 w0[3] = w0[3] | 0x0200;
9090 break;
9091
9092 case 14:
9093 w0[3] = w0[3] | 0x020000;
9094 break;
9095
9096 case 15:
9097 w0[3] = w0[3] | 0x02000000;
9098 break;
9099
9100 case 16:
9101 w1[0] = 0x02;
9102 break;
9103
9104 case 17:
9105 w1[0] = w1[0] | 0x0200;
9106 break;
9107
9108 case 18:
9109 w1[0] = w1[0] | 0x020000;
9110 break;
9111
9112 case 19:
9113 w1[0] = w1[0] | 0x02000000;
9114 break;
9115
9116 case 20:
9117 w1[1] = 0x02;
9118 break;
9119
9120 case 21:
9121 w1[1] = w1[1] | 0x0200;
9122 break;
9123
9124 case 22:
9125 w1[1] = w1[1] | 0x020000;
9126 break;
9127
9128 case 23:
9129 w1[1] = w1[1] | 0x02000000;
9130 break;
9131
9132 case 24:
9133 w1[2] = 0x02;
9134 break;
9135
9136 case 25:
9137 w1[2] = w1[2] | 0x0200;
9138 break;
9139
9140 case 26:
9141 w1[2] = w1[2] | 0x020000;
9142 break;
9143
9144 case 27:
9145 w1[2] = w1[2] | 0x02000000;
9146 break;
9147
9148 case 28:
9149 w1[3] = 0x02;
9150 break;
9151
9152 case 29:
9153 w1[3] = w1[3] | 0x0200;
9154 break;
9155
9156 case 30:
9157 w1[3] = w1[3] | 0x020000;
9158 break;
9159
9160 case 31:
9161 w1[3] = w1[3] | 0x02000000;
9162 break;
9163
9164 case 32:
9165 w2[0] = 0x02;
9166 break;
9167
9168 case 33:
9169 w2[0] = w2[0] | 0x0200;
9170 break;
9171
9172 case 34:
9173 w2[0] = w2[0] | 0x020000;
9174 break;
9175
9176 case 35:
9177 w2[0] = w2[0] | 0x02000000;
9178 break;
9179
9180 case 36:
9181 w2[1] = 0x02;
9182 break;
9183
9184 case 37:
9185 w2[1] = w2[1] | 0x0200;
9186 break;
9187
9188 case 38:
9189 w2[1] = w2[1] | 0x020000;
9190 break;
9191
9192 case 39:
9193 w2[1] = w2[1] | 0x02000000;
9194 break;
9195
9196 case 40:
9197 w2[2] = 0x02;
9198 break;
9199
9200 case 41:
9201 w2[2] = w2[2] | 0x0200;
9202 break;
9203
9204 case 42:
9205 w2[2] = w2[2] | 0x020000;
9206 break;
9207
9208 case 43:
9209 w2[2] = w2[2] | 0x02000000;
9210 break;
9211
9212 case 44:
9213 w2[3] = 0x02;
9214 break;
9215
9216 case 45:
9217 w2[3] = w2[3] | 0x0200;
9218 break;
9219
9220 case 46:
9221 w2[3] = w2[3] | 0x020000;
9222 break;
9223
9224 case 47:
9225 w2[3] = w2[3] | 0x02000000;
9226 break;
9227 }
9228 }
9229
9230 static void append_0x02_4 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 offset)
9231 {
9232 switch (offset)
9233 {
9234 case 0:
9235 w0[0] = 0x02;
9236 break;
9237
9238 case 1:
9239 w0[0] = w0[0] | 0x0200;
9240 break;
9241
9242 case 2:
9243 w0[0] = w0[0] | 0x020000;
9244 break;
9245
9246 case 3:
9247 w0[0] = w0[0] | 0x02000000;
9248 break;
9249
9250 case 4:
9251 w0[1] = 0x02;
9252 break;
9253
9254 case 5:
9255 w0[1] = w0[1] | 0x0200;
9256 break;
9257
9258 case 6:
9259 w0[1] = w0[1] | 0x020000;
9260 break;
9261
9262 case 7:
9263 w0[1] = w0[1] | 0x02000000;
9264 break;
9265
9266 case 8:
9267 w0[2] = 0x02;
9268 break;
9269
9270 case 9:
9271 w0[2] = w0[2] | 0x0200;
9272 break;
9273
9274 case 10:
9275 w0[2] = w0[2] | 0x020000;
9276 break;
9277
9278 case 11:
9279 w0[2] = w0[2] | 0x02000000;
9280 break;
9281
9282 case 12:
9283 w0[3] = 0x02;
9284 break;
9285
9286 case 13:
9287 w0[3] = w0[3] | 0x0200;
9288 break;
9289
9290 case 14:
9291 w0[3] = w0[3] | 0x020000;
9292 break;
9293
9294 case 15:
9295 w0[3] = w0[3] | 0x02000000;
9296 break;
9297
9298 case 16:
9299 w1[0] = 0x02;
9300 break;
9301
9302 case 17:
9303 w1[0] = w1[0] | 0x0200;
9304 break;
9305
9306 case 18:
9307 w1[0] = w1[0] | 0x020000;
9308 break;
9309
9310 case 19:
9311 w1[0] = w1[0] | 0x02000000;
9312 break;
9313
9314 case 20:
9315 w1[1] = 0x02;
9316 break;
9317
9318 case 21:
9319 w1[1] = w1[1] | 0x0200;
9320 break;
9321
9322 case 22:
9323 w1[1] = w1[1] | 0x020000;
9324 break;
9325
9326 case 23:
9327 w1[1] = w1[1] | 0x02000000;
9328 break;
9329
9330 case 24:
9331 w1[2] = 0x02;
9332 break;
9333
9334 case 25:
9335 w1[2] = w1[2] | 0x0200;
9336 break;
9337
9338 case 26:
9339 w1[2] = w1[2] | 0x020000;
9340 break;
9341
9342 case 27:
9343 w1[2] = w1[2] | 0x02000000;
9344 break;
9345
9346 case 28:
9347 w1[3] = 0x02;
9348 break;
9349
9350 case 29:
9351 w1[3] = w1[3] | 0x0200;
9352 break;
9353
9354 case 30:
9355 w1[3] = w1[3] | 0x020000;
9356 break;
9357
9358 case 31:
9359 w1[3] = w1[3] | 0x02000000;
9360 break;
9361
9362 case 32:
9363 w2[0] = 0x02;
9364 break;
9365
9366 case 33:
9367 w2[0] = w2[0] | 0x0200;
9368 break;
9369
9370 case 34:
9371 w2[0] = w2[0] | 0x020000;
9372 break;
9373
9374 case 35:
9375 w2[0] = w2[0] | 0x02000000;
9376 break;
9377
9378 case 36:
9379 w2[1] = 0x02;
9380 break;
9381
9382 case 37:
9383 w2[1] = w2[1] | 0x0200;
9384 break;
9385
9386 case 38:
9387 w2[1] = w2[1] | 0x020000;
9388 break;
9389
9390 case 39:
9391 w2[1] = w2[1] | 0x02000000;
9392 break;
9393
9394 case 40:
9395 w2[2] = 0x02;
9396 break;
9397
9398 case 41:
9399 w2[2] = w2[2] | 0x0200;
9400 break;
9401
9402 case 42:
9403 w2[2] = w2[2] | 0x020000;
9404 break;
9405
9406 case 43:
9407 w2[2] = w2[2] | 0x02000000;
9408 break;
9409
9410 case 44:
9411 w2[3] = 0x02;
9412 break;
9413
9414 case 45:
9415 w2[3] = w2[3] | 0x0200;
9416 break;
9417
9418 case 46:
9419 w2[3] = w2[3] | 0x020000;
9420 break;
9421
9422 case 47:
9423 w2[3] = w2[3] | 0x02000000;
9424 break;
9425
9426 case 48:
9427 w3[0] = 0x02;
9428 break;
9429
9430 case 49:
9431 w3[0] = w3[0] | 0x0200;
9432 break;
9433
9434 case 50:
9435 w3[0] = w3[0] | 0x020000;
9436 break;
9437
9438 case 51:
9439 w3[0] = w3[0] | 0x02000000;
9440 break;
9441
9442 case 52:
9443 w3[1] = 0x02;
9444 break;
9445
9446 case 53:
9447 w3[1] = w3[1] | 0x0200;
9448 break;
9449
9450 case 54:
9451 w3[1] = w3[1] | 0x020000;
9452 break;
9453
9454 case 55:
9455 w3[1] = w3[1] | 0x02000000;
9456 break;
9457
9458 case 56:
9459 w3[2] = 0x02;
9460 break;
9461
9462 case 57:
9463 w3[2] = w3[2] | 0x0200;
9464 break;
9465
9466 case 58:
9467 w3[2] = w3[2] | 0x020000;
9468 break;
9469
9470 case 59:
9471 w3[2] = w3[2] | 0x02000000;
9472 break;
9473
9474 case 60:
9475 w3[3] = 0x02;
9476 break;
9477
9478 case 61:
9479 w3[3] = w3[3] | 0x0200;
9480 break;
9481
9482 case 62:
9483 w3[3] = w3[3] | 0x020000;
9484 break;
9485
9486 case 63:
9487 w3[3] = w3[3] | 0x02000000;
9488 break;
9489 }
9490 }
9491
9492 static void append_0x02_8 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], u32x w4[4], u32x w5[4], u32x w6[4], u32x w7[4], const u32 offset)
9493 {
9494 switch (offset)
9495 {
9496 case 0:
9497 w0[0] = 0x02;
9498 break;
9499
9500 case 1:
9501 w0[0] = w0[0] | 0x0200;
9502 break;
9503
9504 case 2:
9505 w0[0] = w0[0] | 0x020000;
9506 break;
9507
9508 case 3:
9509 w0[0] = w0[0] | 0x02000000;
9510 break;
9511
9512 case 4:
9513 w0[1] = 0x02;
9514 break;
9515
9516 case 5:
9517 w0[1] = w0[1] | 0x0200;
9518 break;
9519
9520 case 6:
9521 w0[1] = w0[1] | 0x020000;
9522 break;
9523
9524 case 7:
9525 w0[1] = w0[1] | 0x02000000;
9526 break;
9527
9528 case 8:
9529 w0[2] = 0x02;
9530 break;
9531
9532 case 9:
9533 w0[2] = w0[2] | 0x0200;
9534 break;
9535
9536 case 10:
9537 w0[2] = w0[2] | 0x020000;
9538 break;
9539
9540 case 11:
9541 w0[2] = w0[2] | 0x02000000;
9542 break;
9543
9544 case 12:
9545 w0[3] = 0x02;
9546 break;
9547
9548 case 13:
9549 w0[3] = w0[3] | 0x0200;
9550 break;
9551
9552 case 14:
9553 w0[3] = w0[3] | 0x020000;
9554 break;
9555
9556 case 15:
9557 w0[3] = w0[3] | 0x02000000;
9558 break;
9559
9560 case 16:
9561 w1[0] = 0x02;
9562 break;
9563
9564 case 17:
9565 w1[0] = w1[0] | 0x0200;
9566 break;
9567
9568 case 18:
9569 w1[0] = w1[0] | 0x020000;
9570 break;
9571
9572 case 19:
9573 w1[0] = w1[0] | 0x02000000;
9574 break;
9575
9576 case 20:
9577 w1[1] = 0x02;
9578 break;
9579
9580 case 21:
9581 w1[1] = w1[1] | 0x0200;
9582 break;
9583
9584 case 22:
9585 w1[1] = w1[1] | 0x020000;
9586 break;
9587
9588 case 23:
9589 w1[1] = w1[1] | 0x02000000;
9590 break;
9591
9592 case 24:
9593 w1[2] = 0x02;
9594 break;
9595
9596 case 25:
9597 w1[2] = w1[2] | 0x0200;
9598 break;
9599
9600 case 26:
9601 w1[2] = w1[2] | 0x020000;
9602 break;
9603
9604 case 27:
9605 w1[2] = w1[2] | 0x02000000;
9606 break;
9607
9608 case 28:
9609 w1[3] = 0x02;
9610 break;
9611
9612 case 29:
9613 w1[3] = w1[3] | 0x0200;
9614 break;
9615
9616 case 30:
9617 w1[3] = w1[3] | 0x020000;
9618 break;
9619
9620 case 31:
9621 w1[3] = w1[3] | 0x02000000;
9622 break;
9623
9624 case 32:
9625 w2[0] = 0x02;
9626 break;
9627
9628 case 33:
9629 w2[0] = w2[0] | 0x0200;
9630 break;
9631
9632 case 34:
9633 w2[0] = w2[0] | 0x020000;
9634 break;
9635
9636 case 35:
9637 w2[0] = w2[0] | 0x02000000;
9638 break;
9639
9640 case 36:
9641 w2[1] = 0x02;
9642 break;
9643
9644 case 37:
9645 w2[1] = w2[1] | 0x0200;
9646 break;
9647
9648 case 38:
9649 w2[1] = w2[1] | 0x020000;
9650 break;
9651
9652 case 39:
9653 w2[1] = w2[1] | 0x02000000;
9654 break;
9655
9656 case 40:
9657 w2[2] = 0x02;
9658 break;
9659
9660 case 41:
9661 w2[2] = w2[2] | 0x0200;
9662 break;
9663
9664 case 42:
9665 w2[2] = w2[2] | 0x020000;
9666 break;
9667
9668 case 43:
9669 w2[2] = w2[2] | 0x02000000;
9670 break;
9671
9672 case 44:
9673 w2[3] = 0x02;
9674 break;
9675
9676 case 45:
9677 w2[3] = w2[3] | 0x0200;
9678 break;
9679
9680 case 46:
9681 w2[3] = w2[3] | 0x020000;
9682 break;
9683
9684 case 47:
9685 w2[3] = w2[3] | 0x02000000;
9686 break;
9687
9688 case 48:
9689 w3[0] = 0x02;
9690 break;
9691
9692 case 49:
9693 w3[0] = w3[0] | 0x0200;
9694 break;
9695
9696 case 50:
9697 w3[0] = w3[0] | 0x020000;
9698 break;
9699
9700 case 51:
9701 w3[0] = w3[0] | 0x02000000;
9702 break;
9703
9704 case 52:
9705 w3[1] = 0x02;
9706 break;
9707
9708 case 53:
9709 w3[1] = w3[1] | 0x0200;
9710 break;
9711
9712 case 54:
9713 w3[1] = w3[1] | 0x020000;
9714 break;
9715
9716 case 55:
9717 w3[1] = w3[1] | 0x02000000;
9718 break;
9719
9720 case 56:
9721 w3[2] = 0x02;
9722 break;
9723
9724 case 57:
9725 w3[2] = w3[2] | 0x0200;
9726 break;
9727
9728 case 58:
9729 w3[2] = w3[2] | 0x020000;
9730 break;
9731
9732 case 59:
9733 w3[2] = w3[2] | 0x02000000;
9734 break;
9735
9736 case 60:
9737 w3[3] = 0x02;
9738 break;
9739
9740 case 61:
9741 w3[3] = w3[3] | 0x0200;
9742 break;
9743
9744 case 62:
9745 w3[3] = w3[3] | 0x020000;
9746 break;
9747
9748 case 63:
9749 w3[3] = w3[3] | 0x02000000;
9750 break;
9751
9752 case 64:
9753 w4[0] = 0x02;
9754 break;
9755
9756 case 65:
9757 w4[0] = w4[0] | 0x0200;
9758 break;
9759
9760 case 66:
9761 w4[0] = w4[0] | 0x020000;
9762 break;
9763
9764 case 67:
9765 w4[0] = w4[0] | 0x02000000;
9766 break;
9767
9768 case 68:
9769 w4[1] = 0x02;
9770 break;
9771
9772 case 69:
9773 w4[1] = w4[1] | 0x0200;
9774 break;
9775
9776 case 70:
9777 w4[1] = w4[1] | 0x020000;
9778 break;
9779
9780 case 71:
9781 w4[1] = w4[1] | 0x02000000;
9782 break;
9783
9784 case 72:
9785 w4[2] = 0x02;
9786 break;
9787
9788 case 73:
9789 w4[2] = w4[2] | 0x0200;
9790 break;
9791
9792 case 74:
9793 w4[2] = w4[2] | 0x020000;
9794 break;
9795
9796 case 75:
9797 w4[2] = w4[2] | 0x02000000;
9798 break;
9799
9800 case 76:
9801 w4[3] = 0x02;
9802 break;
9803
9804 case 77:
9805 w4[3] = w4[3] | 0x0200;
9806 break;
9807
9808 case 78:
9809 w4[3] = w4[3] | 0x020000;
9810 break;
9811
9812 case 79:
9813 w4[3] = w4[3] | 0x02000000;
9814 break;
9815
9816 case 80:
9817 w5[0] = 0x02;
9818 break;
9819
9820 case 81:
9821 w5[0] = w5[0] | 0x0200;
9822 break;
9823
9824 case 82:
9825 w5[0] = w5[0] | 0x020000;
9826 break;
9827
9828 case 83:
9829 w5[0] = w5[0] | 0x02000000;
9830 break;
9831
9832 case 84:
9833 w5[1] = 0x02;
9834 break;
9835
9836 case 85:
9837 w5[1] = w5[1] | 0x0200;
9838 break;
9839
9840 case 86:
9841 w5[1] = w5[1] | 0x020000;
9842 break;
9843
9844 case 87:
9845 w5[1] = w5[1] | 0x02000000;
9846 break;
9847
9848 case 88:
9849 w5[2] = 0x02;
9850 break;
9851
9852 case 89:
9853 w5[2] = w5[2] | 0x0200;
9854 break;
9855
9856 case 90:
9857 w5[2] = w5[2] | 0x020000;
9858 break;
9859
9860 case 91:
9861 w5[2] = w5[2] | 0x02000000;
9862 break;
9863
9864 case 92:
9865 w5[3] = 0x02;
9866 break;
9867
9868 case 93:
9869 w5[3] = w5[3] | 0x0200;
9870 break;
9871
9872 case 94:
9873 w5[3] = w5[3] | 0x020000;
9874 break;
9875
9876 case 95:
9877 w5[3] = w5[3] | 0x02000000;
9878 break;
9879
9880 case 96:
9881 w6[0] = 0x02;
9882 break;
9883
9884 case 97:
9885 w6[0] = w6[0] | 0x0200;
9886 break;
9887
9888 case 98:
9889 w6[0] = w6[0] | 0x020000;
9890 break;
9891
9892 case 99:
9893 w6[0] = w6[0] | 0x02000000;
9894 break;
9895
9896 case 100:
9897 w6[1] = 0x02;
9898 break;
9899
9900 case 101:
9901 w6[1] = w6[1] | 0x0200;
9902 break;
9903
9904 case 102:
9905 w6[1] = w6[1] | 0x020000;
9906 break;
9907
9908 case 103:
9909 w6[1] = w6[1] | 0x02000000;
9910 break;
9911
9912 case 104:
9913 w6[2] = 0x02;
9914 break;
9915
9916 case 105:
9917 w6[2] = w6[2] | 0x0200;
9918 break;
9919
9920 case 106:
9921 w6[2] = w6[2] | 0x020000;
9922 break;
9923
9924 case 107:
9925 w6[2] = w6[2] | 0x02000000;
9926 break;
9927
9928 case 108:
9929 w6[3] = 0x02;
9930 break;
9931
9932 case 109:
9933 w6[3] = w6[3] | 0x0200;
9934 break;
9935
9936 case 110:
9937 w6[3] = w6[3] | 0x020000;
9938 break;
9939
9940 case 111:
9941 w6[3] = w6[3] | 0x02000000;
9942 break;
9943
9944 case 112:
9945 w7[0] = 0x02;
9946 break;
9947
9948 case 113:
9949 w7[0] = w7[0] | 0x0200;
9950 break;
9951
9952 case 114:
9953 w7[0] = w7[0] | 0x020000;
9954 break;
9955
9956 case 115:
9957 w7[0] = w7[0] | 0x02000000;
9958 break;
9959
9960 case 116:
9961 w7[1] = 0x02;
9962 break;
9963
9964 case 117:
9965 w7[1] = w7[1] | 0x0200;
9966 break;
9967
9968 case 118:
9969 w7[1] = w7[1] | 0x020000;
9970 break;
9971
9972 case 119:
9973 w7[1] = w7[1] | 0x02000000;
9974 break;
9975
9976 case 120:
9977 w7[2] = 0x02;
9978 break;
9979
9980 case 121:
9981 w7[2] = w7[2] | 0x0200;
9982 break;
9983
9984 case 122:
9985 w7[2] = w7[2] | 0x020000;
9986 break;
9987
9988 case 123:
9989 w7[2] = w7[2] | 0x02000000;
9990 break;
9991
9992 case 124:
9993 w7[3] = 0x02;
9994 break;
9995
9996 case 125:
9997 w7[3] = w7[3] | 0x0200;
9998 break;
9999
10000 case 126:
10001 w7[3] = w7[3] | 0x020000;
10002 break;
10003
10004 case 127:
10005 w7[3] = w7[3] | 0x02000000;
10006 break;
10007 }
10008 }
10009
10010 static void append_0x80_1 (u32x w0[4], const u32 offset)
10011 {
10012 switch (offset)
10013 {
10014 case 0:
10015 w0[0] = 0x80;
10016 break;
10017
10018 case 1:
10019 w0[0] = w0[0] | 0x8000;
10020 break;
10021
10022 case 2:
10023 w0[0] = w0[0] | 0x800000;
10024 break;
10025
10026 case 3:
10027 w0[0] = w0[0] | 0x80000000;
10028 break;
10029
10030 case 4:
10031 w0[1] = 0x80;
10032 break;
10033
10034 case 5:
10035 w0[1] = w0[1] | 0x8000;
10036 break;
10037
10038 case 6:
10039 w0[1] = w0[1] | 0x800000;
10040 break;
10041
10042 case 7:
10043 w0[1] = w0[1] | 0x80000000;
10044 break;
10045
10046 case 8:
10047 w0[2] = 0x80;
10048 break;
10049
10050 case 9:
10051 w0[2] = w0[2] | 0x8000;
10052 break;
10053
10054 case 10:
10055 w0[2] = w0[2] | 0x800000;
10056 break;
10057
10058 case 11:
10059 w0[2] = w0[2] | 0x80000000;
10060 break;
10061
10062 case 12:
10063 w0[3] = 0x80;
10064 break;
10065
10066 case 13:
10067 w0[3] = w0[3] | 0x8000;
10068 break;
10069
10070 case 14:
10071 w0[3] = w0[3] | 0x800000;
10072 break;
10073
10074 case 15:
10075 w0[3] = w0[3] | 0x80000000;
10076 break;
10077 }
10078 }
10079
10080 static void append_0x80_2 (u32x w0[4], u32x w1[4], const u32 offset)
10081 {
10082 switch (offset)
10083 {
10084 case 0:
10085 w0[0] = 0x80;
10086 break;
10087
10088 case 1:
10089 w0[0] = w0[0] | 0x8000;
10090 break;
10091
10092 case 2:
10093 w0[0] = w0[0] | 0x800000;
10094 break;
10095
10096 case 3:
10097 w0[0] = w0[0] | 0x80000000;
10098 break;
10099
10100 case 4:
10101 w0[1] = 0x80;
10102 break;
10103
10104 case 5:
10105 w0[1] = w0[1] | 0x8000;
10106 break;
10107
10108 case 6:
10109 w0[1] = w0[1] | 0x800000;
10110 break;
10111
10112 case 7:
10113 w0[1] = w0[1] | 0x80000000;
10114 break;
10115
10116 case 8:
10117 w0[2] = 0x80;
10118 break;
10119
10120 case 9:
10121 w0[2] = w0[2] | 0x8000;
10122 break;
10123
10124 case 10:
10125 w0[2] = w0[2] | 0x800000;
10126 break;
10127
10128 case 11:
10129 w0[2] = w0[2] | 0x80000000;
10130 break;
10131
10132 case 12:
10133 w0[3] = 0x80;
10134 break;
10135
10136 case 13:
10137 w0[3] = w0[3] | 0x8000;
10138 break;
10139
10140 case 14:
10141 w0[3] = w0[3] | 0x800000;
10142 break;
10143
10144 case 15:
10145 w0[3] = w0[3] | 0x80000000;
10146 break;
10147
10148 case 16:
10149 w1[0] = 0x80;
10150 break;
10151
10152 case 17:
10153 w1[0] = w1[0] | 0x8000;
10154 break;
10155
10156 case 18:
10157 w1[0] = w1[0] | 0x800000;
10158 break;
10159
10160 case 19:
10161 w1[0] = w1[0] | 0x80000000;
10162 break;
10163
10164 case 20:
10165 w1[1] = 0x80;
10166 break;
10167
10168 case 21:
10169 w1[1] = w1[1] | 0x8000;
10170 break;
10171
10172 case 22:
10173 w1[1] = w1[1] | 0x800000;
10174 break;
10175
10176 case 23:
10177 w1[1] = w1[1] | 0x80000000;
10178 break;
10179
10180 case 24:
10181 w1[2] = 0x80;
10182 break;
10183
10184 case 25:
10185 w1[2] = w1[2] | 0x8000;
10186 break;
10187
10188 case 26:
10189 w1[2] = w1[2] | 0x800000;
10190 break;
10191
10192 case 27:
10193 w1[2] = w1[2] | 0x80000000;
10194 break;
10195
10196 case 28:
10197 w1[3] = 0x80;
10198 break;
10199
10200 case 29:
10201 w1[3] = w1[3] | 0x8000;
10202 break;
10203
10204 case 30:
10205 w1[3] = w1[3] | 0x800000;
10206 break;
10207
10208 case 31:
10209 w1[3] = w1[3] | 0x80000000;
10210 break;
10211 }
10212 }
10213
10214 static void append_0x80_2_be (u32x w0[4], u32x w1[4], const u32 offset)
10215 {
10216 switch (offset)
10217 {
10218 case 0:
10219 w0[0] |= 0x80000000;
10220 break;
10221
10222 case 1:
10223 w0[0] |= 0x800000;
10224 break;
10225
10226 case 2:
10227 w0[0] |= 0x8000;
10228 break;
10229
10230 case 3:
10231 w0[0] |= 0x80;
10232 break;
10233
10234 case 4:
10235 w0[1] |= 0x80000000;
10236 break;
10237
10238 case 5:
10239 w0[1] |= 0x800000;
10240 break;
10241
10242 case 6:
10243 w0[1] |= 0x8000;
10244 break;
10245
10246 case 7:
10247 w0[1] |= 0x80;
10248 break;
10249
10250 case 8:
10251 w0[2] |= 0x80000000;
10252 break;
10253
10254 case 9:
10255 w0[2] |= 0x800000;
10256 break;
10257
10258 case 10:
10259 w0[2] |= 0x8000;
10260 break;
10261
10262 case 11:
10263 w0[2] |= 0x80;
10264 break;
10265
10266 case 12:
10267 w0[3] |= 0x80000000;
10268 break;
10269
10270 case 13:
10271 w0[3] |= 0x800000;
10272 break;
10273
10274 case 14:
10275 w0[3] |= 0x8000;
10276 break;
10277
10278 case 15:
10279 w0[3] |= 0x80;
10280 break;
10281
10282 case 16:
10283 w1[0] |= 0x80000000;
10284 break;
10285
10286 case 17:
10287 w1[0] |= 0x800000;
10288 break;
10289
10290 case 18:
10291 w1[0] |= 0x8000;
10292 break;
10293
10294 case 19:
10295 w1[0] |= 0x80;
10296 break;
10297
10298 case 20:
10299 w1[1] |= 0x80000000;
10300 break;
10301
10302 case 21:
10303 w1[1] |= 0x800000;
10304 break;
10305
10306 case 22:
10307 w1[1] |= 0x8000;
10308 break;
10309
10310 case 23:
10311 w1[1] |= 0x80;
10312 break;
10313
10314 case 24:
10315 w1[2] |= 0x80000000;
10316 break;
10317
10318 case 25:
10319 w1[2] |= 0x800000;
10320 break;
10321
10322 case 26:
10323 w1[2] |= 0x8000;
10324 break;
10325
10326 case 27:
10327 w1[2] |= 0x80;
10328 break;
10329
10330 case 28:
10331 w1[3] |= 0x80000000;
10332 break;
10333
10334 case 29:
10335 w1[3] |= 0x800000;
10336 break;
10337
10338 case 30:
10339 w1[3] |= 0x8000;
10340 break;
10341
10342 case 31:
10343 w1[3] |= 0x80;
10344 break;
10345 }
10346 }
10347
10348 static void append_0x80_3 (u32x w0[4], u32x w1[4], u32x w2[4], const u32 offset)
10349 {
10350 switch (offset)
10351 {
10352 case 0:
10353 w0[0] = 0x80;
10354 break;
10355
10356 case 1:
10357 w0[0] = w0[0] | 0x8000;
10358 break;
10359
10360 case 2:
10361 w0[0] = w0[0] | 0x800000;
10362 break;
10363
10364 case 3:
10365 w0[0] = w0[0] | 0x80000000;
10366 break;
10367
10368 case 4:
10369 w0[1] = 0x80;
10370 break;
10371
10372 case 5:
10373 w0[1] = w0[1] | 0x8000;
10374 break;
10375
10376 case 6:
10377 w0[1] = w0[1] | 0x800000;
10378 break;
10379
10380 case 7:
10381 w0[1] = w0[1] | 0x80000000;
10382 break;
10383
10384 case 8:
10385 w0[2] = 0x80;
10386 break;
10387
10388 case 9:
10389 w0[2] = w0[2] | 0x8000;
10390 break;
10391
10392 case 10:
10393 w0[2] = w0[2] | 0x800000;
10394 break;
10395
10396 case 11:
10397 w0[2] = w0[2] | 0x80000000;
10398 break;
10399
10400 case 12:
10401 w0[3] = 0x80;
10402 break;
10403
10404 case 13:
10405 w0[3] = w0[3] | 0x8000;
10406 break;
10407
10408 case 14:
10409 w0[3] = w0[3] | 0x800000;
10410 break;
10411
10412 case 15:
10413 w0[3] = w0[3] | 0x80000000;
10414 break;
10415
10416 case 16:
10417 w1[0] = 0x80;
10418 break;
10419
10420 case 17:
10421 w1[0] = w1[0] | 0x8000;
10422 break;
10423
10424 case 18:
10425 w1[0] = w1[0] | 0x800000;
10426 break;
10427
10428 case 19:
10429 w1[0] = w1[0] | 0x80000000;
10430 break;
10431
10432 case 20:
10433 w1[1] = 0x80;
10434 break;
10435
10436 case 21:
10437 w1[1] = w1[1] | 0x8000;
10438 break;
10439
10440 case 22:
10441 w1[1] = w1[1] | 0x800000;
10442 break;
10443
10444 case 23:
10445 w1[1] = w1[1] | 0x80000000;
10446 break;
10447
10448 case 24:
10449 w1[2] = 0x80;
10450 break;
10451
10452 case 25:
10453 w1[2] = w1[2] | 0x8000;
10454 break;
10455
10456 case 26:
10457 w1[2] = w1[2] | 0x800000;
10458 break;
10459
10460 case 27:
10461 w1[2] = w1[2] | 0x80000000;
10462 break;
10463
10464 case 28:
10465 w1[3] = 0x80;
10466 break;
10467
10468 case 29:
10469 w1[3] = w1[3] | 0x8000;
10470 break;
10471
10472 case 30:
10473 w1[3] = w1[3] | 0x800000;
10474 break;
10475
10476 case 31:
10477 w1[3] = w1[3] | 0x80000000;
10478 break;
10479
10480 case 32:
10481 w2[0] = 0x80;
10482 break;
10483
10484 case 33:
10485 w2[0] = w2[0] | 0x8000;
10486 break;
10487
10488 case 34:
10489 w2[0] = w2[0] | 0x800000;
10490 break;
10491
10492 case 35:
10493 w2[0] = w2[0] | 0x80000000;
10494 break;
10495
10496 case 36:
10497 w2[1] = 0x80;
10498 break;
10499
10500 case 37:
10501 w2[1] = w2[1] | 0x8000;
10502 break;
10503
10504 case 38:
10505 w2[1] = w2[1] | 0x800000;
10506 break;
10507
10508 case 39:
10509 w2[1] = w2[1] | 0x80000000;
10510 break;
10511
10512 case 40:
10513 w2[2] = 0x80;
10514 break;
10515
10516 case 41:
10517 w2[2] = w2[2] | 0x8000;
10518 break;
10519
10520 case 42:
10521 w2[2] = w2[2] | 0x800000;
10522 break;
10523
10524 case 43:
10525 w2[2] = w2[2] | 0x80000000;
10526 break;
10527
10528 case 44:
10529 w2[3] = 0x80;
10530 break;
10531
10532 case 45:
10533 w2[3] = w2[3] | 0x8000;
10534 break;
10535
10536 case 46:
10537 w2[3] = w2[3] | 0x800000;
10538 break;
10539
10540 case 47:
10541 w2[3] = w2[3] | 0x80000000;
10542 break;
10543 }
10544 }
10545
10546 static void append_0x80_4 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 offset)
10547 {
10548 switch (offset)
10549 {
10550 case 0:
10551 w0[0] = 0x80;
10552 break;
10553
10554 case 1:
10555 w0[0] = w0[0] | 0x8000;
10556 break;
10557
10558 case 2:
10559 w0[0] = w0[0] | 0x800000;
10560 break;
10561
10562 case 3:
10563 w0[0] = w0[0] | 0x80000000;
10564 break;
10565
10566 case 4:
10567 w0[1] = 0x80;
10568 break;
10569
10570 case 5:
10571 w0[1] = w0[1] | 0x8000;
10572 break;
10573
10574 case 6:
10575 w0[1] = w0[1] | 0x800000;
10576 break;
10577
10578 case 7:
10579 w0[1] = w0[1] | 0x80000000;
10580 break;
10581
10582 case 8:
10583 w0[2] = 0x80;
10584 break;
10585
10586 case 9:
10587 w0[2] = w0[2] | 0x8000;
10588 break;
10589
10590 case 10:
10591 w0[2] = w0[2] | 0x800000;
10592 break;
10593
10594 case 11:
10595 w0[2] = w0[2] | 0x80000000;
10596 break;
10597
10598 case 12:
10599 w0[3] = 0x80;
10600 break;
10601
10602 case 13:
10603 w0[3] = w0[3] | 0x8000;
10604 break;
10605
10606 case 14:
10607 w0[3] = w0[3] | 0x800000;
10608 break;
10609
10610 case 15:
10611 w0[3] = w0[3] | 0x80000000;
10612 break;
10613
10614 case 16:
10615 w1[0] = 0x80;
10616 break;
10617
10618 case 17:
10619 w1[0] = w1[0] | 0x8000;
10620 break;
10621
10622 case 18:
10623 w1[0] = w1[0] | 0x800000;
10624 break;
10625
10626 case 19:
10627 w1[0] = w1[0] | 0x80000000;
10628 break;
10629
10630 case 20:
10631 w1[1] = 0x80;
10632 break;
10633
10634 case 21:
10635 w1[1] = w1[1] | 0x8000;
10636 break;
10637
10638 case 22:
10639 w1[1] = w1[1] | 0x800000;
10640 break;
10641
10642 case 23:
10643 w1[1] = w1[1] | 0x80000000;
10644 break;
10645
10646 case 24:
10647 w1[2] = 0x80;
10648 break;
10649
10650 case 25:
10651 w1[2] = w1[2] | 0x8000;
10652 break;
10653
10654 case 26:
10655 w1[2] = w1[2] | 0x800000;
10656 break;
10657
10658 case 27:
10659 w1[2] = w1[2] | 0x80000000;
10660 break;
10661
10662 case 28:
10663 w1[3] = 0x80;
10664 break;
10665
10666 case 29:
10667 w1[3] = w1[3] | 0x8000;
10668 break;
10669
10670 case 30:
10671 w1[3] = w1[3] | 0x800000;
10672 break;
10673
10674 case 31:
10675 w1[3] = w1[3] | 0x80000000;
10676 break;
10677
10678 case 32:
10679 w2[0] = 0x80;
10680 break;
10681
10682 case 33:
10683 w2[0] = w2[0] | 0x8000;
10684 break;
10685
10686 case 34:
10687 w2[0] = w2[0] | 0x800000;
10688 break;
10689
10690 case 35:
10691 w2[0] = w2[0] | 0x80000000;
10692 break;
10693
10694 case 36:
10695 w2[1] = 0x80;
10696 break;
10697
10698 case 37:
10699 w2[1] = w2[1] | 0x8000;
10700 break;
10701
10702 case 38:
10703 w2[1] = w2[1] | 0x800000;
10704 break;
10705
10706 case 39:
10707 w2[1] = w2[1] | 0x80000000;
10708 break;
10709
10710 case 40:
10711 w2[2] = 0x80;
10712 break;
10713
10714 case 41:
10715 w2[2] = w2[2] | 0x8000;
10716 break;
10717
10718 case 42:
10719 w2[2] = w2[2] | 0x800000;
10720 break;
10721
10722 case 43:
10723 w2[2] = w2[2] | 0x80000000;
10724 break;
10725
10726 case 44:
10727 w2[3] = 0x80;
10728 break;
10729
10730 case 45:
10731 w2[3] = w2[3] | 0x8000;
10732 break;
10733
10734 case 46:
10735 w2[3] = w2[3] | 0x800000;
10736 break;
10737
10738 case 47:
10739 w2[3] = w2[3] | 0x80000000;
10740 break;
10741
10742 case 48:
10743 w3[0] = 0x80;
10744 break;
10745
10746 case 49:
10747 w3[0] = w3[0] | 0x8000;
10748 break;
10749
10750 case 50:
10751 w3[0] = w3[0] | 0x800000;
10752 break;
10753
10754 case 51:
10755 w3[0] = w3[0] | 0x80000000;
10756 break;
10757
10758 case 52:
10759 w3[1] = 0x80;
10760 break;
10761
10762 case 53:
10763 w3[1] = w3[1] | 0x8000;
10764 break;
10765
10766 case 54:
10767 w3[1] = w3[1] | 0x800000;
10768 break;
10769
10770 case 55:
10771 w3[1] = w3[1] | 0x80000000;
10772 break;
10773
10774 case 56:
10775 w3[2] = 0x80;
10776 break;
10777
10778 case 57:
10779 w3[2] = w3[2] | 0x8000;
10780 break;
10781
10782 case 58:
10783 w3[2] = w3[2] | 0x800000;
10784 break;
10785
10786 case 59:
10787 w3[2] = w3[2] | 0x80000000;
10788 break;
10789
10790 case 60:
10791 w3[3] = 0x80;
10792 break;
10793
10794 case 61:
10795 w3[3] = w3[3] | 0x8000;
10796 break;
10797
10798 case 62:
10799 w3[3] = w3[3] | 0x800000;
10800 break;
10801
10802 case 63:
10803 w3[3] = w3[3] | 0x80000000;
10804 break;
10805 }
10806 }
10807
10808 static void append_0x80_8 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], u32x w4[4], u32x w5[4], u32x w6[4], u32x w7[4], const u32 offset)
10809 {
10810 switch (offset)
10811 {
10812 case 0:
10813 w0[0] = 0x80;
10814 break;
10815
10816 case 1:
10817 w0[0] = w0[0] | 0x8000;
10818 break;
10819
10820 case 2:
10821 w0[0] = w0[0] | 0x800000;
10822 break;
10823
10824 case 3:
10825 w0[0] = w0[0] | 0x80000000;
10826 break;
10827
10828 case 4:
10829 w0[1] = 0x80;
10830 break;
10831
10832 case 5:
10833 w0[1] = w0[1] | 0x8000;
10834 break;
10835
10836 case 6:
10837 w0[1] = w0[1] | 0x800000;
10838 break;
10839
10840 case 7:
10841 w0[1] = w0[1] | 0x80000000;
10842 break;
10843
10844 case 8:
10845 w0[2] = 0x80;
10846 break;
10847
10848 case 9:
10849 w0[2] = w0[2] | 0x8000;
10850 break;
10851
10852 case 10:
10853 w0[2] = w0[2] | 0x800000;
10854 break;
10855
10856 case 11:
10857 w0[2] = w0[2] | 0x80000000;
10858 break;
10859
10860 case 12:
10861 w0[3] = 0x80;
10862 break;
10863
10864 case 13:
10865 w0[3] = w0[3] | 0x8000;
10866 break;
10867
10868 case 14:
10869 w0[3] = w0[3] | 0x800000;
10870 break;
10871
10872 case 15:
10873 w0[3] = w0[3] | 0x80000000;
10874 break;
10875
10876 case 16:
10877 w1[0] = 0x80;
10878 break;
10879
10880 case 17:
10881 w1[0] = w1[0] | 0x8000;
10882 break;
10883
10884 case 18:
10885 w1[0] = w1[0] | 0x800000;
10886 break;
10887
10888 case 19:
10889 w1[0] = w1[0] | 0x80000000;
10890 break;
10891
10892 case 20:
10893 w1[1] = 0x80;
10894 break;
10895
10896 case 21:
10897 w1[1] = w1[1] | 0x8000;
10898 break;
10899
10900 case 22:
10901 w1[1] = w1[1] | 0x800000;
10902 break;
10903
10904 case 23:
10905 w1[1] = w1[1] | 0x80000000;
10906 break;
10907
10908 case 24:
10909 w1[2] = 0x80;
10910 break;
10911
10912 case 25:
10913 w1[2] = w1[2] | 0x8000;
10914 break;
10915
10916 case 26:
10917 w1[2] = w1[2] | 0x800000;
10918 break;
10919
10920 case 27:
10921 w1[2] = w1[2] | 0x80000000;
10922 break;
10923
10924 case 28:
10925 w1[3] = 0x80;
10926 break;
10927
10928 case 29:
10929 w1[3] = w1[3] | 0x8000;
10930 break;
10931
10932 case 30:
10933 w1[3] = w1[3] | 0x800000;
10934 break;
10935
10936 case 31:
10937 w1[3] = w1[3] | 0x80000000;
10938 break;
10939
10940 case 32:
10941 w2[0] = 0x80;
10942 break;
10943
10944 case 33:
10945 w2[0] = w2[0] | 0x8000;
10946 break;
10947
10948 case 34:
10949 w2[0] = w2[0] | 0x800000;
10950 break;
10951
10952 case 35:
10953 w2[0] = w2[0] | 0x80000000;
10954 break;
10955
10956 case 36:
10957 w2[1] = 0x80;
10958 break;
10959
10960 case 37:
10961 w2[1] = w2[1] | 0x8000;
10962 break;
10963
10964 case 38:
10965 w2[1] = w2[1] | 0x800000;
10966 break;
10967
10968 case 39:
10969 w2[1] = w2[1] | 0x80000000;
10970 break;
10971
10972 case 40:
10973 w2[2] = 0x80;
10974 break;
10975
10976 case 41:
10977 w2[2] = w2[2] | 0x8000;
10978 break;
10979
10980 case 42:
10981 w2[2] = w2[2] | 0x800000;
10982 break;
10983
10984 case 43:
10985 w2[2] = w2[2] | 0x80000000;
10986 break;
10987
10988 case 44:
10989 w2[3] = 0x80;
10990 break;
10991
10992 case 45:
10993 w2[3] = w2[3] | 0x8000;
10994 break;
10995
10996 case 46:
10997 w2[3] = w2[3] | 0x800000;
10998 break;
10999
11000 case 47:
11001 w2[3] = w2[3] | 0x80000000;
11002 break;
11003
11004 case 48:
11005 w3[0] = 0x80;
11006 break;
11007
11008 case 49:
11009 w3[0] = w3[0] | 0x8000;
11010 break;
11011
11012 case 50:
11013 w3[0] = w3[0] | 0x800000;
11014 break;
11015
11016 case 51:
11017 w3[0] = w3[0] | 0x80000000;
11018 break;
11019
11020 case 52:
11021 w3[1] = 0x80;
11022 break;
11023
11024 case 53:
11025 w3[1] = w3[1] | 0x8000;
11026 break;
11027
11028 case 54:
11029 w3[1] = w3[1] | 0x800000;
11030 break;
11031
11032 case 55:
11033 w3[1] = w3[1] | 0x80000000;
11034 break;
11035
11036 case 56:
11037 w3[2] = 0x80;
11038 break;
11039
11040 case 57:
11041 w3[2] = w3[2] | 0x8000;
11042 break;
11043
11044 case 58:
11045 w3[2] = w3[2] | 0x800000;
11046 break;
11047
11048 case 59:
11049 w3[2] = w3[2] | 0x80000000;
11050 break;
11051
11052 case 60:
11053 w3[3] = 0x80;
11054 break;
11055
11056 case 61:
11057 w3[3] = w3[3] | 0x8000;
11058 break;
11059
11060 case 62:
11061 w3[3] = w3[3] | 0x800000;
11062 break;
11063
11064 case 63:
11065 w3[3] = w3[3] | 0x80000000;
11066 break;
11067
11068 case 64:
11069 w4[0] = 0x80;
11070 break;
11071
11072 case 65:
11073 w4[0] = w4[0] | 0x8000;
11074 break;
11075
11076 case 66:
11077 w4[0] = w4[0] | 0x800000;
11078 break;
11079
11080 case 67:
11081 w4[0] = w4[0] | 0x80000000;
11082 break;
11083
11084 case 68:
11085 w4[1] = 0x80;
11086 break;
11087
11088 case 69:
11089 w4[1] = w4[1] | 0x8000;
11090 break;
11091
11092 case 70:
11093 w4[1] = w4[1] | 0x800000;
11094 break;
11095
11096 case 71:
11097 w4[1] = w4[1] | 0x80000000;
11098 break;
11099
11100 case 72:
11101 w4[2] = 0x80;
11102 break;
11103
11104 case 73:
11105 w4[2] = w4[2] | 0x8000;
11106 break;
11107
11108 case 74:
11109 w4[2] = w4[2] | 0x800000;
11110 break;
11111
11112 case 75:
11113 w4[2] = w4[2] | 0x80000000;
11114 break;
11115
11116 case 76:
11117 w4[3] = 0x80;
11118 break;
11119
11120 case 77:
11121 w4[3] = w4[3] | 0x8000;
11122 break;
11123
11124 case 78:
11125 w4[3] = w4[3] | 0x800000;
11126 break;
11127
11128 case 79:
11129 w4[3] = w4[3] | 0x80000000;
11130 break;
11131
11132 case 80:
11133 w5[0] = 0x80;
11134 break;
11135
11136 case 81:
11137 w5[0] = w5[0] | 0x8000;
11138 break;
11139
11140 case 82:
11141 w5[0] = w5[0] | 0x800000;
11142 break;
11143
11144 case 83:
11145 w5[0] = w5[0] | 0x80000000;
11146 break;
11147
11148 case 84:
11149 w5[1] = 0x80;
11150 break;
11151
11152 case 85:
11153 w5[1] = w5[1] | 0x8000;
11154 break;
11155
11156 case 86:
11157 w5[1] = w5[1] | 0x800000;
11158 break;
11159
11160 case 87:
11161 w5[1] = w5[1] | 0x80000000;
11162 break;
11163
11164 case 88:
11165 w5[2] = 0x80;
11166 break;
11167
11168 case 89:
11169 w5[2] = w5[2] | 0x8000;
11170 break;
11171
11172 case 90:
11173 w5[2] = w5[2] | 0x800000;
11174 break;
11175
11176 case 91:
11177 w5[2] = w5[2] | 0x80000000;
11178 break;
11179
11180 case 92:
11181 w5[3] = 0x80;
11182 break;
11183
11184 case 93:
11185 w5[3] = w5[3] | 0x8000;
11186 break;
11187
11188 case 94:
11189 w5[3] = w5[3] | 0x800000;
11190 break;
11191
11192 case 95:
11193 w5[3] = w5[3] | 0x80000000;
11194 break;
11195
11196 case 96:
11197 w6[0] = 0x80;
11198 break;
11199
11200 case 97:
11201 w6[0] = w6[0] | 0x8000;
11202 break;
11203
11204 case 98:
11205 w6[0] = w6[0] | 0x800000;
11206 break;
11207
11208 case 99:
11209 w6[0] = w6[0] | 0x80000000;
11210 break;
11211
11212 case 100:
11213 w6[1] = 0x80;
11214 break;
11215
11216 case 101:
11217 w6[1] = w6[1] | 0x8000;
11218 break;
11219
11220 case 102:
11221 w6[1] = w6[1] | 0x800000;
11222 break;
11223
11224 case 103:
11225 w6[1] = w6[1] | 0x80000000;
11226 break;
11227
11228 case 104:
11229 w6[2] = 0x80;
11230 break;
11231
11232 case 105:
11233 w6[2] = w6[2] | 0x8000;
11234 break;
11235
11236 case 106:
11237 w6[2] = w6[2] | 0x800000;
11238 break;
11239
11240 case 107:
11241 w6[2] = w6[2] | 0x80000000;
11242 break;
11243
11244 case 108:
11245 w6[3] = 0x80;
11246 break;
11247
11248 case 109:
11249 w6[3] = w6[3] | 0x8000;
11250 break;
11251
11252 case 110:
11253 w6[3] = w6[3] | 0x800000;
11254 break;
11255
11256 case 111:
11257 w6[3] = w6[3] | 0x80000000;
11258 break;
11259
11260 case 112:
11261 w7[0] = 0x80;
11262 break;
11263
11264 case 113:
11265 w7[0] = w7[0] | 0x8000;
11266 break;
11267
11268 case 114:
11269 w7[0] = w7[0] | 0x800000;
11270 break;
11271
11272 case 115:
11273 w7[0] = w7[0] | 0x80000000;
11274 break;
11275
11276 case 116:
11277 w7[1] = 0x80;
11278 break;
11279
11280 case 117:
11281 w7[1] = w7[1] | 0x8000;
11282 break;
11283
11284 case 118:
11285 w7[1] = w7[1] | 0x800000;
11286 break;
11287
11288 case 119:
11289 w7[1] = w7[1] | 0x80000000;
11290 break;
11291
11292 case 120:
11293 w7[2] = 0x80;
11294 break;
11295
11296 case 121:
11297 w7[2] = w7[2] | 0x8000;
11298 break;
11299
11300 case 122:
11301 w7[2] = w7[2] | 0x800000;
11302 break;
11303
11304 case 123:
11305 w7[2] = w7[2] | 0x80000000;
11306 break;
11307
11308 case 124:
11309 w7[3] = 0x80;
11310 break;
11311
11312 case 125:
11313 w7[3] = w7[3] | 0x8000;
11314 break;
11315
11316 case 126:
11317 w7[3] = w7[3] | 0x800000;
11318 break;
11319
11320 case 127:
11321 w7[3] = w7[3] | 0x80000000;
11322 break;
11323 }
11324 }
11325
11326 static void append_0x80_4 (u32x w[16], const u32 offset)
11327 {
11328 switch (offset)
11329 {
11330 case 0:
11331 w[ 0] = 0x80;
11332 break;
11333
11334 case 1:
11335 w[ 0] = w[ 0] | 0x8000;
11336 break;
11337
11338 case 2:
11339 w[ 0] = w[ 0] | 0x800000;
11340 break;
11341
11342 case 3:
11343 w[ 0] = w[ 0] | 0x80000000;
11344 break;
11345
11346 case 4:
11347 w[ 1] = 0x80;
11348 break;
11349
11350 case 5:
11351 w[ 1] = w[ 1] | 0x8000;
11352 break;
11353
11354 case 6:
11355 w[ 1] = w[ 1] | 0x800000;
11356 break;
11357
11358 case 7:
11359 w[ 1] = w[ 1] | 0x80000000;
11360 break;
11361
11362 case 8:
11363 w[ 2] = 0x80;
11364 break;
11365
11366 case 9:
11367 w[ 2] = w[ 2] | 0x8000;
11368 break;
11369
11370 case 10:
11371 w[ 2] = w[ 2] | 0x800000;
11372 break;
11373
11374 case 11:
11375 w[ 2] = w[ 2] | 0x80000000;
11376 break;
11377
11378 case 12:
11379 w[ 3] = 0x80;
11380 break;
11381
11382 case 13:
11383 w[ 3] = w[ 3] | 0x8000;
11384 break;
11385
11386 case 14:
11387 w[ 3] = w[ 3] | 0x800000;
11388 break;
11389
11390 case 15:
11391 w[ 3] = w[ 3] | 0x80000000;
11392 break;
11393
11394 case 16:
11395 w[ 4] = 0x80;
11396 break;
11397
11398 case 17:
11399 w[ 4] = w[ 4] | 0x8000;
11400 break;
11401
11402 case 18:
11403 w[ 4] = w[ 4] | 0x800000;
11404 break;
11405
11406 case 19:
11407 w[ 4] = w[ 4] | 0x80000000;
11408 break;
11409
11410 case 20:
11411 w[ 5] = 0x80;
11412 break;
11413
11414 case 21:
11415 w[ 5] = w[ 5] | 0x8000;
11416 break;
11417
11418 case 22:
11419 w[ 5] = w[ 5] | 0x800000;
11420 break;
11421
11422 case 23:
11423 w[ 5] = w[ 5] | 0x80000000;
11424 break;
11425
11426 case 24:
11427 w[ 6] = 0x80;
11428 break;
11429
11430 case 25:
11431 w[ 6] = w[ 6] | 0x8000;
11432 break;
11433
11434 case 26:
11435 w[ 6] = w[ 6] | 0x800000;
11436 break;
11437
11438 case 27:
11439 w[ 6] = w[ 6] | 0x80000000;
11440 break;
11441
11442 case 28:
11443 w[ 7] = 0x80;
11444 break;
11445
11446 case 29:
11447 w[ 7] = w[ 7] | 0x8000;
11448 break;
11449
11450 case 30:
11451 w[ 7] = w[ 7] | 0x800000;
11452 break;
11453
11454 case 31:
11455 w[ 7] = w[ 7] | 0x80000000;
11456 break;
11457
11458 case 32:
11459 w[ 8] = 0x80;
11460 break;
11461
11462 case 33:
11463 w[ 8] = w[ 8] | 0x8000;
11464 break;
11465
11466 case 34:
11467 w[ 8] = w[ 8] | 0x800000;
11468 break;
11469
11470 case 35:
11471 w[ 8] = w[ 8] | 0x80000000;
11472 break;
11473
11474 case 36:
11475 w[ 9] = 0x80;
11476 break;
11477
11478 case 37:
11479 w[ 9] = w[ 9] | 0x8000;
11480 break;
11481
11482 case 38:
11483 w[ 9] = w[ 9] | 0x800000;
11484 break;
11485
11486 case 39:
11487 w[ 9] = w[ 9] | 0x80000000;
11488 break;
11489
11490 case 40:
11491 w[10] = 0x80;
11492 break;
11493
11494 case 41:
11495 w[10] = w[10] | 0x8000;
11496 break;
11497
11498 case 42:
11499 w[10] = w[10] | 0x800000;
11500 break;
11501
11502 case 43:
11503 w[10] = w[10] | 0x80000000;
11504 break;
11505
11506 case 44:
11507 w[11] = 0x80;
11508 break;
11509
11510 case 45:
11511 w[11] = w[11] | 0x8000;
11512 break;
11513
11514 case 46:
11515 w[11] = w[11] | 0x800000;
11516 break;
11517
11518 case 47:
11519 w[11] = w[11] | 0x80000000;
11520 break;
11521
11522 case 48:
11523 w[12] = 0x80;
11524 break;
11525
11526 case 49:
11527 w[12] = w[12] | 0x8000;
11528 break;
11529
11530 case 50:
11531 w[12] = w[12] | 0x800000;
11532 break;
11533
11534 case 51:
11535 w[12] = w[12] | 0x80000000;
11536 break;
11537
11538 case 52:
11539 w[13] = 0x80;
11540 break;
11541
11542 case 53:
11543 w[13] = w[13] | 0x8000;
11544 break;
11545
11546 case 54:
11547 w[13] = w[13] | 0x800000;
11548 break;
11549
11550 case 55:
11551 w[13] = w[13] | 0x80000000;
11552 break;
11553
11554 case 56:
11555 w[14] = 0x80;
11556 break;
11557
11558 case 57:
11559 w[14] = w[14] | 0x8000;
11560 break;
11561
11562 case 58:
11563 w[14] = w[14] | 0x800000;
11564 break;
11565
11566 case 59:
11567 w[14] = w[14] | 0x80000000;
11568 break;
11569
11570 case 60:
11571 w[15] = 0x80;
11572 break;
11573
11574 case 61:
11575 w[15] = w[15] | 0x8000;
11576 break;
11577
11578 case 62:
11579 w[15] = w[15] | 0x800000;
11580 break;
11581
11582 case 63:
11583 w[15] = w[15] | 0x80000000;
11584 break;
11585 }
11586 }
11587
11588 static void device_memcat2L (const u32 offset, u32x dst0[2], u32x src_l0[2], u32 src_r0[2])
11589 {
11590 switch (offset)
11591 {
11592 case 1:
11593 dst0[0] = src_l0[0] | src_r0[0] << 8;
11594 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
11595 break;
11596
11597 case 2:
11598 dst0[0] = src_l0[0] | src_r0[0] << 16;
11599 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
11600 break;
11601
11602 case 3:
11603 dst0[0] = src_l0[0] | src_r0[0] << 24;
11604 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
11605 break;
11606
11607 case 4:
11608 dst0[1] = src_r0[0];
11609 break;
11610
11611 case 5:
11612 dst0[1] = src_l0[1] | src_r0[0] << 8;
11613 break;
11614
11615 case 6:
11616 dst0[1] = src_l0[1] | src_r0[0] << 16;
11617 break;
11618
11619 case 7:
11620 dst0[1] = src_l0[1] | src_r0[0] << 24;
11621 break;
11622 }
11623 }
11624
11625 static void device_memcat2L (const u32 offset, u32x dst0[2], u32x src_l0[2], u32x src_r0[2])
11626 {
11627 switch (offset)
11628 {
11629 case 1:
11630 dst0[0] = src_l0[0] | src_r0[0] << 8;
11631 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
11632 break;
11633
11634 case 2:
11635 dst0[0] = src_l0[0] | src_r0[0] << 16;
11636 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
11637 break;
11638
11639 case 3:
11640 dst0[0] = src_l0[0] | src_r0[0] << 24;
11641 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
11642 break;
11643
11644 case 4:
11645 dst0[1] = src_r0[0];
11646 break;
11647
11648 case 5:
11649 dst0[1] = src_l0[1] | src_r0[0] << 8;
11650 break;
11651
11652 case 6:
11653 dst0[1] = src_l0[1] | src_r0[0] << 16;
11654 break;
11655
11656 case 7:
11657 dst0[1] = src_l0[1] | src_r0[0] << 24;
11658 break;
11659 }
11660 }
11661
11662 static void device_memcat4L (const u32 offset, u32x dst0[4], u32x src_l0[4], u32 src_r0[4])
11663 {
11664 switch (offset)
11665 {
11666 case 1:
11667 dst0[0] = src_l0[0] | src_r0[0] << 8;
11668 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
11669 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
11670 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
11671 break;
11672
11673 case 2:
11674 dst0[0] = src_l0[0] | src_r0[0] << 16;
11675 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
11676 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
11677 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
11678 break;
11679
11680 case 3:
11681 dst0[0] = src_l0[0] | src_r0[0] << 24;
11682 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
11683 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
11684 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
11685 break;
11686
11687 case 4:
11688 dst0[1] = src_r0[0];
11689 dst0[2] = src_r0[1];
11690 dst0[3] = src_r0[2];
11691 break;
11692
11693 case 5:
11694 dst0[1] = src_l0[1] | src_r0[0] << 8;
11695 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
11696 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
11697 break;
11698
11699 case 6:
11700 dst0[1] = src_l0[1] | src_r0[0] << 16;
11701 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
11702 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
11703 break;
11704
11705 case 7:
11706 dst0[1] = src_l0[1] | src_r0[0] << 24;
11707 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
11708 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
11709 break;
11710
11711 case 8:
11712 dst0[2] = src_r0[0];
11713 dst0[3] = src_r0[1];
11714 break;
11715
11716 case 9:
11717 dst0[2] = src_l0[2] | src_r0[0] << 8;
11718 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
11719 break;
11720
11721 case 10:
11722 dst0[2] = src_l0[2] | src_r0[0] << 16;
11723 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
11724 break;
11725
11726 case 11:
11727 dst0[2] = src_l0[2] | src_r0[0] << 24;
11728 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
11729 break;
11730
11731 case 12:
11732 dst0[3] = src_r0[0];
11733 break;
11734
11735 case 13:
11736 dst0[3] = src_l0[3] | src_r0[0] << 8;
11737 break;
11738
11739 case 14:
11740 dst0[3] = src_l0[3] | src_r0[0] << 16;
11741 break;
11742
11743 case 15:
11744 dst0[3] = src_l0[3] | src_r0[0] << 24;
11745 break;
11746 }
11747 }
11748
11749 static void device_memcat4L (const u32 offset, u32x dst0[4], u32x src_l0[4], u32x src_r0[4])
11750 {
11751 switch (offset)
11752 {
11753 case 1:
11754 dst0[0] = src_l0[0] | src_r0[0] << 8;
11755 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
11756 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
11757 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
11758 break;
11759
11760 case 2:
11761 dst0[0] = src_l0[0] | src_r0[0] << 16;
11762 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
11763 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
11764 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
11765 break;
11766
11767 case 3:
11768 dst0[0] = src_l0[0] | src_r0[0] << 24;
11769 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
11770 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
11771 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
11772 break;
11773
11774 case 4:
11775 dst0[1] = src_r0[0];
11776 dst0[2] = src_r0[1];
11777 dst0[3] = src_r0[2];
11778 break;
11779
11780 case 5:
11781 dst0[1] = src_l0[1] | src_r0[0] << 8;
11782 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
11783 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
11784 break;
11785
11786 case 6:
11787 dst0[1] = src_l0[1] | src_r0[0] << 16;
11788 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
11789 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
11790 break;
11791
11792 case 7:
11793 dst0[1] = src_l0[1] | src_r0[0] << 24;
11794 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
11795 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
11796 break;
11797
11798 case 8:
11799 dst0[2] = src_r0[0];
11800 dst0[3] = src_r0[1];
11801 break;
11802
11803 case 9:
11804 dst0[2] = src_l0[2] | src_r0[0] << 8;
11805 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
11806 break;
11807
11808 case 10:
11809 dst0[2] = src_l0[2] | src_r0[0] << 16;
11810 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
11811 break;
11812
11813 case 11:
11814 dst0[2] = src_l0[2] | src_r0[0] << 24;
11815 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
11816 break;
11817
11818 case 12:
11819 dst0[3] = src_r0[0];
11820 break;
11821
11822 case 13:
11823 dst0[3] = src_l0[3] | src_r0[0] << 8;
11824 break;
11825
11826 case 14:
11827 dst0[3] = src_l0[3] | src_r0[0] << 16;
11828 break;
11829
11830 case 15:
11831 dst0[3] = src_l0[3] | src_r0[0] << 24;
11832 break;
11833 }
11834 }
11835
11836 static void device_memcat8L (const u32 offset, u32x dst0[4], u32x dst1[4], u32x src_l0[4], u32x src_l1[4], u32 src_r0[4])
11837 {
11838 switch (offset)
11839 {
11840 case 1:
11841 dst0[0] = src_l0[0] | src_r0[0] << 8;
11842 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
11843 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
11844 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
11845 dst1[0] = src_r0[3] >> 24;
11846 break;
11847
11848 case 2:
11849 dst0[0] = src_l0[0] | src_r0[0] << 16;
11850 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
11851 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
11852 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
11853 dst1[0] = src_r0[3] >> 16;
11854 break;
11855
11856 case 3:
11857 dst0[0] = src_l0[0] | src_r0[0] << 24;
11858 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
11859 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
11860 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
11861 dst1[0] = src_r0[3] >> 8;
11862 break;
11863
11864 case 4:
11865 dst0[1] = src_r0[0];
11866 dst0[2] = src_r0[1];
11867 dst0[3] = src_r0[2];
11868 dst1[0] = src_r0[3];
11869 break;
11870
11871 case 5:
11872 dst0[1] = src_l0[1] | src_r0[0] << 8;
11873 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
11874 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
11875 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
11876 dst1[1] = src_r0[3] >> 24;
11877 break;
11878
11879 case 6:
11880 dst0[1] = src_l0[1] | src_r0[0] << 16;
11881 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
11882 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
11883 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
11884 dst1[1] = src_r0[3] >> 16;
11885 break;
11886
11887 case 7:
11888 dst0[1] = src_l0[1] | src_r0[0] << 24;
11889 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
11890 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
11891 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
11892 dst1[1] = src_r0[3] >> 8;
11893 break;
11894
11895 case 8:
11896 dst0[2] = src_r0[0];
11897 dst0[3] = src_r0[1];
11898 dst1[0] = src_r0[2];
11899 dst1[1] = src_r0[3];
11900 break;
11901
11902 case 9:
11903 dst0[2] = src_l0[2] | src_r0[0] << 8;
11904 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
11905 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
11906 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
11907 dst1[2] = src_r0[3] >> 24;
11908 break;
11909
11910 case 10:
11911 dst0[2] = src_l0[2] | src_r0[0] << 16;
11912 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
11913 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
11914 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
11915 dst1[2] = src_r0[3] >> 16;
11916 break;
11917
11918 case 11:
11919 dst0[2] = src_l0[2] | src_r0[0] << 24;
11920 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
11921 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
11922 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
11923 dst1[2] = src_r0[3] >> 8;
11924 break;
11925
11926 case 12:
11927 dst0[3] = src_r0[0];
11928 dst1[0] = src_r0[1];
11929 dst1[1] = src_r0[2];
11930 dst1[2] = src_r0[3];
11931 break;
11932
11933 case 13:
11934 dst0[3] = src_l0[3] | src_r0[0] << 8;
11935 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
11936 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
11937 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
11938 dst1[3] = src_r0[3] >> 24;
11939 break;
11940
11941 case 14:
11942 dst0[3] = src_l0[3] | src_r0[0] << 16;
11943 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
11944 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
11945 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
11946 dst1[3] = src_r0[3] >> 16;
11947 break;
11948
11949 case 15:
11950 dst0[3] = src_l0[3] | src_r0[0] << 24;
11951 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
11952 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
11953 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
11954 dst1[3] = src_r0[3] >> 8;
11955 break;
11956
11957 case 16:
11958 dst1[0] = src_r0[0];
11959 dst1[1] = src_r0[1];
11960 dst1[2] = src_r0[2];
11961 dst1[3] = src_r0[3];
11962 break;
11963
11964 case 17:
11965 dst1[0] = src_l1[0] | src_r0[0] << 8;
11966 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
11967 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
11968 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
11969 break;
11970
11971 case 18:
11972 dst1[0] = src_l1[0] | src_r0[0] << 16;
11973 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
11974 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
11975 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
11976 break;
11977
11978 case 19:
11979 dst1[0] = src_l1[0] | src_r0[0] << 24;
11980 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
11981 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
11982 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
11983 break;
11984
11985 case 20:
11986 dst1[1] = src_r0[0];
11987 dst1[2] = src_r0[1];
11988 dst1[3] = src_r0[2];
11989 break;
11990
11991 case 21:
11992 dst1[1] = src_l1[1] | src_r0[0] << 8;
11993 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
11994 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
11995 break;
11996
11997 case 22:
11998 dst1[1] = src_l1[1] | src_r0[0] << 16;
11999 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12000 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12001 break;
12002
12003 case 23:
12004 dst1[1] = src_l1[1] | src_r0[0] << 24;
12005 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12006 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12007 break;
12008
12009 case 24:
12010 dst1[2] = src_r0[0];
12011 dst1[3] = src_r0[1];
12012 break;
12013
12014 case 25:
12015 dst1[2] = src_l1[2] | src_r0[0] << 8;
12016 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12017 break;
12018
12019 case 26:
12020 dst1[2] = src_l1[2] | src_r0[0] << 16;
12021 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12022 break;
12023
12024 case 27:
12025 dst1[2] = src_l1[2] | src_r0[0] << 24;
12026 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12027 break;
12028
12029 case 28:
12030 dst1[3] = src_r0[0];
12031 break;
12032
12033 case 29:
12034 dst1[3] = src_l1[3] | src_r0[0] << 8;
12035 break;
12036
12037 case 30:
12038 dst1[3] = src_l1[3] | src_r0[0] << 16;
12039 break;
12040
12041 case 31:
12042 dst1[3] = src_l1[3] | src_r0[0] << 24;
12043 break;
12044 }
12045 }
12046
12047 static void device_memcat8L (const u32 offset, u32x dst0[4], u32x dst1[4], u32x src_l0[4], u32x src_l1[4], u32x src_r0[4])
12048 {
12049 switch (offset)
12050 {
12051 case 1:
12052 dst0[0] = src_l0[0] | src_r0[0] << 8;
12053 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12054 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12055 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12056 dst1[0] = src_r0[3] >> 24;
12057 break;
12058
12059 case 2:
12060 dst0[0] = src_l0[0] | src_r0[0] << 16;
12061 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12062 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12063 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12064 dst1[0] = src_r0[3] >> 16;
12065 break;
12066
12067 case 3:
12068 dst0[0] = src_l0[0] | src_r0[0] << 24;
12069 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12070 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12071 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12072 dst1[0] = src_r0[3] >> 8;
12073 break;
12074
12075 case 4:
12076 dst0[1] = src_r0[0];
12077 dst0[2] = src_r0[1];
12078 dst0[3] = src_r0[2];
12079 dst1[0] = src_r0[3];
12080 break;
12081
12082 case 5:
12083 dst0[1] = src_l0[1] | src_r0[0] << 8;
12084 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12085 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12086 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
12087 dst1[1] = src_r0[3] >> 24;
12088 break;
12089
12090 case 6:
12091 dst0[1] = src_l0[1] | src_r0[0] << 16;
12092 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12093 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12094 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
12095 dst1[1] = src_r0[3] >> 16;
12096 break;
12097
12098 case 7:
12099 dst0[1] = src_l0[1] | src_r0[0] << 24;
12100 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12101 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12102 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
12103 dst1[1] = src_r0[3] >> 8;
12104 break;
12105
12106 case 8:
12107 dst0[2] = src_r0[0];
12108 dst0[3] = src_r0[1];
12109 dst1[0] = src_r0[2];
12110 dst1[1] = src_r0[3];
12111 break;
12112
12113 case 9:
12114 dst0[2] = src_l0[2] | src_r0[0] << 8;
12115 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12116 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
12117 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
12118 dst1[2] = src_r0[3] >> 24;
12119 break;
12120
12121 case 10:
12122 dst0[2] = src_l0[2] | src_r0[0] << 16;
12123 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12124 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
12125 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
12126 dst1[2] = src_r0[3] >> 16;
12127 break;
12128
12129 case 11:
12130 dst0[2] = src_l0[2] | src_r0[0] << 24;
12131 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12132 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
12133 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
12134 dst1[2] = src_r0[3] >> 8;
12135 break;
12136
12137 case 12:
12138 dst0[3] = src_r0[0];
12139 dst1[0] = src_r0[1];
12140 dst1[1] = src_r0[2];
12141 dst1[2] = src_r0[3];
12142 break;
12143
12144 case 13:
12145 dst0[3] = src_l0[3] | src_r0[0] << 8;
12146 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
12147 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
12148 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
12149 dst1[3] = src_r0[3] >> 24;
12150 break;
12151
12152 case 14:
12153 dst0[3] = src_l0[3] | src_r0[0] << 16;
12154 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
12155 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
12156 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
12157 dst1[3] = src_r0[3] >> 16;
12158 break;
12159
12160 case 15:
12161 dst0[3] = src_l0[3] | src_r0[0] << 24;
12162 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
12163 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
12164 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
12165 dst1[3] = src_r0[3] >> 8;
12166 break;
12167
12168 case 16:
12169 dst1[0] = src_r0[0];
12170 dst1[1] = src_r0[1];
12171 dst1[2] = src_r0[2];
12172 dst1[3] = src_r0[3];
12173 break;
12174
12175 case 17:
12176 dst1[0] = src_l1[0] | src_r0[0] << 8;
12177 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12178 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12179 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12180 break;
12181
12182 case 18:
12183 dst1[0] = src_l1[0] | src_r0[0] << 16;
12184 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12185 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12186 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12187 break;
12188
12189 case 19:
12190 dst1[0] = src_l1[0] | src_r0[0] << 24;
12191 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12192 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12193 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12194 break;
12195
12196 case 20:
12197 dst1[1] = src_r0[0];
12198 dst1[2] = src_r0[1];
12199 dst1[3] = src_r0[2];
12200 break;
12201
12202 case 21:
12203 dst1[1] = src_l1[1] | src_r0[0] << 8;
12204 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12205 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12206 break;
12207
12208 case 22:
12209 dst1[1] = src_l1[1] | src_r0[0] << 16;
12210 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12211 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12212 break;
12213
12214 case 23:
12215 dst1[1] = src_l1[1] | src_r0[0] << 24;
12216 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12217 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12218 break;
12219
12220 case 24:
12221 dst1[2] = src_r0[0];
12222 dst1[3] = src_r0[1];
12223 break;
12224
12225 case 25:
12226 dst1[2] = src_l1[2] | src_r0[0] << 8;
12227 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12228 break;
12229
12230 case 26:
12231 dst1[2] = src_l1[2] | src_r0[0] << 16;
12232 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12233 break;
12234
12235 case 27:
12236 dst1[2] = src_l1[2] | src_r0[0] << 24;
12237 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12238 break;
12239
12240 case 28:
12241 dst1[3] = src_r0[0];
12242 break;
12243
12244 case 29:
12245 dst1[3] = src_l1[3] | src_r0[0] << 8;
12246 break;
12247
12248 case 30:
12249 dst1[3] = src_l1[3] | src_r0[0] << 16;
12250 break;
12251
12252 case 31:
12253 dst1[3] = src_l1[3] | src_r0[0] << 24;
12254 break;
12255 }
12256 }
12257
12258 static void device_memcat12L (const u32 offset, u32x dst0[4], u32x dst1[4], u32x dst2[4], u32x src_l0[4], u32x src_l1[4], u32x src_l2[4], u32 src_r0[4])
12259 {
12260 switch (offset)
12261 {
12262 case 1:
12263 dst0[0] = src_l0[0] | src_r0[0] << 8;
12264 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12265 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12266 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12267 dst1[0] = src_r0[3] >> 24;
12268 break;
12269
12270 case 2:
12271 dst0[0] = src_l0[0] | src_r0[0] << 16;
12272 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12273 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12274 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12275 dst1[0] = src_r0[3] >> 16;
12276 break;
12277
12278 case 3:
12279 dst0[0] = src_l0[0] | src_r0[0] << 24;
12280 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12281 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12282 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12283 dst1[0] = src_r0[3] >> 8;
12284 break;
12285
12286 case 4:
12287 dst0[1] = src_r0[0];
12288 dst0[2] = src_r0[1];
12289 dst0[3] = src_r0[2];
12290 dst1[0] = src_r0[3];
12291 break;
12292
12293 case 5:
12294 dst0[1] = src_l0[1] | src_r0[0] << 8;
12295 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12296 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12297 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
12298 dst1[1] = src_r0[3] >> 24;
12299 break;
12300
12301 case 6:
12302 dst0[1] = src_l0[1] | src_r0[0] << 16;
12303 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12304 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12305 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
12306 dst1[1] = src_r0[3] >> 16;
12307 break;
12308
12309 case 7:
12310 dst0[1] = src_l0[1] | src_r0[0] << 24;
12311 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12312 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12313 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
12314 dst1[1] = src_r0[3] >> 8;
12315 break;
12316
12317 case 8:
12318 dst0[2] = src_r0[0];
12319 dst0[3] = src_r0[1];
12320 dst1[0] = src_r0[2];
12321 dst1[1] = src_r0[3];
12322 break;
12323
12324 case 9:
12325 dst0[2] = src_l0[2] | src_r0[0] << 8;
12326 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12327 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
12328 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
12329 dst1[2] = src_r0[3] >> 24;
12330 break;
12331
12332 case 10:
12333 dst0[2] = src_l0[2] | src_r0[0] << 16;
12334 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12335 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
12336 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
12337 dst1[2] = src_r0[3] >> 16;
12338 break;
12339
12340 case 11:
12341 dst0[2] = src_l0[2] | src_r0[0] << 24;
12342 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12343 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
12344 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
12345 dst1[2] = src_r0[3] >> 8;
12346 break;
12347
12348 case 12:
12349 dst0[3] = src_r0[0];
12350 dst1[0] = src_r0[1];
12351 dst1[1] = src_r0[2];
12352 dst1[2] = src_r0[3];
12353 break;
12354
12355 case 13:
12356 dst0[3] = src_l0[3] | src_r0[0] << 8;
12357 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
12358 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
12359 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
12360 dst1[3] = src_r0[3] >> 24;
12361 break;
12362
12363 case 14:
12364 dst0[3] = src_l0[3] | src_r0[0] << 16;
12365 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
12366 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
12367 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
12368 dst1[3] = src_r0[3] >> 16;
12369 break;
12370
12371 case 15:
12372 dst0[3] = src_l0[3] | src_r0[0] << 24;
12373 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
12374 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
12375 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
12376 dst1[3] = src_r0[3] >> 8;
12377 break;
12378
12379 case 16:
12380 dst1[0] = src_r0[0];
12381 dst1[1] = src_r0[1];
12382 dst1[2] = src_r0[2];
12383 dst1[3] = src_r0[3];
12384 break;
12385
12386 case 17:
12387 dst1[0] = src_l1[0] | src_r0[0] << 8;
12388 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12389 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12390 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12391 dst2[0] = src_r0[3] >> 24;
12392 break;
12393
12394 case 18:
12395 dst1[0] = src_l1[0] | src_r0[0] << 16;
12396 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12397 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12398 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12399 dst2[0] = src_r0[3] >> 16;
12400 break;
12401
12402 case 19:
12403 dst1[0] = src_l1[0] | src_r0[0] << 24;
12404 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12405 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12406 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12407 dst2[0] = src_r0[3] >> 8;
12408 break;
12409
12410 case 20:
12411 dst1[1] = src_r0[0];
12412 dst1[2] = src_r0[1];
12413 dst1[3] = src_r0[2];
12414 dst2[0] = src_r0[3];
12415 break;
12416
12417 case 21:
12418 dst1[1] = src_l1[1] | src_r0[0] << 8;
12419 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12420 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12421 dst2[0] = src_r0[2] >> 24 | src_r0[3] << 8;
12422 dst2[1] = src_r0[3] >> 24;
12423 break;
12424
12425 case 22:
12426 dst1[1] = src_l1[1] | src_r0[0] << 16;
12427 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12428 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12429 dst2[0] = src_r0[2] >> 16 | src_r0[3] << 16;
12430 dst2[1] = src_r0[3] >> 16;
12431 break;
12432
12433 case 23:
12434 dst1[1] = src_l1[1] | src_r0[0] << 24;
12435 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12436 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12437 dst2[0] = src_r0[2] >> 8 | src_r0[3] << 24;
12438 dst2[1] = src_r0[3] >> 8;
12439 break;
12440
12441 case 24:
12442 dst1[2] = src_r0[0];
12443 dst1[3] = src_r0[1];
12444 dst2[0] = src_r0[2];
12445 dst2[1] = src_r0[3];
12446 break;
12447
12448 case 25:
12449 dst1[2] = src_l1[2] | src_r0[0] << 8;
12450 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12451 dst2[0] = src_r0[1] >> 24 | src_r0[2] << 8;
12452 dst2[1] = src_r0[2] >> 24 | src_r0[3] << 8;
12453 dst2[2] = src_r0[3] >> 24;
12454 break;
12455
12456 case 26:
12457 dst1[2] = src_l1[2] | src_r0[0] << 16;
12458 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12459 dst2[0] = src_r0[1] >> 16 | src_r0[2] << 16;
12460 dst2[1] = src_r0[2] >> 16 | src_r0[3] << 16;
12461 dst2[2] = src_r0[3] >> 16;
12462 break;
12463
12464 case 27:
12465 dst1[2] = src_l1[2] | src_r0[0] << 24;
12466 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12467 dst2[0] = src_r0[1] >> 8 | src_r0[2] << 24;
12468 dst2[1] = src_r0[2] >> 8 | src_r0[3] << 24;
12469 dst2[2] = src_r0[3] >> 8;
12470 break;
12471
12472 case 28:
12473 dst1[3] = src_r0[0];
12474 dst2[0] = src_r0[1];
12475 dst2[1] = src_r0[2];
12476 dst2[2] = src_r0[3];
12477 break;
12478
12479 case 29:
12480 dst1[3] = src_l1[3] | src_r0[0] << 8;
12481 dst2[0] = src_r0[0] >> 24 | src_r0[1] << 8;
12482 dst2[1] = src_r0[1] >> 24 | src_r0[2] << 8;
12483 dst2[2] = src_r0[2] >> 24 | src_r0[3] << 8;
12484 dst2[3] = src_r0[3] >> 24;
12485 break;
12486
12487 case 30:
12488 dst1[3] = src_l1[3] | src_r0[0] << 16;
12489 dst2[0] = src_r0[0] >> 16 | src_r0[1] << 16;
12490 dst2[1] = src_r0[1] >> 16 | src_r0[2] << 16;
12491 dst2[2] = src_r0[2] >> 16 | src_r0[3] << 16;
12492 dst2[3] = src_r0[3] >> 16;
12493 break;
12494
12495 case 31:
12496 dst1[3] = src_l1[3] | src_r0[0] << 24;
12497 dst2[0] = src_r0[0] >> 8 | src_r0[1] << 24;
12498 dst2[1] = src_r0[1] >> 8 | src_r0[2] << 24;
12499 dst2[2] = src_r0[2] >> 8 | src_r0[3] << 24;
12500 dst2[3] = src_r0[3] >> 8;
12501 break;
12502
12503 case 32:
12504 dst2[0] = src_r0[0];
12505 dst2[1] = src_r0[1];
12506 dst2[2] = src_r0[2];
12507 dst2[3] = src_r0[3];
12508 break;
12509
12510 case 33:
12511 dst2[0] = src_l2[0] | src_r0[0] << 8;
12512 dst2[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12513 dst2[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12514 dst2[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12515 break;
12516
12517 case 34:
12518 dst2[0] = src_l2[0] | src_r0[0] << 16;
12519 dst2[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12520 dst2[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12521 dst2[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12522 break;
12523
12524 case 35:
12525 dst2[0] = src_l2[0] | src_r0[0] << 24;
12526 dst2[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12527 dst2[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12528 dst2[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12529 break;
12530
12531 case 36:
12532 dst2[1] = src_r0[0];
12533 dst2[2] = src_r0[1];
12534 dst2[3] = src_r0[2];
12535 break;
12536
12537 case 37:
12538 dst2[1] = src_l2[1] | src_r0[0] << 8;
12539 dst2[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12540 dst2[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12541 break;
12542
12543 case 38:
12544 dst2[1] = src_l2[1] | src_r0[0] << 16;
12545 dst2[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12546 dst2[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12547 break;
12548
12549 case 39:
12550 dst2[1] = src_l2[1] | src_r0[0] << 24;
12551 dst2[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12552 dst2[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12553 break;
12554
12555 case 40:
12556 dst2[2] = src_r0[0];
12557 dst2[3] = src_r0[1];
12558 break;
12559
12560 case 41:
12561 dst2[2] = src_l2[2] | src_r0[0] << 8;
12562 dst2[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12563 break;
12564
12565 case 42:
12566 dst2[2] = src_l2[2] | src_r0[0] << 16;
12567 dst2[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12568 break;
12569
12570 case 43:
12571 dst2[2] = src_l2[2] | src_r0[0] << 24;
12572 dst2[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12573 break;
12574
12575 case 44:
12576 dst2[3] = src_r0[0];
12577 break;
12578
12579 case 45:
12580 dst2[3] = src_l2[3] | src_r0[0] << 8;
12581 break;
12582
12583 case 46:
12584 dst2[3] = src_l2[3] | src_r0[0] << 16;
12585 break;
12586
12587 case 47:
12588 dst2[3] = src_l2[3] | src_r0[0] << 24;
12589 break;
12590 }
12591 }
12592
12593 static void device_memcat12L (const u32 offset, u32x dst0[4], u32x dst1[4], u32x dst2[4], u32x src_l0[4], u32x src_l1[4], u32x src_l2[4], u32x src_r0[4])
12594 {
12595 switch (offset)
12596 {
12597 case 1:
12598 dst0[0] = src_l0[0] | src_r0[0] << 8;
12599 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12600 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12601 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12602 dst1[0] = src_r0[3] >> 24;
12603 break;
12604
12605 case 2:
12606 dst0[0] = src_l0[0] | src_r0[0] << 16;
12607 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12608 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12609 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12610 dst1[0] = src_r0[3] >> 16;
12611 break;
12612
12613 case 3:
12614 dst0[0] = src_l0[0] | src_r0[0] << 24;
12615 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12616 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12617 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12618 dst1[0] = src_r0[3] >> 8;
12619 break;
12620
12621 case 4:
12622 dst0[1] = src_r0[0];
12623 dst0[2] = src_r0[1];
12624 dst0[3] = src_r0[2];
12625 dst1[0] = src_r0[3];
12626 break;
12627
12628 case 5:
12629 dst0[1] = src_l0[1] | src_r0[0] << 8;
12630 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12631 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12632 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
12633 dst1[1] = src_r0[3] >> 24;
12634 break;
12635
12636 case 6:
12637 dst0[1] = src_l0[1] | src_r0[0] << 16;
12638 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12639 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12640 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
12641 dst1[1] = src_r0[3] >> 16;
12642 break;
12643
12644 case 7:
12645 dst0[1] = src_l0[1] | src_r0[0] << 24;
12646 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12647 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12648 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
12649 dst1[1] = src_r0[3] >> 8;
12650 break;
12651
12652 case 8:
12653 dst0[2] = src_r0[0];
12654 dst0[3] = src_r0[1];
12655 dst1[0] = src_r0[2];
12656 dst1[1] = src_r0[3];
12657 break;
12658
12659 case 9:
12660 dst0[2] = src_l0[2] | src_r0[0] << 8;
12661 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12662 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
12663 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
12664 dst1[2] = src_r0[3] >> 24;
12665 break;
12666
12667 case 10:
12668 dst0[2] = src_l0[2] | src_r0[0] << 16;
12669 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12670 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
12671 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
12672 dst1[2] = src_r0[3] >> 16;
12673 break;
12674
12675 case 11:
12676 dst0[2] = src_l0[2] | src_r0[0] << 24;
12677 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12678 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
12679 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
12680 dst1[2] = src_r0[3] >> 8;
12681 break;
12682
12683 case 12:
12684 dst0[3] = src_r0[0];
12685 dst1[0] = src_r0[1];
12686 dst1[1] = src_r0[2];
12687 dst1[2] = src_r0[3];
12688 break;
12689
12690 case 13:
12691 dst0[3] = src_l0[3] | src_r0[0] << 8;
12692 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
12693 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
12694 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
12695 dst1[3] = src_r0[3] >> 24;
12696 break;
12697
12698 case 14:
12699 dst0[3] = src_l0[3] | src_r0[0] << 16;
12700 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
12701 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
12702 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
12703 dst1[3] = src_r0[3] >> 16;
12704 break;
12705
12706 case 15:
12707 dst0[3] = src_l0[3] | src_r0[0] << 24;
12708 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
12709 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
12710 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
12711 dst1[3] = src_r0[3] >> 8;
12712 break;
12713
12714 case 16:
12715 dst1[0] = src_r0[0];
12716 dst1[1] = src_r0[1];
12717 dst1[2] = src_r0[2];
12718 dst1[3] = src_r0[3];
12719 break;
12720
12721 case 17:
12722 dst1[0] = src_l1[0] | src_r0[0] << 8;
12723 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12724 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12725 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12726 dst2[0] = src_r0[3] >> 24;
12727 break;
12728
12729 case 18:
12730 dst1[0] = src_l1[0] | src_r0[0] << 16;
12731 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12732 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12733 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12734 dst2[0] = src_r0[3] >> 16;
12735 break;
12736
12737 case 19:
12738 dst1[0] = src_l1[0] | src_r0[0] << 24;
12739 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12740 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12741 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12742 dst2[0] = src_r0[3] >> 8;
12743 break;
12744
12745 case 20:
12746 dst1[1] = src_r0[0];
12747 dst1[2] = src_r0[1];
12748 dst1[3] = src_r0[2];
12749 dst2[0] = src_r0[3];
12750 break;
12751
12752 case 21:
12753 dst1[1] = src_l1[1] | src_r0[0] << 8;
12754 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12755 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12756 dst2[0] = src_r0[2] >> 24 | src_r0[3] << 8;
12757 dst2[1] = src_r0[3] >> 24;
12758 break;
12759
12760 case 22:
12761 dst1[1] = src_l1[1] | src_r0[0] << 16;
12762 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12763 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12764 dst2[0] = src_r0[2] >> 16 | src_r0[3] << 16;
12765 dst2[1] = src_r0[3] >> 16;
12766 break;
12767
12768 case 23:
12769 dst1[1] = src_l1[1] | src_r0[0] << 24;
12770 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12771 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12772 dst2[0] = src_r0[2] >> 8 | src_r0[3] << 24;
12773 dst2[1] = src_r0[3] >> 8;
12774 break;
12775
12776 case 24:
12777 dst1[2] = src_r0[0];
12778 dst1[3] = src_r0[1];
12779 dst2[0] = src_r0[2];
12780 dst2[1] = src_r0[3];
12781 break;
12782
12783 case 25:
12784 dst1[2] = src_l1[2] | src_r0[0] << 8;
12785 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12786 dst2[0] = src_r0[1] >> 24 | src_r0[2] << 8;
12787 dst2[1] = src_r0[2] >> 24 | src_r0[3] << 8;
12788 dst2[2] = src_r0[3] >> 24;
12789 break;
12790
12791 case 26:
12792 dst1[2] = src_l1[2] | src_r0[0] << 16;
12793 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12794 dst2[0] = src_r0[1] >> 16 | src_r0[2] << 16;
12795 dst2[1] = src_r0[2] >> 16 | src_r0[3] << 16;
12796 dst2[2] = src_r0[3] >> 16;
12797 break;
12798
12799 case 27:
12800 dst1[2] = src_l1[2] | src_r0[0] << 24;
12801 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12802 dst2[0] = src_r0[1] >> 8 | src_r0[2] << 24;
12803 dst2[1] = src_r0[2] >> 8 | src_r0[3] << 24;
12804 dst2[2] = src_r0[3] >> 8;
12805 break;
12806
12807 case 28:
12808 dst1[3] = src_r0[0];
12809 dst2[0] = src_r0[1];
12810 dst2[1] = src_r0[2];
12811 dst2[2] = src_r0[3];
12812 break;
12813
12814 case 29:
12815 dst1[3] = src_l1[3] | src_r0[0] << 8;
12816 dst2[0] = src_r0[0] >> 24 | src_r0[1] << 8;
12817 dst2[1] = src_r0[1] >> 24 | src_r0[2] << 8;
12818 dst2[2] = src_r0[2] >> 24 | src_r0[3] << 8;
12819 dst2[3] = src_r0[3] >> 24;
12820 break;
12821
12822 case 30:
12823 dst1[3] = src_l1[3] | src_r0[0] << 16;
12824 dst2[0] = src_r0[0] >> 16 | src_r0[1] << 16;
12825 dst2[1] = src_r0[1] >> 16 | src_r0[2] << 16;
12826 dst2[2] = src_r0[2] >> 16 | src_r0[3] << 16;
12827 dst2[3] = src_r0[3] >> 16;
12828 break;
12829
12830 case 31:
12831 dst1[3] = src_l1[3] | src_r0[0] << 24;
12832 dst2[0] = src_r0[0] >> 8 | src_r0[1] << 24;
12833 dst2[1] = src_r0[1] >> 8 | src_r0[2] << 24;
12834 dst2[2] = src_r0[2] >> 8 | src_r0[3] << 24;
12835 dst2[3] = src_r0[3] >> 8;
12836 break;
12837
12838 case 32:
12839 dst2[0] = src_r0[0];
12840 dst2[1] = src_r0[1];
12841 dst2[2] = src_r0[2];
12842 dst2[3] = src_r0[3];
12843 break;
12844
12845 case 33:
12846 dst2[0] = src_l2[0] | src_r0[0] << 8;
12847 dst2[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12848 dst2[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12849 dst2[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12850 break;
12851
12852 case 34:
12853 dst2[0] = src_l2[0] | src_r0[0] << 16;
12854 dst2[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12855 dst2[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12856 dst2[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12857 break;
12858
12859 case 35:
12860 dst2[0] = src_l2[0] | src_r0[0] << 24;
12861 dst2[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12862 dst2[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12863 dst2[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12864 break;
12865
12866 case 36:
12867 dst2[1] = src_r0[0];
12868 dst2[2] = src_r0[1];
12869 dst2[3] = src_r0[2];
12870 break;
12871
12872 case 37:
12873 dst2[1] = src_l2[1] | src_r0[0] << 8;
12874 dst2[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12875 dst2[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12876 break;
12877
12878 case 38:
12879 dst2[1] = src_l2[1] | src_r0[0] << 16;
12880 dst2[2] = src_r0[0] >> 16 | src_r0[1] << 16;
12881 dst2[3] = src_r0[1] >> 16 | src_r0[2] << 16;
12882 break;
12883
12884 case 39:
12885 dst2[1] = src_l2[1] | src_r0[0] << 24;
12886 dst2[2] = src_r0[0] >> 8 | src_r0[1] << 24;
12887 dst2[3] = src_r0[1] >> 8 | src_r0[2] << 24;
12888 break;
12889
12890 case 40:
12891 dst2[2] = src_r0[0];
12892 dst2[3] = src_r0[1];
12893 break;
12894
12895 case 41:
12896 dst2[2] = src_l2[2] | src_r0[0] << 8;
12897 dst2[3] = src_r0[0] >> 24 | src_r0[1] << 8;
12898 break;
12899
12900 case 42:
12901 dst2[2] = src_l2[2] | src_r0[0] << 16;
12902 dst2[3] = src_r0[0] >> 16 | src_r0[1] << 16;
12903 break;
12904
12905 case 43:
12906 dst2[2] = src_l2[2] | src_r0[0] << 24;
12907 dst2[3] = src_r0[0] >> 8 | src_r0[1] << 24;
12908 break;
12909
12910 case 44:
12911 dst2[3] = src_r0[0];
12912 break;
12913
12914 case 45:
12915 dst2[3] = src_l2[3] | src_r0[0] << 8;
12916 break;
12917
12918 case 46:
12919 dst2[3] = src_l2[3] | src_r0[0] << 16;
12920 break;
12921
12922 case 47:
12923 dst2[3] = src_l2[3] | src_r0[0] << 24;
12924 break;
12925 }
12926 }
12927
12928 static void device_memcat12L (const u32 offset, u32x dst0[4], u32x dst1[4], u32x dst2[4], u32x src_l0[4], u32x src_l1[4], u32x src_l2[4], u32x src_r0[4], u32x src_r1[4])
12929 {
12930 switch (offset)
12931 {
12932 case 0:
12933 dst0[0] = src_r0[0];
12934 dst0[1] = src_r0[1];
12935 dst0[2] = src_r0[2];
12936 dst0[3] = src_r0[3];
12937 dst1[0] = src_r1[0];
12938 dst1[1] = src_r1[1];
12939 dst1[2] = src_r1[2];
12940 dst1[3] = src_r1[3];
12941 break;
12942
12943 case 1:
12944 dst0[0] = src_l0[0] | src_r0[0] << 8;
12945 dst0[1] = src_r0[0] >> 24 | src_r0[1] << 8;
12946 dst0[2] = src_r0[1] >> 24 | src_r0[2] << 8;
12947 dst0[3] = src_r0[2] >> 24 | src_r0[3] << 8;
12948 dst1[0] = src_r0[3] >> 24 | src_r1[0] << 8;
12949 dst1[1] = src_r1[0] >> 24 | src_r1[1] << 8;
12950 dst1[2] = src_r1[1] >> 24 | src_r1[2] << 8;
12951 dst1[3] = src_r1[2] >> 24 | src_r1[3] << 8;
12952 dst2[0] = src_r1[3] >> 24;
12953 break;
12954
12955 case 2:
12956 dst0[0] = src_l0[0] | src_r0[0] << 16;
12957 dst0[1] = src_r0[0] >> 16 | src_r0[1] << 16;
12958 dst0[2] = src_r0[1] >> 16 | src_r0[2] << 16;
12959 dst0[3] = src_r0[2] >> 16 | src_r0[3] << 16;
12960 dst1[0] = src_r0[3] >> 16 | src_r1[0] << 16;
12961 dst1[1] = src_r1[0] >> 16 | src_r1[1] << 16;
12962 dst1[2] = src_r1[1] >> 16 | src_r1[2] << 16;
12963 dst1[3] = src_r1[2] >> 16 | src_r1[3] << 16;
12964 dst2[0] = src_r1[3] >> 16;
12965 break;
12966
12967 case 3:
12968 dst0[0] = src_l0[0] | src_r0[0] << 24;
12969 dst0[1] = src_r0[0] >> 8 | src_r0[1] << 24;
12970 dst0[2] = src_r0[1] >> 8 | src_r0[2] << 24;
12971 dst0[3] = src_r0[2] >> 8 | src_r0[3] << 24;
12972 dst1[0] = src_r0[3] >> 8 | src_r1[0] << 24;
12973 dst1[1] = src_r1[0] >> 8 | src_r1[1] << 24;
12974 dst1[2] = src_r1[1] >> 8 | src_r1[2] << 24;
12975 dst1[3] = src_r1[2] >> 8 | src_r1[3] << 24;
12976 dst2[0] = src_r1[3] >> 8;
12977 break;
12978
12979 case 4:
12980 dst0[1] = src_r0[0];
12981 dst0[2] = src_r0[1];
12982 dst0[3] = src_r0[2];
12983 dst1[0] = src_r0[3];
12984 dst1[1] = src_r1[0];
12985 dst1[2] = src_r1[1];
12986 dst1[3] = src_r1[2];
12987 dst2[0] = src_r1[3];
12988 break;
12989
12990 case 5:
12991 dst0[1] = src_l0[1] | src_r0[0] << 8;
12992 dst0[2] = src_r0[0] >> 24 | src_r0[1] << 8;
12993 dst0[3] = src_r0[1] >> 24 | src_r0[2] << 8;
12994 dst1[0] = src_r0[2] >> 24 | src_r0[3] << 8;
12995 dst1[1] = src_r0[3] >> 24 | src_r1[0] << 8;
12996 dst1[2] = src_r1[0] >> 24 | src_r1[1] << 8;
12997 dst1[3] = src_r1[1] >> 24 | src_r1[2] << 8;
12998 dst2[0] = src_r1[2] >> 24 | src_r1[3] << 8;
12999 dst2[1] = src_r1[3] >> 24;
13000 break;
13001
13002 case 6:
13003 dst0[1] = src_l0[1] | src_r0[0] << 16;
13004 dst0[2] = src_r0[0] >> 16 | src_r0[1] << 16;
13005 dst0[3] = src_r0[1] >> 16 | src_r0[2] << 16;
13006 dst1[0] = src_r0[2] >> 16 | src_r0[3] << 16;
13007 dst1[1] = src_r0[3] >> 16 | src_r1[0] << 16;
13008 dst1[2] = src_r1[0] >> 16 | src_r1[1] << 16;
13009 dst1[3] = src_r1[1] >> 16 | src_r1[2] << 16;
13010 dst2[0] = src_r1[2] >> 16 | src_r1[3] << 16;
13011 dst2[1] = src_r1[3] >> 16;
13012 break;
13013
13014 case 7:
13015 dst0[1] = src_l0[1] | src_r0[0] << 24;
13016 dst0[2] = src_r0[0] >> 8 | src_r0[1] << 24;
13017 dst0[3] = src_r0[1] >> 8 | src_r0[2] << 24;
13018 dst1[0] = src_r0[2] >> 8 | src_r0[3] << 24;
13019 dst1[1] = src_r0[3] >> 8 | src_r1[0] << 24;
13020 dst1[2] = src_r1[0] >> 8 | src_r1[1] << 24;
13021 dst1[3] = src_r1[1] >> 8 | src_r1[2] << 24;
13022 dst2[0] = src_r1[2] >> 8 | src_r1[3] << 24;
13023 dst2[1] = src_r1[3] >> 8;
13024 break;
13025
13026 case 8:
13027 dst0[2] = src_r0[0];
13028 dst0[3] = src_r0[1];
13029 dst1[0] = src_r0[2];
13030 dst1[1] = src_r0[3];
13031 dst1[2] = src_r1[0];
13032 dst1[3] = src_r1[1];
13033 dst2[0] = src_r1[2];
13034 dst2[1] = src_r1[3];
13035 break;
13036
13037 case 9:
13038 dst0[2] = src_l0[2] | src_r0[0] << 8;
13039 dst0[3] = src_r0[0] >> 24 | src_r0[1] << 8;
13040 dst1[0] = src_r0[1] >> 24 | src_r0[2] << 8;
13041 dst1[1] = src_r0[2] >> 24 | src_r0[3] << 8;
13042 dst1[2] = src_r0[3] >> 24 | src_r1[0] << 8;
13043 dst1[3] = src_r1[0] >> 24 | src_r1[1] << 8;
13044 dst2[0] = src_r1[1] >> 24 | src_r1[2] << 8;
13045 dst2[1] = src_r1[2] >> 24 | src_r1[3] << 8;
13046 dst2[2] = src_r1[3] >> 24;
13047 break;
13048
13049 case 10:
13050 dst0[2] = src_l0[2] | src_r0[0] << 16;
13051 dst0[3] = src_r0[0] >> 16 | src_r0[1] << 16;
13052 dst1[0] = src_r0[1] >> 16 | src_r0[2] << 16;
13053 dst1[1] = src_r0[2] >> 16 | src_r0[3] << 16;
13054 dst1[2] = src_r0[3] >> 16 | src_r1[0] << 16;
13055 dst1[3] = src_r1[0] >> 16 | src_r1[1] << 16;
13056 dst2[0] = src_r1[1] >> 16 | src_r1[2] << 16;
13057 dst2[1] = src_r1[2] >> 16 | src_r1[3] << 16;
13058 dst2[2] = src_r1[3] >> 16;
13059 break;
13060
13061 case 11:
13062 dst0[2] = src_l0[2] | src_r0[0] << 24;
13063 dst0[3] = src_r0[0] >> 8 | src_r0[1] << 24;
13064 dst1[0] = src_r0[1] >> 8 | src_r0[2] << 24;
13065 dst1[1] = src_r0[2] >> 8 | src_r0[3] << 24;
13066 dst1[2] = src_r0[3] >> 8 | src_r1[0] << 24;
13067 dst1[3] = src_r1[0] >> 8 | src_r1[1] << 24;
13068 dst2[0] = src_r1[1] >> 8 | src_r1[2] << 24;
13069 dst2[1] = src_r1[2] >> 8 | src_r1[3] << 24;
13070 dst2[2] = src_r1[3] >> 8;
13071 break;
13072
13073 case 12:
13074 dst0[3] = src_r0[0];
13075 dst1[0] = src_r0[1];
13076 dst1[1] = src_r0[2];
13077 dst1[2] = src_r0[3];
13078 dst1[3] = src_r1[0];
13079 dst2[0] = src_r1[1];
13080 dst2[1] = src_r1[2];
13081 dst2[2] = src_r1[3];
13082 break;
13083
13084 case 13:
13085 dst0[3] = src_l0[3] | src_r0[0] << 8;
13086 dst1[0] = src_r0[0] >> 24 | src_r0[1] << 8;
13087 dst1[1] = src_r0[1] >> 24 | src_r0[2] << 8;
13088 dst1[2] = src_r0[2] >> 24 | src_r0[3] << 8;
13089 dst1[3] = src_r0[3] >> 24 | src_r1[0] << 8;
13090 dst2[0] = src_r1[0] >> 24 | src_r1[1] << 8;
13091 dst2[1] = src_r1[1] >> 24 | src_r1[2] << 8;
13092 dst2[2] = src_r1[2] >> 24 | src_r1[3] << 8;
13093 dst2[3] = src_r1[3] >> 24;
13094 break;
13095
13096 case 14:
13097 dst0[3] = src_l0[3] | src_r0[0] << 16;
13098 dst1[0] = src_r0[0] >> 16 | src_r0[1] << 16;
13099 dst1[1] = src_r0[1] >> 16 | src_r0[2] << 16;
13100 dst1[2] = src_r0[2] >> 16 | src_r0[3] << 16;
13101 dst1[3] = src_r0[3] >> 16 | src_r1[0] << 16;
13102 dst2[0] = src_r1[0] >> 16 | src_r1[1] << 16;
13103 dst2[1] = src_r1[1] >> 16 | src_r1[2] << 16;
13104 dst2[2] = src_r1[2] >> 16 | src_r1[3] << 16;
13105 dst2[3] = src_r1[3] >> 16;
13106 break;
13107
13108 case 15:
13109 dst0[3] = src_l0[3] | src_r0[0] << 24;
13110 dst1[0] = src_r0[0] >> 8 | src_r0[1] << 24;
13111 dst1[1] = src_r0[1] >> 8 | src_r0[2] << 24;
13112 dst1[2] = src_r0[2] >> 8 | src_r0[3] << 24;
13113 dst1[3] = src_r0[3] >> 8 | src_r1[0] << 24;
13114 dst2[0] = src_r1[0] >> 8 | src_r1[1] << 24;
13115 dst2[1] = src_r1[1] >> 8 | src_r1[2] << 24;
13116 dst2[2] = src_r1[2] >> 8 | src_r1[3] << 24;
13117 dst2[3] = src_r1[3] >> 8;
13118 break;
13119
13120 case 16:
13121 dst1[0] = src_r0[0];
13122 dst1[1] = src_r0[1];
13123 dst1[2] = src_r0[2];
13124 dst1[3] = src_r0[3];
13125 dst2[0] = src_r1[0];
13126 dst2[1] = src_r1[1];
13127 dst2[2] = src_r1[2];
13128 dst2[3] = src_r1[3];
13129 break;
13130
13131 case 17:
13132 dst1[0] = src_l1[0] | src_r0[0] << 8;
13133 dst1[1] = src_r0[0] >> 24 | src_r0[1] << 8;
13134 dst1[2] = src_r0[1] >> 24 | src_r0[2] << 8;
13135 dst1[3] = src_r0[2] >> 24 | src_r0[3] << 8;
13136 dst2[0] = src_r0[3] >> 24 | src_r1[0] << 8;
13137 dst2[1] = src_r1[0] >> 24 | src_r1[1] << 8;
13138 dst2[2] = src_r1[1] >> 24 | src_r1[2] << 8;
13139 dst2[3] = src_r1[2] >> 24 | src_r1[3] << 8;
13140 break;
13141
13142 case 18:
13143 dst1[0] = src_l1[0] | src_r0[0] << 16;
13144 dst1[1] = src_r0[0] >> 16 | src_r0[1] << 16;
13145 dst1[2] = src_r0[1] >> 16 | src_r0[2] << 16;
13146 dst1[3] = src_r0[2] >> 16 | src_r0[3] << 16;
13147 dst2[0] = src_r0[3] >> 16 | src_r1[0] << 16;
13148 dst2[1] = src_r1[0] >> 16 | src_r1[1] << 16;
13149 dst2[2] = src_r1[1] >> 16 | src_r1[2] << 16;
13150 dst2[3] = src_r1[2] >> 16 | src_r1[3] << 16;
13151 break;
13152
13153 case 19:
13154 dst1[0] = src_l1[0] | src_r0[0] << 24;
13155 dst1[1] = src_r0[0] >> 8 | src_r0[1] << 24;
13156 dst1[2] = src_r0[1] >> 8 | src_r0[2] << 24;
13157 dst1[3] = src_r0[2] >> 8 | src_r0[3] << 24;
13158 dst2[0] = src_r0[3] >> 8 | src_r1[0] << 24;
13159 dst2[1] = src_r1[0] >> 8 | src_r1[1] << 24;
13160 dst2[2] = src_r1[1] >> 8 | src_r1[2] << 24;
13161 dst2[3] = src_r1[2] >> 8 | src_r1[3] << 24;
13162 break;
13163
13164 case 20:
13165 dst1[1] = src_r1[0];
13166 dst1[2] = src_r0[1];
13167 dst1[3] = src_r0[2];
13168 dst2[0] = src_r0[3];
13169 dst2[1] = src_r1[0];
13170 dst2[2] = src_r1[1];
13171 dst2[3] = src_r1[2];
13172 break;
13173
13174 case 21:
13175 dst1[1] = src_l1[1] | src_r0[0] << 8;
13176 dst1[2] = src_r0[0] >> 24 | src_r0[1] << 8;
13177 dst1[3] = src_r0[1] >> 24 | src_r0[2] << 8;
13178 dst2[0] = src_r0[2] >> 24 | src_r0[3] << 8;
13179 dst2[1] = src_r0[3] >> 24 | src_r1[0] << 8;
13180 dst2[2] = src_r1[0] >> 24 | src_r1[1] << 8;
13181 dst2[3] = src_r1[1] >> 24 | src_r1[2] << 8;
13182 break;
13183
13184 case 22:
13185 dst1[1] = src_l1[1] | src_r0[0] << 16;
13186 dst1[2] = src_r0[0] >> 16 | src_r0[1] << 16;
13187 dst1[3] = src_r0[1] >> 16 | src_r0[2] << 16;
13188 dst2[0] = src_r0[2] >> 16 | src_r0[3] << 16;
13189 dst2[1] = src_r0[3] >> 16 | src_r1[0] << 16;
13190 dst2[2] = src_r1[0] >> 16 | src_r1[1] << 16;
13191 dst2[3] = src_r1[1] >> 16 | src_r1[2] << 16;
13192 break;
13193
13194 case 23:
13195 dst1[1] = src_l1[1] | src_r0[0] << 24;
13196 dst1[2] = src_r0[0] >> 8 | src_r0[1] << 24;
13197 dst1[3] = src_r0[1] >> 8 | src_r0[2] << 24;
13198 dst2[0] = src_r0[2] >> 8 | src_r0[3] << 24;
13199 dst2[1] = src_r0[3] >> 8 | src_r1[0] << 24;
13200 dst2[2] = src_r1[0] >> 8 | src_r1[1] << 24;
13201 dst2[3] = src_r1[1] >> 8 | src_r1[2] << 24;
13202 break;
13203
13204 case 24:
13205 dst1[2] = src_r1[0];
13206 dst1[3] = src_r0[1];
13207 dst2[0] = src_r0[2];
13208 dst2[1] = src_r0[3];
13209 dst2[2] = src_r1[0];
13210 dst2[3] = src_r1[1];
13211 break;
13212
13213 case 25:
13214 dst1[2] = src_l1[2] | src_r0[0] << 8;
13215 dst1[3] = src_r0[0] >> 24 | src_r0[1] << 8;
13216 dst2[0] = src_r0[1] >> 24 | src_r0[2] << 8;
13217 dst2[1] = src_r0[2] >> 24 | src_r0[3] << 8;
13218 dst2[2] = src_r0[3] >> 24 | src_r1[0] << 8;
13219 dst2[3] = src_r1[0] >> 24 | src_r1[1] << 8;
13220 break;
13221
13222 case 26:
13223 dst1[2] = src_l1[2] | src_r0[0] << 16;
13224 dst1[3] = src_r0[0] >> 16 | src_r0[1] << 16;
13225 dst2[0] = src_r0[1] >> 16 | src_r0[2] << 16;
13226 dst2[1] = src_r0[2] >> 16 | src_r0[3] << 16;
13227 dst2[2] = src_r0[3] >> 16 | src_r1[0] << 16;
13228 dst2[3] = src_r1[0] >> 16 | src_r1[1] << 16;
13229 break;
13230
13231 case 27:
13232 dst1[2] = src_l1[2] | src_r0[0] << 24;
13233 dst1[3] = src_r0[0] >> 8 | src_r0[1] << 24;
13234 dst2[0] = src_r0[1] >> 8 | src_r0[2] << 24;
13235 dst2[1] = src_r0[2] >> 8 | src_r0[3] << 24;
13236 dst2[2] = src_r0[3] >> 8 | src_r1[0] << 24;
13237 dst2[3] = src_r1[0] >> 8 | src_r1[1] << 24;
13238 break;
13239
13240 case 28:
13241 dst1[3] = src_r1[0];
13242 dst2[0] = src_r0[1];
13243 dst2[1] = src_r0[2];
13244 dst2[2] = src_r0[3];
13245 dst2[3] = src_r1[0];
13246 break;
13247
13248 case 29:
13249 dst1[3] = src_l1[3] | src_r0[0] << 8;
13250 dst2[0] = src_r0[0] >> 24 | src_r0[1] << 8;
13251 dst2[1] = src_r0[1] >> 24 | src_r0[2] << 8;
13252 dst2[2] = src_r0[2] >> 24 | src_r0[3] << 8;
13253 dst2[3] = src_r0[3] >> 24 | src_r1[0] << 8;
13254 break;
13255
13256 case 30:
13257 dst1[3] = src_l1[3] | src_r0[0] << 16;
13258 dst2[0] = src_r0[0] >> 16 | src_r0[1] << 16;
13259 dst2[1] = src_r0[1] >> 16 | src_r0[2] << 16;
13260 dst2[2] = src_r0[2] >> 16 | src_r0[3] << 16;
13261 dst2[3] = src_r0[3] >> 16 | src_r1[0] << 16;
13262 break;
13263
13264 case 31:
13265 dst1[3] = src_l1[3] | src_r0[0] << 24;
13266 dst2[0] = src_r0[0] >> 8 | src_r0[1] << 24;
13267 dst2[1] = src_r0[1] >> 8 | src_r0[2] << 24;
13268 dst2[2] = src_r0[2] >> 8 | src_r0[3] << 24;
13269 dst2[3] = src_r0[3] >> 8 | src_r1[0] << 24;
13270 break;
13271
13272 case 32:
13273 dst2[0] = src_r0[0];
13274 dst2[1] = src_r0[1];
13275 dst2[2] = src_r0[2];
13276 dst2[3] = src_r0[3];
13277 break;
13278
13279 case 33:
13280 dst2[0] = src_l2[0] | src_r0[0] << 8;
13281 dst2[1] = src_r0[0] >> 24 | src_r0[1] << 8;
13282 dst2[2] = src_r0[1] >> 24 | src_r0[2] << 8;
13283 dst2[3] = src_r0[2] >> 24 | src_r0[3] << 8;
13284 break;
13285
13286 case 34:
13287 dst2[0] = src_l2[0] | src_r0[0] << 16;
13288 dst2[1] = src_r0[0] >> 16 | src_r0[1] << 16;
13289 dst2[2] = src_r0[1] >> 16 | src_r0[2] << 16;
13290 dst2[3] = src_r0[2] >> 16 | src_r0[3] << 16;
13291 break;
13292
13293 case 35:
13294 dst2[0] = src_l2[0] | src_r0[0] << 24;
13295 dst2[1] = src_r0[0] >> 8 | src_r0[1] << 24;
13296 dst2[2] = src_r0[1] >> 8 | src_r0[2] << 24;
13297 dst2[3] = src_r0[2] >> 8 | src_r0[3] << 24;
13298 break;
13299
13300 case 36:
13301 dst2[1] = src_r0[0];
13302 dst2[2] = src_r0[1];
13303 dst2[3] = src_r0[2];
13304 break;
13305
13306 case 37:
13307 dst2[1] = src_l2[1] | src_r0[0] << 8;
13308 dst2[2] = src_r0[0] >> 24 | src_r0[1] << 8;
13309 dst2[3] = src_r0[1] >> 24 | src_r0[2] << 8;
13310 break;
13311
13312 case 38:
13313 dst2[1] = src_l2[1] | src_r0[0] << 16;
13314 dst2[2] = src_r0[0] >> 16 | src_r0[1] << 16;
13315 dst2[3] = src_r0[1] >> 16 | src_r0[2] << 16;
13316 break;
13317
13318 case 39:
13319 dst2[1] = src_l2[1] | src_r0[0] << 24;
13320 dst2[2] = src_r0[0] >> 8 | src_r0[1] << 24;
13321 dst2[3] = src_r0[1] >> 8 | src_r0[2] << 24;
13322 break;
13323
13324 case 40:
13325 dst2[2] = src_r0[0];
13326 dst2[3] = src_r0[1];
13327 break;
13328
13329 case 41:
13330 dst2[2] = src_l2[2] | src_r0[0] << 8;
13331 dst2[3] = src_r0[0] >> 24 | src_r0[1] << 8;
13332 break;
13333
13334 case 42:
13335 dst2[2] = src_l2[2] | src_r0[0] << 16;
13336 dst2[3] = src_r0[0] >> 16 | src_r0[1] << 16;
13337 break;
13338
13339 case 43:
13340 dst2[2] = src_l2[2] | src_r0[0] << 24;
13341 dst2[3] = src_r0[0] >> 8 | src_r0[1] << 24;
13342 break;
13343
13344 case 44:
13345 dst2[3] = src_r0[0];
13346 break;
13347
13348 case 45:
13349 dst2[3] = src_l2[3] | src_r0[0] << 8;
13350 break;
13351
13352 case 46:
13353 dst2[3] = src_l2[3] | src_r0[0] << 16;
13354 break;
13355
13356 case 47:
13357 dst2[3] = src_l2[3] | src_r0[0] << 24;
13358 break;
13359 }
13360 }
13361
13362 static void memcat16_9 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 append0[4], const u32 append1[4], const u32 append2[4], const u32 offset)
13363 {
13364 switch (offset)
13365 {
13366 case 0:
13367 w0[0] = append0[0];
13368 w0[1] = append0[1];
13369 w0[2] = append0[2];
13370 w0[3] = append0[3];
13371 w1[0] = append1[0];
13372 w1[1] = append1[1];
13373 w1[2] = append1[2];
13374 w1[3] = append1[3];
13375 w2[0] = append2[0];
13376 break;
13377
13378 case 1:
13379 w0[0] = w0[0] | append0[0] << 8;
13380 w0[1] = append0[0] >> 24 | append0[1] << 8;
13381 w0[2] = append0[1] >> 24 | append0[2] << 8;
13382 w0[3] = append0[2] >> 24 | append0[3] << 8;
13383 w1[0] = append0[3] >> 24 | append1[0] << 8;
13384 w1[1] = append1[0] >> 24 | append1[1] << 8;
13385 w1[2] = append1[1] >> 24 | append1[2] << 8;
13386 w1[3] = append1[2] >> 24 | append1[3] << 8;
13387 w2[0] = append1[3] >> 24 | append2[0] << 8;
13388 w2[1] = append2[0] >> 24;
13389 break;
13390
13391 case 2:
13392 w0[0] = w0[0] | append0[0] << 16;
13393 w0[1] = append0[0] >> 16 | append0[1] << 16;
13394 w0[2] = append0[1] >> 16 | append0[2] << 16;
13395 w0[3] = append0[2] >> 16 | append0[3] << 16;
13396 w1[0] = append0[3] >> 16 | append1[0] << 16;
13397 w1[1] = append1[0] >> 16 | append1[1] << 16;
13398 w1[2] = append1[1] >> 16 | append1[2] << 16;
13399 w1[3] = append1[2] >> 16 | append1[3] << 16;
13400 w2[0] = append1[3] >> 16 | append2[0] << 16;
13401 w2[1] = append2[0] >> 16;
13402 break;
13403
13404 case 3:
13405 w0[0] = w0[0] | append0[0] << 24;
13406 w0[1] = append0[0] >> 8 | append0[1] << 24;
13407 w0[2] = append0[1] >> 8 | append0[2] << 24;
13408 w0[3] = append0[2] >> 8 | append0[3] << 24;
13409 w1[0] = append0[3] >> 8 | append1[0] << 24;
13410 w1[1] = append1[0] >> 8 | append1[1] << 24;
13411 w1[2] = append1[1] >> 8 | append1[2] << 24;
13412 w1[3] = append1[2] >> 8 | append1[3] << 24;
13413 w2[0] = append1[3] >> 8 | append2[0] << 24;
13414 w2[1] = append2[0] >> 8;
13415 break;
13416
13417 case 4:
13418 w0[1] = append0[0];
13419 w0[2] = append0[1];
13420 w0[3] = append0[2];
13421 w1[0] = append0[3];
13422 w1[1] = append1[0];
13423 w1[2] = append1[1];
13424 w1[3] = append1[2];
13425 w2[0] = append1[3];
13426 w2[1] = append2[0];
13427 break;
13428
13429 case 5:
13430 w0[1] = w0[1] | append0[0] << 8;
13431 w0[2] = append0[0] >> 24 | append0[1] << 8;
13432 w0[3] = append0[1] >> 24 | append0[2] << 8;
13433 w1[0] = append0[2] >> 24 | append0[3] << 8;
13434 w1[1] = append0[3] >> 24 | append1[0] << 8;
13435 w1[2] = append1[0] >> 24 | append1[1] << 8;
13436 w1[3] = append1[1] >> 24 | append1[2] << 8;
13437 w2[0] = append1[2] >> 24 | append1[3] << 8;
13438 w2[1] = append1[3] >> 24 | append2[0] << 8;
13439 w2[2] = append2[0] >> 24;
13440 break;
13441
13442 case 6:
13443 w0[1] = w0[1] | append0[0] << 16;
13444 w0[2] = append0[0] >> 16 | append0[1] << 16;
13445 w0[3] = append0[1] >> 16 | append0[2] << 16;
13446 w1[0] = append0[2] >> 16 | append0[3] << 16;
13447 w1[1] = append0[3] >> 16 | append1[0] << 16;
13448 w1[2] = append1[0] >> 16 | append1[1] << 16;
13449 w1[3] = append1[1] >> 16 | append1[2] << 16;
13450 w2[0] = append1[2] >> 16 | append1[3] << 16;
13451 w2[1] = append1[3] >> 16 | append2[0] << 16;
13452 w2[2] = append2[0] >> 16;
13453 break;
13454
13455 case 7:
13456 w0[1] = w0[1] | append0[0] << 24;
13457 w0[2] = append0[0] >> 8 | append0[1] << 24;
13458 w0[3] = append0[1] >> 8 | append0[2] << 24;
13459 w1[0] = append0[2] >> 8 | append0[3] << 24;
13460 w1[1] = append0[3] >> 8 | append1[0] << 24;
13461 w1[2] = append1[0] >> 8 | append1[1] << 24;
13462 w1[3] = append1[1] >> 8 | append1[2] << 24;
13463 w2[0] = append1[2] >> 8 | append1[3] << 24;
13464 w2[1] = append1[3] >> 8 | append2[0] << 24;
13465 w2[2] = append2[0] >> 8;
13466 break;
13467
13468 case 8:
13469 w0[2] = append0[0];
13470 w0[3] = append0[1];
13471 w1[0] = append0[2];
13472 w1[1] = append0[3];
13473 w1[2] = append1[0];
13474 w1[3] = append1[1];
13475 w2[0] = append1[2];
13476 w2[1] = append1[3];
13477 w2[2] = append2[0];
13478 break;
13479
13480 case 9:
13481 w0[2] = w0[2] | append0[0] << 8;
13482 w0[3] = append0[0] >> 24 | append0[1] << 8;
13483 w1[0] = append0[1] >> 24 | append0[2] << 8;
13484 w1[1] = append0[2] >> 24 | append0[3] << 8;
13485 w1[2] = append0[3] >> 24 | append1[0] << 8;
13486 w1[3] = append1[0] >> 24 | append1[1] << 8;
13487 w2[0] = append1[1] >> 24 | append1[2] << 8;
13488 w2[1] = append1[2] >> 24 | append1[3] << 8;
13489 w2[2] = append1[3] >> 24 | append2[0] << 8;
13490 w2[3] = append2[0] >> 24;
13491 break;
13492
13493 case 10:
13494 w0[2] = w0[2] | append0[0] << 16;
13495 w0[3] = append0[0] >> 16 | append0[1] << 16;
13496 w1[0] = append0[1] >> 16 | append0[2] << 16;
13497 w1[1] = append0[2] >> 16 | append0[3] << 16;
13498 w1[2] = append0[3] >> 16 | append1[0] << 16;
13499 w1[3] = append1[0] >> 16 | append1[1] << 16;
13500 w2[0] = append1[1] >> 16 | append1[2] << 16;
13501 w2[1] = append1[2] >> 16 | append1[3] << 16;
13502 w2[2] = append1[3] >> 16 | append2[0] << 16;
13503 w2[3] = append2[0] >> 16;
13504 break;
13505
13506 case 11:
13507 w0[2] = w0[2] | append0[0] << 24;
13508 w0[3] = append0[0] >> 8 | append0[1] << 24;
13509 w1[0] = append0[1] >> 8 | append0[2] << 24;
13510 w1[1] = append0[2] >> 8 | append0[3] << 24;
13511 w1[2] = append0[3] >> 8 | append1[0] << 24;
13512 w1[3] = append1[0] >> 8 | append1[1] << 24;
13513 w2[0] = append1[1] >> 8 | append1[2] << 24;
13514 w2[1] = append1[2] >> 8 | append1[3] << 24;
13515 w2[2] = append1[3] >> 8 | append2[0] << 24;
13516 w2[3] = append2[0] >> 8;
13517 break;
13518
13519 case 12:
13520 w0[3] = append0[0];
13521 w1[0] = append0[1];
13522 w1[1] = append0[2];
13523 w1[2] = append0[3];
13524 w1[3] = append1[0];
13525 w2[0] = append1[1];
13526 w2[1] = append1[2];
13527 w2[2] = append1[3];
13528 w2[3] = append2[0];
13529 break;
13530
13531 case 13:
13532 w0[3] = w0[3] | append0[0] << 8;
13533 w1[0] = append0[0] >> 24 | append0[1] << 8;
13534 w1[1] = append0[1] >> 24 | append0[2] << 8;
13535 w1[2] = append0[2] >> 24 | append0[3] << 8;
13536 w1[3] = append0[3] >> 24 | append1[0] << 8;
13537 w2[0] = append1[0] >> 24 | append1[1] << 8;
13538 w2[1] = append1[1] >> 24 | append1[2] << 8;
13539 w2[2] = append1[2] >> 24 | append1[3] << 8;
13540 w2[3] = append1[3] >> 24 | append2[0] << 8;
13541 w3[0] = append2[0] >> 24;
13542 break;
13543
13544 case 14:
13545 w0[3] = w0[3] | append0[0] << 16;
13546 w1[0] = append0[0] >> 16 | append0[1] << 16;
13547 w1[1] = append0[1] >> 16 | append0[2] << 16;
13548 w1[2] = append0[2] >> 16 | append0[3] << 16;
13549 w1[3] = append0[3] >> 16 | append1[0] << 16;
13550 w2[0] = append1[0] >> 16 | append1[1] << 16;
13551 w2[1] = append1[1] >> 16 | append1[2] << 16;
13552 w2[2] = append1[2] >> 16 | append1[3] << 16;
13553 w2[3] = append1[3] >> 16 | append2[0] << 16;
13554 w3[0] = append2[0] >> 16;
13555 break;
13556
13557 case 15:
13558 w0[3] = w0[3] | append0[0] << 24;
13559 w1[0] = append0[0] >> 8 | append0[1] << 24;
13560 w1[1] = append0[1] >> 8 | append0[2] << 24;
13561 w1[2] = append0[2] >> 8 | append0[3] << 24;
13562 w1[3] = append0[3] >> 8 | append1[0] << 24;
13563 w2[0] = append1[0] >> 8 | append1[1] << 24;
13564 w2[1] = append1[1] >> 8 | append1[2] << 24;
13565 w2[2] = append1[2] >> 8 | append1[3] << 24;
13566 w2[3] = append1[3] >> 8 | append2[0] << 24;
13567 w3[0] = append2[0] >> 8;
13568 break;
13569 }
13570 }
13571
13572 static void memcat16_9 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32x append0[4], const u32x append1[4], const u32x append2[4], const u32 offset)
13573 {
13574 switch (offset)
13575 {
13576 case 0:
13577 w0[0] = append0[0];
13578 w0[1] = append0[1];
13579 w0[2] = append0[2];
13580 w0[3] = append0[3];
13581 w1[0] = append1[0];
13582 w1[1] = append1[1];
13583 w1[2] = append1[2];
13584 w1[3] = append1[3];
13585 w2[0] = append2[0];
13586 break;
13587
13588 case 1:
13589 w0[0] = w0[0] | append0[0] << 8;
13590 w0[1] = append0[0] >> 24 | append0[1] << 8;
13591 w0[2] = append0[1] >> 24 | append0[2] << 8;
13592 w0[3] = append0[2] >> 24 | append0[3] << 8;
13593 w1[0] = append0[3] >> 24 | append1[0] << 8;
13594 w1[1] = append1[0] >> 24 | append1[1] << 8;
13595 w1[2] = append1[1] >> 24 | append1[2] << 8;
13596 w1[3] = append1[2] >> 24 | append1[3] << 8;
13597 w2[0] = append1[3] >> 24 | append2[0] << 8;
13598 w2[1] = append2[0] >> 24;
13599 break;
13600
13601 case 2:
13602 w0[0] = w0[0] | append0[0] << 16;
13603 w0[1] = append0[0] >> 16 | append0[1] << 16;
13604 w0[2] = append0[1] >> 16 | append0[2] << 16;
13605 w0[3] = append0[2] >> 16 | append0[3] << 16;
13606 w1[0] = append0[3] >> 16 | append1[0] << 16;
13607 w1[1] = append1[0] >> 16 | append1[1] << 16;
13608 w1[2] = append1[1] >> 16 | append1[2] << 16;
13609 w1[3] = append1[2] >> 16 | append1[3] << 16;
13610 w2[0] = append1[3] >> 16 | append2[0] << 16;
13611 w2[1] = append2[0] >> 16;
13612 break;
13613
13614 case 3:
13615 w0[0] = w0[0] | append0[0] << 24;
13616 w0[1] = append0[0] >> 8 | append0[1] << 24;
13617 w0[2] = append0[1] >> 8 | append0[2] << 24;
13618 w0[3] = append0[2] >> 8 | append0[3] << 24;
13619 w1[0] = append0[3] >> 8 | append1[0] << 24;
13620 w1[1] = append1[0] >> 8 | append1[1] << 24;
13621 w1[2] = append1[1] >> 8 | append1[2] << 24;
13622 w1[3] = append1[2] >> 8 | append1[3] << 24;
13623 w2[0] = append1[3] >> 8 | append2[0] << 24;
13624 w2[1] = append2[0] >> 8;
13625 break;
13626
13627 case 4:
13628 w0[1] = append0[0];
13629 w0[2] = append0[1];
13630 w0[3] = append0[2];
13631 w1[0] = append0[3];
13632 w1[1] = append1[0];
13633 w1[2] = append1[1];
13634 w1[3] = append1[2];
13635 w2[0] = append1[3];
13636 w2[1] = append2[0];
13637 break;
13638
13639 case 5:
13640 w0[1] = w0[1] | append0[0] << 8;
13641 w0[2] = append0[0] >> 24 | append0[1] << 8;
13642 w0[3] = append0[1] >> 24 | append0[2] << 8;
13643 w1[0] = append0[2] >> 24 | append0[3] << 8;
13644 w1[1] = append0[3] >> 24 | append1[0] << 8;
13645 w1[2] = append1[0] >> 24 | append1[1] << 8;
13646 w1[3] = append1[1] >> 24 | append1[2] << 8;
13647 w2[0] = append1[2] >> 24 | append1[3] << 8;
13648 w2[1] = append1[3] >> 24 | append2[0] << 8;
13649 w2[2] = append2[0] >> 24;
13650 break;
13651
13652 case 6:
13653 w0[1] = w0[1] | append0[0] << 16;
13654 w0[2] = append0[0] >> 16 | append0[1] << 16;
13655 w0[3] = append0[1] >> 16 | append0[2] << 16;
13656 w1[0] = append0[2] >> 16 | append0[3] << 16;
13657 w1[1] = append0[3] >> 16 | append1[0] << 16;
13658 w1[2] = append1[0] >> 16 | append1[1] << 16;
13659 w1[3] = append1[1] >> 16 | append1[2] << 16;
13660 w2[0] = append1[2] >> 16 | append1[3] << 16;
13661 w2[1] = append1[3] >> 16 | append2[0] << 16;
13662 w2[2] = append2[0] >> 16;
13663 break;
13664
13665 case 7:
13666 w0[1] = w0[1] | append0[0] << 24;
13667 w0[2] = append0[0] >> 8 | append0[1] << 24;
13668 w0[3] = append0[1] >> 8 | append0[2] << 24;
13669 w1[0] = append0[2] >> 8 | append0[3] << 24;
13670 w1[1] = append0[3] >> 8 | append1[0] << 24;
13671 w1[2] = append1[0] >> 8 | append1[1] << 24;
13672 w1[3] = append1[1] >> 8 | append1[2] << 24;
13673 w2[0] = append1[2] >> 8 | append1[3] << 24;
13674 w2[1] = append1[3] >> 8 | append2[0] << 24;
13675 w2[2] = append2[0] >> 8;
13676 break;
13677
13678 case 8:
13679 w0[2] = append0[0];
13680 w0[3] = append0[1];
13681 w1[0] = append0[2];
13682 w1[1] = append0[3];
13683 w1[2] = append1[0];
13684 w1[3] = append1[1];
13685 w2[0] = append1[2];
13686 w2[1] = append1[3];
13687 w2[2] = append2[0];
13688 break;
13689
13690 case 9:
13691 w0[2] = w0[2] | append0[0] << 8;
13692 w0[3] = append0[0] >> 24 | append0[1] << 8;
13693 w1[0] = append0[1] >> 24 | append0[2] << 8;
13694 w1[1] = append0[2] >> 24 | append0[3] << 8;
13695 w1[2] = append0[3] >> 24 | append1[0] << 8;
13696 w1[3] = append1[0] >> 24 | append1[1] << 8;
13697 w2[0] = append1[1] >> 24 | append1[2] << 8;
13698 w2[1] = append1[2] >> 24 | append1[3] << 8;
13699 w2[2] = append1[3] >> 24 | append2[0] << 8;
13700 w2[3] = append2[0] >> 24;
13701 break;
13702
13703 case 10:
13704 w0[2] = w0[2] | append0[0] << 16;
13705 w0[3] = append0[0] >> 16 | append0[1] << 16;
13706 w1[0] = append0[1] >> 16 | append0[2] << 16;
13707 w1[1] = append0[2] >> 16 | append0[3] << 16;
13708 w1[2] = append0[3] >> 16 | append1[0] << 16;
13709 w1[3] = append1[0] >> 16 | append1[1] << 16;
13710 w2[0] = append1[1] >> 16 | append1[2] << 16;
13711 w2[1] = append1[2] >> 16 | append1[3] << 16;
13712 w2[2] = append1[3] >> 16 | append2[0] << 16;
13713 w2[3] = append2[0] >> 16;
13714 break;
13715
13716 case 11:
13717 w0[2] = w0[2] | append0[0] << 24;
13718 w0[3] = append0[0] >> 8 | append0[1] << 24;
13719 w1[0] = append0[1] >> 8 | append0[2] << 24;
13720 w1[1] = append0[2] >> 8 | append0[3] << 24;
13721 w1[2] = append0[3] >> 8 | append1[0] << 24;
13722 w1[3] = append1[0] >> 8 | append1[1] << 24;
13723 w2[0] = append1[1] >> 8 | append1[2] << 24;
13724 w2[1] = append1[2] >> 8 | append1[3] << 24;
13725 w2[2] = append1[3] >> 8 | append2[0] << 24;
13726 w2[3] = append2[0] >> 8;
13727 break;
13728
13729 case 12:
13730 w0[3] = append0[0];
13731 w1[0] = append0[1];
13732 w1[1] = append0[2];
13733 w1[2] = append0[3];
13734 w1[3] = append1[0];
13735 w2[0] = append1[1];
13736 w2[1] = append1[2];
13737 w2[2] = append1[3];
13738 w2[3] = append2[0];
13739 break;
13740
13741 case 13:
13742 w0[3] = w0[3] | append0[0] << 8;
13743 w1[0] = append0[0] >> 24 | append0[1] << 8;
13744 w1[1] = append0[1] >> 24 | append0[2] << 8;
13745 w1[2] = append0[2] >> 24 | append0[3] << 8;
13746 w1[3] = append0[3] >> 24 | append1[0] << 8;
13747 w2[0] = append1[0] >> 24 | append1[1] << 8;
13748 w2[1] = append1[1] >> 24 | append1[2] << 8;
13749 w2[2] = append1[2] >> 24 | append1[3] << 8;
13750 w2[3] = append1[3] >> 24 | append2[0] << 8;
13751 w3[0] = append2[0] >> 24;
13752 break;
13753
13754 case 14:
13755 w0[3] = w0[3] | append0[0] << 16;
13756 w1[0] = append0[0] >> 16 | append0[1] << 16;
13757 w1[1] = append0[1] >> 16 | append0[2] << 16;
13758 w1[2] = append0[2] >> 16 | append0[3] << 16;
13759 w1[3] = append0[3] >> 16 | append1[0] << 16;
13760 w2[0] = append1[0] >> 16 | append1[1] << 16;
13761 w2[1] = append1[1] >> 16 | append1[2] << 16;
13762 w2[2] = append1[2] >> 16 | append1[3] << 16;
13763 w2[3] = append1[3] >> 16 | append2[0] << 16;
13764 w3[0] = append2[0] >> 16;
13765 break;
13766
13767 case 15:
13768 w0[3] = w0[3] | append0[0] << 24;
13769 w1[0] = append0[0] >> 8 | append0[1] << 24;
13770 w1[1] = append0[1] >> 8 | append0[2] << 24;
13771 w1[2] = append0[2] >> 8 | append0[3] << 24;
13772 w1[3] = append0[3] >> 8 | append1[0] << 24;
13773 w2[0] = append1[0] >> 8 | append1[1] << 24;
13774 w2[1] = append1[1] >> 8 | append1[2] << 24;
13775 w2[2] = append1[2] >> 8 | append1[3] << 24;
13776 w2[3] = append1[3] >> 8 | append2[0] << 24;
13777 w3[0] = append2[0] >> 8;
13778 break;
13779 }
13780 }
13781
13782 static void memcat32_8 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 append0[4], const u32 append1[4], const u32 offset)
13783 {
13784 switch (offset)
13785 {
13786 case 0:
13787 w0[0] = append0[0];
13788 w0[1] = append0[1];
13789 w0[2] = append0[2];
13790 w0[3] = append0[3];
13791 w1[0] = append1[0];
13792 w1[1] = append1[1];
13793 w1[2] = append1[2];
13794 w1[3] = append1[3];
13795 break;
13796
13797 case 1:
13798 w0[0] = w0[0] | append0[0] << 8;
13799 w0[1] = append0[0] >> 24 | append0[1] << 8;
13800 w0[2] = append0[1] >> 24 | append0[2] << 8;
13801 w0[3] = append0[2] >> 24 | append0[3] << 8;
13802 w1[0] = append0[3] >> 24 | append1[0] << 8;
13803 w1[1] = append1[0] >> 24 | append1[1] << 8;
13804 w1[2] = append1[1] >> 24 | append1[2] << 8;
13805 w1[3] = append1[2] >> 24 | append1[3] << 8;
13806 w2[0] = append1[3] >> 24;
13807 break;
13808
13809 case 2:
13810 w0[0] = w0[0] | append0[0] << 16;
13811 w0[1] = append0[0] >> 16 | append0[1] << 16;
13812 w0[2] = append0[1] >> 16 | append0[2] << 16;
13813 w0[3] = append0[2] >> 16 | append0[3] << 16;
13814 w1[0] = append0[3] >> 16 | append1[0] << 16;
13815 w1[1] = append1[0] >> 16 | append1[1] << 16;
13816 w1[2] = append1[1] >> 16 | append1[2] << 16;
13817 w1[3] = append1[2] >> 16 | append1[3] << 16;
13818 w2[0] = append1[3] >> 16;
13819 break;
13820
13821 case 3:
13822 w0[0] = w0[0] | append0[0] << 24;
13823 w0[1] = append0[0] >> 8 | append0[1] << 24;
13824 w0[2] = append0[1] >> 8 | append0[2] << 24;
13825 w0[3] = append0[2] >> 8 | append0[3] << 24;
13826 w1[0] = append0[3] >> 8 | append1[0] << 24;
13827 w1[1] = append1[0] >> 8 | append1[1] << 24;
13828 w1[2] = append1[1] >> 8 | append1[2] << 24;
13829 w1[3] = append1[2] >> 8 | append1[3] << 24;
13830 w2[0] = append1[3] >> 8;
13831 break;
13832
13833 case 4:
13834 w0[1] = append0[0];
13835 w0[2] = append0[1];
13836 w0[3] = append0[2];
13837 w1[0] = append0[3];
13838 w1[1] = append1[0];
13839 w1[2] = append1[1];
13840 w1[3] = append1[2];
13841 w2[0] = append1[3];
13842 break;
13843
13844 case 5:
13845 w0[1] = w0[1] | append0[0] << 8;
13846 w0[2] = append0[0] >> 24 | append0[1] << 8;
13847 w0[3] = append0[1] >> 24 | append0[2] << 8;
13848 w1[0] = append0[2] >> 24 | append0[3] << 8;
13849 w1[1] = append0[3] >> 24 | append1[0] << 8;
13850 w1[2] = append1[0] >> 24 | append1[1] << 8;
13851 w1[3] = append1[1] >> 24 | append1[2] << 8;
13852 w2[0] = append1[2] >> 24 | append1[3] << 8;
13853 w2[1] = append1[3] >> 24;
13854 break;
13855
13856 case 6:
13857 w0[1] = w0[1] | append0[0] << 16;
13858 w0[2] = append0[0] >> 16 | append0[1] << 16;
13859 w0[3] = append0[1] >> 16 | append0[2] << 16;
13860 w1[0] = append0[2] >> 16 | append0[3] << 16;
13861 w1[1] = append0[3] >> 16 | append1[0] << 16;
13862 w1[2] = append1[0] >> 16 | append1[1] << 16;
13863 w1[3] = append1[1] >> 16 | append1[2] << 16;
13864 w2[0] = append1[2] >> 16 | append1[3] << 16;
13865 w2[1] = append1[3] >> 16;
13866 break;
13867
13868 case 7:
13869 w0[1] = w0[1] | append0[0] << 24;
13870 w0[2] = append0[0] >> 8 | append0[1] << 24;
13871 w0[3] = append0[1] >> 8 | append0[2] << 24;
13872 w1[0] = append0[2] >> 8 | append0[3] << 24;
13873 w1[1] = append0[3] >> 8 | append1[0] << 24;
13874 w1[2] = append1[0] >> 8 | append1[1] << 24;
13875 w1[3] = append1[1] >> 8 | append1[2] << 24;
13876 w2[0] = append1[2] >> 8 | append1[3] << 24;
13877 w2[1] = append1[3] >> 8;
13878 break;
13879
13880 case 8:
13881 w0[2] = append0[0];
13882 w0[3] = append0[1];
13883 w1[0] = append0[2];
13884 w1[1] = append0[3];
13885 w1[2] = append1[0];
13886 w1[3] = append1[1];
13887 w2[0] = append1[2];
13888 w2[1] = append1[3];
13889 break;
13890
13891 case 9:
13892 w0[2] = w0[2] | append0[0] << 8;
13893 w0[3] = append0[0] >> 24 | append0[1] << 8;
13894 w1[0] = append0[1] >> 24 | append0[2] << 8;
13895 w1[1] = append0[2] >> 24 | append0[3] << 8;
13896 w1[2] = append0[3] >> 24 | append1[0] << 8;
13897 w1[3] = append1[0] >> 24 | append1[1] << 8;
13898 w2[0] = append1[1] >> 24 | append1[2] << 8;
13899 w2[1] = append1[2] >> 24 | append1[3] << 8;
13900 w2[2] = append1[3] >> 24;
13901 break;
13902
13903 case 10:
13904 w0[2] = w0[2] | append0[0] << 16;
13905 w0[3] = append0[0] >> 16 | append0[1] << 16;
13906 w1[0] = append0[1] >> 16 | append0[2] << 16;
13907 w1[1] = append0[2] >> 16 | append0[3] << 16;
13908 w1[2] = append0[3] >> 16 | append1[0] << 16;
13909 w1[3] = append1[0] >> 16 | append1[1] << 16;
13910 w2[0] = append1[1] >> 16 | append1[2] << 16;
13911 w2[1] = append1[2] >> 16 | append1[3] << 16;
13912 w2[2] = append1[3] >> 16;
13913 break;
13914
13915 case 11:
13916 w0[2] = w0[2] | append0[0] << 24;
13917 w0[3] = append0[0] >> 8 | append0[1] << 24;
13918 w1[0] = append0[1] >> 8 | append0[2] << 24;
13919 w1[1] = append0[2] >> 8 | append0[3] << 24;
13920 w1[2] = append0[3] >> 8 | append1[0] << 24;
13921 w1[3] = append1[0] >> 8 | append1[1] << 24;
13922 w2[0] = append1[1] >> 8 | append1[2] << 24;
13923 w2[1] = append1[2] >> 8 | append1[3] << 24;
13924 w2[2] = append1[3] >> 8;
13925 break;
13926
13927 case 12:
13928 w0[3] = append0[0];
13929 w1[0] = append0[1];
13930 w1[1] = append0[2];
13931 w1[2] = append0[3];
13932 w1[3] = append1[0];
13933 w2[0] = append1[1];
13934 w2[1] = append1[2];
13935 w2[2] = append1[3];
13936 break;
13937
13938 case 13:
13939 w0[3] = w0[3] | append0[0] << 8;
13940 w1[0] = append0[0] >> 24 | append0[1] << 8;
13941 w1[1] = append0[1] >> 24 | append0[2] << 8;
13942 w1[2] = append0[2] >> 24 | append0[3] << 8;
13943 w1[3] = append0[3] >> 24 | append1[0] << 8;
13944 w2[0] = append1[0] >> 24 | append1[1] << 8;
13945 w2[1] = append1[1] >> 24 | append1[2] << 8;
13946 w2[2] = append1[2] >> 24 | append1[3] << 8;
13947 w2[3] = append1[3] >> 24;
13948 break;
13949
13950 case 14:
13951 w0[3] = w0[3] | append0[0] << 16;
13952 w1[0] = append0[0] >> 16 | append0[1] << 16;
13953 w1[1] = append0[1] >> 16 | append0[2] << 16;
13954 w1[2] = append0[2] >> 16 | append0[3] << 16;
13955 w1[3] = append0[3] >> 16 | append1[0] << 16;
13956 w2[0] = append1[0] >> 16 | append1[1] << 16;
13957 w2[1] = append1[1] >> 16 | append1[2] << 16;
13958 w2[2] = append1[2] >> 16 | append1[3] << 16;
13959 w2[3] = append1[3] >> 16;
13960 break;
13961
13962 case 15:
13963 w0[3] = w0[3] | append0[0] << 24;
13964 w1[0] = append0[0] >> 8 | append0[1] << 24;
13965 w1[1] = append0[1] >> 8 | append0[2] << 24;
13966 w1[2] = append0[2] >> 8 | append0[3] << 24;
13967 w1[3] = append0[3] >> 8 | append1[0] << 24;
13968 w2[0] = append1[0] >> 8 | append1[1] << 24;
13969 w2[1] = append1[1] >> 8 | append1[2] << 24;
13970 w2[2] = append1[2] >> 8 | append1[3] << 24;
13971 w2[3] = append1[3] >> 8;
13972 break;
13973
13974 case 16:
13975 w1[0] = append0[0];
13976 w1[1] = append0[1];
13977 w1[2] = append0[2];
13978 w1[3] = append0[3];
13979 w2[0] = append1[0];
13980 w2[1] = append1[1];
13981 w2[2] = append1[2];
13982 w2[3] = append1[3];
13983 break;
13984
13985 case 17:
13986 w1[0] = w1[0] | append0[0] << 8;
13987 w1[1] = append0[0] >> 24 | append0[1] << 8;
13988 w1[2] = append0[1] >> 24 | append0[2] << 8;
13989 w1[3] = append0[2] >> 24 | append0[3] << 8;
13990 w2[0] = append0[3] >> 24 | append1[0] << 8;
13991 w2[1] = append1[0] >> 24 | append1[1] << 8;
13992 w2[2] = append1[1] >> 24 | append1[2] << 8;
13993 w2[3] = append1[2] >> 24 | append1[3] << 8;
13994 w3[0] = append1[3] >> 24;
13995 break;
13996
13997 case 18:
13998 w1[0] = w1[0] | append0[0] << 16;
13999 w1[1] = append0[0] >> 16 | append0[1] << 16;
14000 w1[2] = append0[1] >> 16 | append0[2] << 16;
14001 w1[3] = append0[2] >> 16 | append0[3] << 16;
14002 w2[0] = append0[3] >> 16 | append1[0] << 16;
14003 w2[1] = append1[0] >> 16 | append1[1] << 16;
14004 w2[2] = append1[1] >> 16 | append1[2] << 16;
14005 w2[3] = append1[2] >> 16 | append1[3] << 16;
14006 w3[0] = append1[3] >> 16;
14007 break;
14008
14009 case 19:
14010 w1[0] = w1[0] | append0[0] << 24;
14011 w1[1] = append0[0] >> 8 | append0[1] << 24;
14012 w1[2] = append0[1] >> 8 | append0[2] << 24;
14013 w1[3] = append0[2] >> 8 | append0[3] << 24;
14014 w2[0] = append0[3] >> 8 | append1[0] << 24;
14015 w2[1] = append1[0] >> 8 | append1[1] << 24;
14016 w2[2] = append1[1] >> 8 | append1[2] << 24;
14017 w2[3] = append1[2] >> 8 | append1[3] << 24;
14018 w3[0] = append1[3] >> 8;
14019 break;
14020
14021 case 20:
14022 w1[1] = append0[0];
14023 w1[2] = append0[1];
14024 w1[3] = append0[2];
14025 w2[0] = append0[3];
14026 w2[1] = append1[0];
14027 w2[2] = append1[1];
14028 w2[3] = append1[2];
14029 w3[0] = append1[3];
14030 break;
14031
14032 case 21:
14033 w1[1] = w1[1] | append0[0] << 8;
14034 w1[2] = append0[0] >> 24 | append0[1] << 8;
14035 w1[3] = append0[1] >> 24 | append0[2] << 8;
14036 w2[0] = append0[2] >> 24 | append0[3] << 8;
14037 w2[1] = append0[3] >> 24 | append1[0] << 8;
14038 w2[2] = append1[0] >> 24 | append1[1] << 8;
14039 w2[3] = append1[1] >> 24 | append1[2] << 8;
14040 w3[0] = append1[2] >> 24 | append1[3] << 8;
14041 w3[1] = append1[3] >> 24;
14042 break;
14043
14044 case 22:
14045 w1[1] = w1[1] | append0[0] << 16;
14046 w1[2] = append0[0] >> 16 | append0[1] << 16;
14047 w1[3] = append0[1] >> 16 | append0[2] << 16;
14048 w2[0] = append0[2] >> 16 | append0[3] << 16;
14049 w2[1] = append0[3] >> 16 | append1[0] << 16;
14050 w2[2] = append1[0] >> 16 | append1[1] << 16;
14051 w2[3] = append1[1] >> 16 | append1[2] << 16;
14052 w3[0] = append1[2] >> 16 | append1[3] << 16;
14053 w3[1] = append1[3] >> 16;
14054 break;
14055
14056 case 23:
14057 w1[1] = w1[1] | append0[0] << 24;
14058 w1[2] = append0[0] >> 8 | append0[1] << 24;
14059 w1[3] = append0[1] >> 8 | append0[2] << 24;
14060 w2[0] = append0[2] >> 8 | append0[3] << 24;
14061 w2[1] = append0[3] >> 8 | append1[0] << 24;
14062 w2[2] = append1[0] >> 8 | append1[1] << 24;
14063 w2[3] = append1[1] >> 8 | append1[2] << 24;
14064 w3[0] = append1[2] >> 8 | append1[3] << 24;
14065 w3[1] = append1[3] >> 8;
14066 break;
14067
14068 case 24:
14069 w1[2] = append0[0];
14070 w1[3] = append0[1];
14071 w2[0] = append0[2];
14072 w2[1] = append0[3];
14073 w2[2] = append1[0];
14074 w2[3] = append1[1];
14075 w3[0] = append1[2];
14076 w3[1] = append1[3];
14077 break;
14078
14079 case 25:
14080 w1[2] = w1[2] | append0[0] << 8;
14081 w1[3] = append0[0] >> 24 | append0[1] << 8;
14082 w2[0] = append0[1] >> 24 | append0[2] << 8;
14083 w2[1] = append0[2] >> 24 | append0[3] << 8;
14084 w2[2] = append0[3] >> 24 | append1[0] << 8;
14085 w2[3] = append1[0] >> 24 | append1[1] << 8;
14086 w3[0] = append1[1] >> 24 | append1[2] << 8;
14087 w3[1] = append1[2] >> 24 | append1[3] << 8;
14088 break;
14089
14090 case 26:
14091 w1[2] = w1[2] | append0[0] << 16;
14092 w1[3] = append0[0] >> 16 | append0[1] << 16;
14093 w2[0] = append0[1] >> 16 | append0[2] << 16;
14094 w2[1] = append0[2] >> 16 | append0[3] << 16;
14095 w2[2] = append0[3] >> 16 | append1[0] << 16;
14096 w2[3] = append1[0] >> 16 | append1[1] << 16;
14097 w3[0] = append1[1] >> 16 | append1[2] << 16;
14098 w3[1] = append1[2] >> 16 | append1[3] << 16;
14099 break;
14100
14101 case 27:
14102 w1[2] = w1[2] | append0[0] << 24;
14103 w1[3] = append0[0] >> 8 | append0[1] << 24;
14104 w2[0] = append0[1] >> 8 | append0[2] << 24;
14105 w2[1] = append0[2] >> 8 | append0[3] << 24;
14106 w2[2] = append0[3] >> 8 | append1[0] << 24;
14107 w2[3] = append1[0] >> 8 | append1[1] << 24;
14108 w3[0] = append1[1] >> 8 | append1[2] << 24;
14109 w3[1] = append1[2] >> 8 | append1[3] << 24;
14110 break;
14111
14112 case 28:
14113 w1[3] = append0[0];
14114 w2[0] = append0[1];
14115 w2[1] = append0[2];
14116 w2[2] = append0[3];
14117 w2[3] = append1[0];
14118 w3[0] = append1[1];
14119 w3[1] = append1[2];
14120 break;
14121
14122 case 29:
14123 w1[3] = w1[3] | append0[0] << 8;
14124 w2[0] = append0[0] >> 24 | append0[1] << 8;
14125 w2[1] = append0[1] >> 24 | append0[2] << 8;
14126 w2[2] = append0[2] >> 24 | append0[3] << 8;
14127 w2[3] = append0[3] >> 24 | append1[0] << 8;
14128 w3[0] = append1[0] >> 24 | append1[1] << 8;
14129 w3[1] = append1[1] >> 24 | append1[2] << 8;
14130 break;
14131
14132 case 30:
14133 w1[3] = w1[3] | append0[0] << 16;
14134 w2[0] = append0[0] >> 16 | append0[1] << 16;
14135 w2[1] = append0[1] >> 16 | append0[2] << 16;
14136 w2[2] = append0[2] >> 16 | append0[3] << 16;
14137 w2[3] = append0[3] >> 16 | append1[0] << 16;
14138 w3[0] = append1[0] >> 16 | append1[1] << 16;
14139 w3[1] = append1[1] >> 16 | append1[2] << 16;
14140 break;
14141
14142 case 31:
14143 w1[3] = w1[3] | append0[0] << 24;
14144 w2[0] = append0[0] >> 8 | append0[1] << 24;
14145 w2[1] = append0[1] >> 8 | append0[2] << 24;
14146 w2[2] = append0[2] >> 8 | append0[3] << 24;
14147 w2[3] = append0[3] >> 8 | append1[0] << 24;
14148 w3[0] = append1[0] >> 8 | append1[1] << 24;
14149 w3[1] = append1[1] >> 8 | append1[2] << 24;
14150 break;
14151
14152 case 32:
14153 w2[0] = append0[0];
14154 w2[1] = append0[1];
14155 w2[2] = append0[2];
14156 w2[3] = append0[3];
14157 w3[0] = append1[0];
14158 w3[1] = append1[1];
14159 break;
14160 }
14161 }
14162
14163 static void memcat32_9 (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 append0[4], const u32 append1[4], const u32 append2[4], const u32 offset)
14164 {
14165 switch (offset)
14166 {
14167 case 0:
14168 w0[0] = append0[0];
14169 w0[1] = append0[1];
14170 w0[2] = append0[2];
14171 w0[3] = append0[3];
14172 w1[0] = append1[0];
14173 w1[1] = append1[1];
14174 w1[2] = append1[2];
14175 w1[3] = append1[3];
14176 w2[0] = append2[0];
14177 break;
14178
14179 case 1:
14180 w0[0] = w0[0] | append0[0] << 8;
14181 w0[1] = append0[0] >> 24 | append0[1] << 8;
14182 w0[2] = append0[1] >> 24 | append0[2] << 8;
14183 w0[3] = append0[2] >> 24 | append0[3] << 8;
14184 w1[0] = append0[3] >> 24 | append1[0] << 8;
14185 w1[1] = append1[0] >> 24 | append1[1] << 8;
14186 w1[2] = append1[1] >> 24 | append1[2] << 8;
14187 w1[3] = append1[2] >> 24 | append1[3] << 8;
14188 w2[0] = append1[3] >> 24 | append2[0] << 8;
14189 w2[1] = append2[0] >> 24;
14190 break;
14191
14192 case 2:
14193 w0[0] = w0[0] | append0[0] << 16;
14194 w0[1] = append0[0] >> 16 | append0[1] << 16;
14195 w0[2] = append0[1] >> 16 | append0[2] << 16;
14196 w0[3] = append0[2] >> 16 | append0[3] << 16;
14197 w1[0] = append0[3] >> 16 | append1[0] << 16;
14198 w1[1] = append1[0] >> 16 | append1[1] << 16;
14199 w1[2] = append1[1] >> 16 | append1[2] << 16;
14200 w1[3] = append1[2] >> 16 | append1[3] << 16;
14201 w2[0] = append1[3] >> 16 | append2[0] << 16;
14202 w2[1] = append2[0] >> 16;
14203 break;
14204
14205 case 3:
14206 w0[0] = w0[0] | append0[0] << 24;
14207 w0[1] = append0[0] >> 8 | append0[1] << 24;
14208 w0[2] = append0[1] >> 8 | append0[2] << 24;
14209 w0[3] = append0[2] >> 8 | append0[3] << 24;
14210 w1[0] = append0[3] >> 8 | append1[0] << 24;
14211 w1[1] = append1[0] >> 8 | append1[1] << 24;
14212 w1[2] = append1[1] >> 8 | append1[2] << 24;
14213 w1[3] = append1[2] >> 8 | append1[3] << 24;
14214 w2[0] = append1[3] >> 8 | append2[0] << 24;
14215 w2[1] = append2[0] >> 8;
14216 break;
14217
14218 case 4:
14219 w0[1] = append0[0];
14220 w0[2] = append0[1];
14221 w0[3] = append0[2];
14222 w1[0] = append0[3];
14223 w1[1] = append1[0];
14224 w1[2] = append1[1];
14225 w1[3] = append1[2];
14226 w2[0] = append1[3];
14227 w2[1] = append2[0];
14228 break;
14229
14230 case 5:
14231 w0[1] = w0[1] | append0[0] << 8;
14232 w0[2] = append0[0] >> 24 | append0[1] << 8;
14233 w0[3] = append0[1] >> 24 | append0[2] << 8;
14234 w1[0] = append0[2] >> 24 | append0[3] << 8;
14235 w1[1] = append0[3] >> 24 | append1[0] << 8;
14236 w1[2] = append1[0] >> 24 | append1[1] << 8;
14237 w1[3] = append1[1] >> 24 | append1[2] << 8;
14238 w2[0] = append1[2] >> 24 | append1[3] << 8;
14239 w2[1] = append1[3] >> 24 | append2[0] << 8;
14240 w2[2] = append2[0] >> 24;
14241 break;
14242
14243 case 6:
14244 w0[1] = w0[1] | append0[0] << 16;
14245 w0[2] = append0[0] >> 16 | append0[1] << 16;
14246 w0[3] = append0[1] >> 16 | append0[2] << 16;
14247 w1[0] = append0[2] >> 16 | append0[3] << 16;
14248 w1[1] = append0[3] >> 16 | append1[0] << 16;
14249 w1[2] = append1[0] >> 16 | append1[1] << 16;
14250 w1[3] = append1[1] >> 16 | append1[2] << 16;
14251 w2[0] = append1[2] >> 16 | append1[3] << 16;
14252 w2[1] = append1[3] >> 16 | append2[0] << 16;
14253 w2[2] = append2[0] >> 16;
14254 break;
14255
14256 case 7:
14257 w0[1] = w0[1] | append0[0] << 24;
14258 w0[2] = append0[0] >> 8 | append0[1] << 24;
14259 w0[3] = append0[1] >> 8 | append0[2] << 24;
14260 w1[0] = append0[2] >> 8 | append0[3] << 24;
14261 w1[1] = append0[3] >> 8 | append1[0] << 24;
14262 w1[2] = append1[0] >> 8 | append1[1] << 24;
14263 w1[3] = append1[1] >> 8 | append1[2] << 24;
14264 w2[0] = append1[2] >> 8 | append1[3] << 24;
14265 w2[1] = append1[3] >> 8 | append2[0] << 24;
14266 w2[2] = append2[0] >> 8;
14267 break;
14268
14269 case 8:
14270 w0[2] = append0[0];
14271 w0[3] = append0[1];
14272 w1[0] = append0[2];
14273 w1[1] = append0[3];
14274 w1[2] = append1[0];
14275 w1[3] = append1[1];
14276 w2[0] = append1[2];
14277 w2[1] = append1[3];
14278 w2[2] = append2[0];
14279 break;
14280
14281 case 9:
14282 w0[2] = w0[2] | append0[0] << 8;
14283 w0[3] = append0[0] >> 24 | append0[1] << 8;
14284 w1[0] = append0[1] >> 24 | append0[2] << 8;
14285 w1[1] = append0[2] >> 24 | append0[3] << 8;
14286 w1[2] = append0[3] >> 24 | append1[0] << 8;
14287 w1[3] = append1[0] >> 24 | append1[1] << 8;
14288 w2[0] = append1[1] >> 24 | append1[2] << 8;
14289 w2[1] = append1[2] >> 24 | append1[3] << 8;
14290 w2[2] = append1[3] >> 24 | append2[0] << 8;
14291 w2[3] = append2[0] >> 24;
14292 break;
14293
14294 case 10:
14295 w0[2] = w0[2] | append0[0] << 16;
14296 w0[3] = append0[0] >> 16 | append0[1] << 16;
14297 w1[0] = append0[1] >> 16 | append0[2] << 16;
14298 w1[1] = append0[2] >> 16 | append0[3] << 16;
14299 w1[2] = append0[3] >> 16 | append1[0] << 16;
14300 w1[3] = append1[0] >> 16 | append1[1] << 16;
14301 w2[0] = append1[1] >> 16 | append1[2] << 16;
14302 w2[1] = append1[2] >> 16 | append1[3] << 16;
14303 w2[2] = append1[3] >> 16 | append2[0] << 16;
14304 w2[3] = append2[0] >> 16;
14305 break;
14306
14307 case 11:
14308 w0[2] = w0[2] | append0[0] << 24;
14309 w0[3] = append0[0] >> 8 | append0[1] << 24;
14310 w1[0] = append0[1] >> 8 | append0[2] << 24;
14311 w1[1] = append0[2] >> 8 | append0[3] << 24;
14312 w1[2] = append0[3] >> 8 | append1[0] << 24;
14313 w1[3] = append1[0] >> 8 | append1[1] << 24;
14314 w2[0] = append1[1] >> 8 | append1[2] << 24;
14315 w2[1] = append1[2] >> 8 | append1[3] << 24;
14316 w2[2] = append1[3] >> 8 | append2[0] << 24;
14317 w2[3] = append2[0] >> 8;
14318 break;
14319
14320 case 12:
14321 w0[3] = append0[0];
14322 w1[0] = append0[1];
14323 w1[1] = append0[2];
14324 w1[2] = append0[3];
14325 w1[3] = append1[0];
14326 w2[0] = append1[1];
14327 w2[1] = append1[2];
14328 w2[2] = append1[3];
14329 w2[3] = append2[0];
14330 break;
14331
14332 case 13:
14333 w0[3] = w0[3] | append0[0] << 8;
14334 w1[0] = append0[0] >> 24 | append0[1] << 8;
14335 w1[1] = append0[1] >> 24 | append0[2] << 8;
14336 w1[2] = append0[2] >> 24 | append0[3] << 8;
14337 w1[3] = append0[3] >> 24 | append1[0] << 8;
14338 w2[0] = append1[0] >> 24 | append1[1] << 8;
14339 w2[1] = append1[1] >> 24 | append1[2] << 8;
14340 w2[2] = append1[2] >> 24 | append1[3] << 8;
14341 w2[3] = append1[3] >> 24 | append2[0] << 8;
14342 w3[0] = append2[0] >> 24;
14343 break;
14344
14345 case 14:
14346 w0[3] = w0[3] | append0[0] << 16;
14347 w1[0] = append0[0] >> 16 | append0[1] << 16;
14348 w1[1] = append0[1] >> 16 | append0[2] << 16;
14349 w1[2] = append0[2] >> 16 | append0[3] << 16;
14350 w1[3] = append0[3] >> 16 | append1[0] << 16;
14351 w2[0] = append1[0] >> 16 | append1[1] << 16;
14352 w2[1] = append1[1] >> 16 | append1[2] << 16;
14353 w2[2] = append1[2] >> 16 | append1[3] << 16;
14354 w2[3] = append1[3] >> 16 | append2[0] << 16;
14355 w3[0] = append2[0] >> 16;
14356 break;
14357
14358 case 15:
14359 w0[3] = w0[3] | append0[0] << 24;
14360 w1[0] = append0[0] >> 8 | append0[1] << 24;
14361 w1[1] = append0[1] >> 8 | append0[2] << 24;
14362 w1[2] = append0[2] >> 8 | append0[3] << 24;
14363 w1[3] = append0[3] >> 8 | append1[0] << 24;
14364 w2[0] = append1[0] >> 8 | append1[1] << 24;
14365 w2[1] = append1[1] >> 8 | append1[2] << 24;
14366 w2[2] = append1[2] >> 8 | append1[3] << 24;
14367 w2[3] = append1[3] >> 8 | append2[0] << 24;
14368 w3[0] = append2[0] >> 8;
14369 break;
14370
14371 case 16:
14372 w1[0] = append0[0];
14373 w1[1] = append0[1];
14374 w1[2] = append0[2];
14375 w1[3] = append0[3];
14376 w2[0] = append1[0];
14377 w2[1] = append1[1];
14378 w2[2] = append1[2];
14379 w2[3] = append1[3];
14380 w3[0] = append2[0];
14381 break;
14382
14383 case 17:
14384 w1[0] = w1[0] | append0[0] << 8;
14385 w1[1] = append0[0] >> 24 | append0[1] << 8;
14386 w1[2] = append0[1] >> 24 | append0[2] << 8;
14387 w1[3] = append0[2] >> 24 | append0[3] << 8;
14388 w2[0] = append0[3] >> 24 | append1[0] << 8;
14389 w2[1] = append1[0] >> 24 | append1[1] << 8;
14390 w2[2] = append1[1] >> 24 | append1[2] << 8;
14391 w2[3] = append1[2] >> 24 | append1[3] << 8;
14392 w3[0] = append1[3] >> 24 | append2[0] << 8;
14393 w3[1] = append2[0] >> 24;
14394 break;
14395
14396 case 18:
14397 w1[0] = w1[0] | append0[0] << 16;
14398 w1[1] = append0[0] >> 16 | append0[1] << 16;
14399 w1[2] = append0[1] >> 16 | append0[2] << 16;
14400 w1[3] = append0[2] >> 16 | append0[3] << 16;
14401 w2[0] = append0[3] >> 16 | append1[0] << 16;
14402 w2[1] = append1[0] >> 16 | append1[1] << 16;
14403 w2[2] = append1[1] >> 16 | append1[2] << 16;
14404 w2[3] = append1[2] >> 16 | append1[3] << 16;
14405 w3[0] = append1[3] >> 16 | append2[0] << 16;
14406 w3[1] = append2[0] >> 16;
14407 break;
14408
14409 case 19:
14410 w1[0] = w1[0] | append0[0] << 24;
14411 w1[1] = append0[0] >> 8 | append0[1] << 24;
14412 w1[2] = append0[1] >> 8 | append0[2] << 24;
14413 w1[3] = append0[2] >> 8 | append0[3] << 24;
14414 w2[0] = append0[3] >> 8 | append1[0] << 24;
14415 w2[1] = append1[0] >> 8 | append1[1] << 24;
14416 w2[2] = append1[1] >> 8 | append1[2] << 24;
14417 w2[3] = append1[2] >> 8 | append1[3] << 24;
14418 w3[0] = append1[3] >> 8 | append2[0] << 24;
14419 w3[1] = append2[0] >> 8;
14420 break;
14421
14422 case 20:
14423 w1[1] = append0[0];
14424 w1[2] = append0[1];
14425 w1[3] = append0[2];
14426 w2[0] = append0[3];
14427 w2[1] = append1[0];
14428 w2[2] = append1[1];
14429 w2[3] = append1[2];
14430 w3[0] = append1[3];
14431 w3[1] = append2[0];
14432 break;
14433
14434 case 21:
14435 w1[1] = w1[1] | append0[0] << 8;
14436 w1[2] = append0[0] >> 24 | append0[1] << 8;
14437 w1[3] = append0[1] >> 24 | append0[2] << 8;
14438 w2[0] = append0[2] >> 24 | append0[3] << 8;
14439 w2[1] = append0[3] >> 24 | append1[0] << 8;
14440 w2[2] = append1[0] >> 24 | append1[1] << 8;
14441 w2[3] = append1[1] >> 24 | append1[2] << 8;
14442 w3[0] = append1[2] >> 24 | append1[3] << 8;
14443 w3[1] = append1[3] >> 24 | append2[0] << 8;
14444 break;
14445
14446 case 22:
14447 w1[1] = w1[1] | append0[0] << 16;
14448 w1[2] = append0[0] >> 16 | append0[1] << 16;
14449 w1[3] = append0[1] >> 16 | append0[2] << 16;
14450 w2[0] = append0[2] >> 16 | append0[3] << 16;
14451 w2[1] = append0[3] >> 16 | append1[0] << 16;
14452 w2[2] = append1[0] >> 16 | append1[1] << 16;
14453 w2[3] = append1[1] >> 16 | append1[2] << 16;
14454 w3[0] = append1[2] >> 16 | append1[3] << 16;
14455 w3[1] = append1[3] >> 16 | append2[0] << 16;
14456 break;
14457
14458 case 23:
14459 w1[1] = w1[1] | append0[0] << 24;
14460 w1[2] = append0[0] >> 8 | append0[1] << 24;
14461 w1[3] = append0[1] >> 8 | append0[2] << 24;
14462 w2[0] = append0[2] >> 8 | append0[3] << 24;
14463 w2[1] = append0[3] >> 8 | append1[0] << 24;
14464 w2[2] = append1[0] >> 8 | append1[1] << 24;
14465 w2[3] = append1[1] >> 8 | append1[2] << 24;
14466 w3[0] = append1[2] >> 8 | append1[3] << 24;
14467 w3[1] = append1[3] >> 8 | append2[0] << 24;
14468 break;
14469
14470 case 24:
14471 w1[2] = append0[0];
14472 w1[3] = append0[1];
14473 w2[0] = append0[2];
14474 w2[1] = append0[3];
14475 w2[2] = append1[0];
14476 w2[3] = append1[1];
14477 w3[0] = append1[2];
14478 w3[1] = append1[3];
14479 break;
14480
14481 case 25:
14482 w1[2] = w1[2] | append0[0] << 8;
14483 w1[3] = append0[0] >> 24 | append0[1] << 8;
14484 w2[0] = append0[1] >> 24 | append0[2] << 8;
14485 w2[1] = append0[2] >> 24 | append0[3] << 8;
14486 w2[2] = append0[3] >> 24 | append1[0] << 8;
14487 w2[3] = append1[0] >> 24 | append1[1] << 8;
14488 w3[0] = append1[1] >> 24 | append1[2] << 8;
14489 w3[1] = append1[2] >> 24 | append1[3] << 8;
14490 break;
14491
14492 case 26:
14493 w1[2] = w1[2] | append0[0] << 16;
14494 w1[3] = append0[0] >> 16 | append0[1] << 16;
14495 w2[0] = append0[1] >> 16 | append0[2] << 16;
14496 w2[1] = append0[2] >> 16 | append0[3] << 16;
14497 w2[2] = append0[3] >> 16 | append1[0] << 16;
14498 w2[3] = append1[0] >> 16 | append1[1] << 16;
14499 w3[0] = append1[1] >> 16 | append1[2] << 16;
14500 w3[1] = append1[2] >> 16 | append1[3] << 16;
14501 break;
14502
14503 case 27:
14504 w1[2] = w1[2] | append0[0] << 24;
14505 w1[3] = append0[0] >> 8 | append0[1] << 24;
14506 w2[0] = append0[1] >> 8 | append0[2] << 24;
14507 w2[1] = append0[2] >> 8 | append0[3] << 24;
14508 w2[2] = append0[3] >> 8 | append1[0] << 24;
14509 w2[3] = append1[0] >> 8 | append1[1] << 24;
14510 w3[0] = append1[1] >> 8 | append1[2] << 24;
14511 w3[1] = append1[2] >> 8 | append1[3] << 24;
14512 break;
14513
14514 case 28:
14515 w1[3] = append0[0];
14516 w2[0] = append0[1];
14517 w2[1] = append0[2];
14518 w2[2] = append0[3];
14519 w2[3] = append1[0];
14520 w3[0] = append1[1];
14521 w3[1] = append1[2];
14522 break;
14523
14524 case 29:
14525 w1[3] = w1[3] | append0[0] << 8;
14526 w2[0] = append0[0] >> 24 | append0[1] << 8;
14527 w2[1] = append0[1] >> 24 | append0[2] << 8;
14528 w2[2] = append0[2] >> 24 | append0[3] << 8;
14529 w2[3] = append0[3] >> 24 | append1[0] << 8;
14530 w3[0] = append1[0] >> 24 | append1[1] << 8;
14531 w3[1] = append1[1] >> 24 | append1[2] << 8;
14532 break;
14533
14534 case 30:
14535 w1[3] = w1[3] | append0[0] << 16;
14536 w2[0] = append0[0] >> 16 | append0[1] << 16;
14537 w2[1] = append0[1] >> 16 | append0[2] << 16;
14538 w2[2] = append0[2] >> 16 | append0[3] << 16;
14539 w2[3] = append0[3] >> 16 | append1[0] << 16;
14540 w3[0] = append1[0] >> 16 | append1[1] << 16;
14541 w3[1] = append1[1] >> 16 | append1[2] << 16;
14542 break;
14543
14544 case 31:
14545 w1[3] = w1[3] | append0[0] << 24;
14546 w2[0] = append0[0] >> 8 | append0[1] << 24;
14547 w2[1] = append0[1] >> 8 | append0[2] << 24;
14548 w2[2] = append0[2] >> 8 | append0[3] << 24;
14549 w2[3] = append0[3] >> 8 | append1[0] << 24;
14550 w3[0] = append1[0] >> 8 | append1[1] << 24;
14551 w3[1] = append1[1] >> 8 | append1[2] << 24;
14552 break;
14553
14554 case 32:
14555 w2[0] = append0[0];
14556 w2[1] = append0[1];
14557 w2[2] = append0[2];
14558 w2[3] = append0[3];
14559 w3[0] = append1[0];
14560 w3[1] = append1[1];
14561 break;
14562 }
14563 }
14564
14565 static void switch_buffer_by_offset (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 offset)
14566 {
14567 const int offset_mod_4 = offset & 3;
14568
14569 const int offset_minus_4 = 4 - offset;
14570
14571 switch (offset / 4)
14572 {
14573 case 0:
14574 w3[2] = amd_bytealign ( 0, w3[1], offset_minus_4);
14575 w3[1] = amd_bytealign (w3[1], w3[0], offset_minus_4);
14576 w3[0] = amd_bytealign (w3[0], w2[3], offset_minus_4);
14577 w2[3] = amd_bytealign (w2[3], w2[2], offset_minus_4);
14578 w2[2] = amd_bytealign (w2[2], w2[1], offset_minus_4);
14579 w2[1] = amd_bytealign (w2[1], w2[0], offset_minus_4);
14580 w2[0] = amd_bytealign (w2[0], w1[3], offset_minus_4);
14581 w1[3] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14582 w1[2] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14583 w1[1] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14584 w1[0] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14585 w0[3] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14586 w0[2] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14587 w0[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14588 w0[0] = amd_bytealign (w0[0], 0, offset_minus_4);
14589
14590 if (offset_mod_4 == 0)
14591 {
14592 w0[0] = w0[1];
14593 w0[1] = w0[2];
14594 w0[2] = w0[3];
14595 w0[3] = w1[0];
14596 w1[0] = w1[1];
14597 w1[1] = w1[2];
14598 w1[2] = w1[3];
14599 w1[3] = w2[0];
14600 w2[0] = w2[1];
14601 w2[1] = w2[2];
14602 w2[2] = w2[3];
14603 w2[3] = w3[0];
14604 w3[0] = w3[1];
14605 w3[1] = w3[2];
14606 w3[2] = 0;
14607 }
14608
14609 break;
14610
14611 case 1:
14612 w3[2] = amd_bytealign ( 0, w3[0], offset_minus_4);
14613 w3[1] = amd_bytealign (w3[0], w2[3], offset_minus_4);
14614 w3[0] = amd_bytealign (w2[3], w2[2], offset_minus_4);
14615 w2[3] = amd_bytealign (w2[2], w2[1], offset_minus_4);
14616 w2[2] = amd_bytealign (w2[1], w2[0], offset_minus_4);
14617 w2[1] = amd_bytealign (w2[0], w1[3], offset_minus_4);
14618 w2[0] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14619 w1[3] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14620 w1[2] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14621 w1[1] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14622 w1[0] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14623 w0[3] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14624 w0[2] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14625 w0[1] = amd_bytealign (w0[0], 0, offset_minus_4);
14626 w0[0] = 0;
14627
14628 if (offset_mod_4 == 0)
14629 {
14630 w0[1] = w0[2];
14631 w0[2] = w0[3];
14632 w0[3] = w1[0];
14633 w1[0] = w1[1];
14634 w1[1] = w1[2];
14635 w1[2] = w1[3];
14636 w1[3] = w2[0];
14637 w2[0] = w2[1];
14638 w2[1] = w2[2];
14639 w2[2] = w2[3];
14640 w2[3] = w3[0];
14641 w3[0] = w3[1];
14642 w3[1] = w3[2];
14643 w3[2] = 0;
14644 }
14645
14646 break;
14647
14648 case 2:
14649 w3[2] = amd_bytealign ( 0, w2[3], offset_minus_4);
14650 w3[1] = amd_bytealign (w2[3], w2[2], offset_minus_4);
14651 w3[0] = amd_bytealign (w2[2], w2[1], offset_minus_4);
14652 w2[3] = amd_bytealign (w2[1], w2[0], offset_minus_4);
14653 w2[2] = amd_bytealign (w2[0], w1[3], offset_minus_4);
14654 w2[1] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14655 w2[0] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14656 w1[3] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14657 w1[2] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14658 w1[1] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14659 w1[0] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14660 w0[3] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14661 w0[2] = amd_bytealign (w0[0], 0, offset_minus_4);
14662 w0[1] = 0;
14663 w0[0] = 0;
14664
14665 if (offset_mod_4 == 0)
14666 {
14667 w0[2] = w0[3];
14668 w0[3] = w1[0];
14669 w1[0] = w1[1];
14670 w1[1] = w1[2];
14671 w1[2] = w1[3];
14672 w1[3] = w2[0];
14673 w2[0] = w2[1];
14674 w2[1] = w2[2];
14675 w2[2] = w2[3];
14676 w2[3] = w3[0];
14677 w3[0] = w3[1];
14678 w3[1] = w3[2];
14679 w3[2] = 0;
14680 }
14681
14682 break;
14683
14684 case 3:
14685 w3[2] = amd_bytealign ( 0, w2[2], offset_minus_4);
14686 w3[1] = amd_bytealign (w2[2], w2[1], offset_minus_4);
14687 w3[0] = amd_bytealign (w2[1], w2[0], offset_minus_4);
14688 w2[3] = amd_bytealign (w2[0], w1[3], offset_minus_4);
14689 w2[2] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14690 w2[1] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14691 w2[0] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14692 w1[3] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14693 w1[2] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14694 w1[1] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14695 w1[0] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14696 w0[3] = amd_bytealign (w0[0], 0, offset_minus_4);
14697 w0[2] = 0;
14698 w0[1] = 0;
14699 w0[0] = 0;
14700
14701 if (offset_mod_4 == 0)
14702 {
14703 w0[3] = w1[0];
14704 w1[0] = w1[1];
14705 w1[1] = w1[2];
14706 w1[2] = w1[3];
14707 w1[3] = w2[0];
14708 w2[0] = w2[1];
14709 w2[1] = w2[2];
14710 w2[2] = w2[3];
14711 w2[3] = w3[0];
14712 w3[0] = w3[1];
14713 w3[1] = w3[2];
14714 w3[2] = 0;
14715 }
14716
14717 break;
14718
14719 case 4:
14720 w3[2] = amd_bytealign ( 0, w2[1], offset_minus_4);
14721 w3[1] = amd_bytealign (w2[1], w2[0], offset_minus_4);
14722 w3[0] = amd_bytealign (w2[0], w1[3], offset_minus_4);
14723 w2[3] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14724 w2[2] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14725 w2[1] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14726 w2[0] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14727 w1[3] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14728 w1[2] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14729 w1[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14730 w1[0] = amd_bytealign (w0[0], 0, offset_minus_4);
14731 w0[3] = 0;
14732 w0[2] = 0;
14733 w0[1] = 0;
14734 w0[0] = 0;
14735
14736 if (offset_mod_4 == 0)
14737 {
14738 w1[0] = w1[1];
14739 w1[1] = w1[2];
14740 w1[2] = w1[3];
14741 w1[3] = w2[0];
14742 w2[0] = w2[1];
14743 w2[1] = w2[2];
14744 w2[2] = w2[3];
14745 w2[3] = w3[0];
14746 w3[0] = w3[1];
14747 w3[1] = w3[2];
14748 w3[2] = 0;
14749 }
14750
14751 break;
14752
14753 case 5:
14754 w3[2] = amd_bytealign ( 0, w2[0], offset_minus_4);
14755 w3[1] = amd_bytealign (w2[0], w1[3], offset_minus_4);
14756 w3[0] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14757 w2[3] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14758 w2[2] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14759 w2[1] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14760 w2[0] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14761 w1[3] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14762 w1[2] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14763 w1[1] = amd_bytealign (w0[0], 0, offset_minus_4);
14764 w1[0] = 0;
14765 w0[3] = 0;
14766 w0[2] = 0;
14767 w0[1] = 0;
14768 w0[0] = 0;
14769
14770 if (offset_mod_4 == 0)
14771 {
14772 w1[1] = w1[2];
14773 w1[2] = w1[3];
14774 w1[3] = w2[0];
14775 w2[0] = w2[1];
14776 w2[1] = w2[2];
14777 w2[2] = w2[3];
14778 w2[3] = w3[0];
14779 w3[0] = w3[1];
14780 w3[1] = w3[2];
14781 w3[2] = 0;
14782 }
14783
14784 break;
14785
14786 case 6:
14787 w3[2] = amd_bytealign ( 0, w1[3], offset_minus_4);
14788 w3[1] = amd_bytealign (w1[3], w1[2], offset_minus_4);
14789 w3[0] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14790 w2[3] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14791 w2[2] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14792 w2[1] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14793 w2[0] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14794 w1[3] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14795 w1[2] = amd_bytealign (w0[0], 0, offset_minus_4);
14796 w1[1] = 0;
14797 w1[0] = 0;
14798 w0[3] = 0;
14799 w0[2] = 0;
14800 w0[1] = 0;
14801 w0[0] = 0;
14802
14803 if (offset_mod_4 == 0)
14804 {
14805 w1[2] = w1[3];
14806 w1[3] = w2[0];
14807 w2[0] = w2[1];
14808 w2[1] = w2[2];
14809 w2[2] = w2[3];
14810 w2[3] = w3[0];
14811 w3[0] = w3[1];
14812 w3[1] = w3[2];
14813 w3[2] = 0;
14814 }
14815
14816 break;
14817
14818 case 7:
14819 w3[2] = amd_bytealign ( 0, w1[2], offset_minus_4);
14820 w3[1] = amd_bytealign (w1[2], w1[1], offset_minus_4);
14821 w3[0] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14822 w2[3] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14823 w2[2] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14824 w2[1] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14825 w2[0] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14826 w1[3] = amd_bytealign (w0[0], 0, offset_minus_4);
14827 w1[2] = 0;
14828 w1[1] = 0;
14829 w1[0] = 0;
14830 w0[3] = 0;
14831 w0[2] = 0;
14832 w0[1] = 0;
14833 w0[0] = 0;
14834
14835 if (offset_mod_4 == 0)
14836 {
14837 w1[3] = w2[0];
14838 w2[0] = w2[1];
14839 w2[1] = w2[2];
14840 w2[2] = w2[3];
14841 w2[3] = w3[0];
14842 w3[0] = w3[1];
14843 w3[1] = w3[2];
14844 w3[2] = 0;
14845 }
14846
14847 break;
14848
14849 case 8:
14850 w3[2] = amd_bytealign ( 0, w1[1], offset_minus_4);
14851 w3[1] = amd_bytealign (w1[1], w1[0], offset_minus_4);
14852 w3[0] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14853 w2[3] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14854 w2[2] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14855 w2[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14856 w2[0] = amd_bytealign (w0[0], 0, offset_minus_4);
14857 w1[3] = 0;
14858 w1[2] = 0;
14859 w1[1] = 0;
14860 w1[0] = 0;
14861 w0[3] = 0;
14862 w0[2] = 0;
14863 w0[1] = 0;
14864 w0[0] = 0;
14865
14866 if (offset_mod_4 == 0)
14867 {
14868 w2[0] = w2[1];
14869 w2[1] = w2[2];
14870 w2[2] = w2[3];
14871 w2[3] = w3[0];
14872 w3[0] = w3[1];
14873 w3[1] = w3[2];
14874 w3[2] = 0;
14875 }
14876
14877 break;
14878
14879 case 9:
14880 w3[2] = amd_bytealign ( 0, w1[0], offset_minus_4);
14881 w3[1] = amd_bytealign (w1[0], w0[3], offset_minus_4);
14882 w3[0] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14883 w2[3] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14884 w2[2] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14885 w2[1] = amd_bytealign (w0[0], 0, offset_minus_4);
14886 w2[0] = 0;
14887 w1[3] = 0;
14888 w1[2] = 0;
14889 w1[1] = 0;
14890 w1[0] = 0;
14891 w0[3] = 0;
14892 w0[2] = 0;
14893 w0[1] = 0;
14894 w0[0] = 0;
14895
14896 if (offset_mod_4 == 0)
14897 {
14898 w2[1] = w2[2];
14899 w2[2] = w2[3];
14900 w2[3] = w3[0];
14901 w3[0] = w3[1];
14902 w3[1] = w3[2];
14903 w3[2] = 0;
14904 }
14905
14906 break;
14907
14908 case 10:
14909 w3[2] = amd_bytealign ( 0, w0[3], offset_minus_4);
14910 w3[1] = amd_bytealign (w0[3], w0[2], offset_minus_4);
14911 w3[0] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14912 w2[3] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14913 w2[2] = amd_bytealign (w0[0], 0, offset_minus_4);
14914 w2[1] = 0;
14915 w2[0] = 0;
14916 w1[3] = 0;
14917 w1[2] = 0;
14918 w1[1] = 0;
14919 w1[0] = 0;
14920 w0[3] = 0;
14921 w0[2] = 0;
14922 w0[1] = 0;
14923 w0[0] = 0;
14924
14925 if (offset_mod_4 == 0)
14926 {
14927 w2[2] = w2[3];
14928 w2[3] = w3[0];
14929 w3[0] = w3[1];
14930 w3[1] = w3[2];
14931 w3[2] = 0;
14932 }
14933
14934 break;
14935
14936 case 11:
14937 w3[2] = amd_bytealign ( 0, w0[2], offset_minus_4);
14938 w3[1] = amd_bytealign (w0[2], w0[1], offset_minus_4);
14939 w3[0] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14940 w2[3] = amd_bytealign (w0[0], 0, offset_minus_4);
14941 w2[2] = 0;
14942 w2[1] = 0;
14943 w2[0] = 0;
14944 w1[3] = 0;
14945 w1[2] = 0;
14946 w1[1] = 0;
14947 w1[0] = 0;
14948 w0[3] = 0;
14949 w0[2] = 0;
14950 w0[1] = 0;
14951 w0[0] = 0;
14952
14953 if (offset_mod_4 == 0)
14954 {
14955 w2[3] = w3[0];
14956 w3[0] = w3[1];
14957 w3[1] = w3[2];
14958 w3[2] = 0;
14959 }
14960
14961 break;
14962
14963 case 12:
14964 w3[2] = amd_bytealign ( 0, w0[1], offset_minus_4);
14965 w3[1] = amd_bytealign (w0[1], w0[0], offset_minus_4);
14966 w3[0] = amd_bytealign (w0[0], 0, offset_minus_4);
14967 w2[3] = 0;
14968 w2[2] = 0;
14969 w2[1] = 0;
14970 w2[0] = 0;
14971 w1[3] = 0;
14972 w1[2] = 0;
14973 w1[1] = 0;
14974 w1[0] = 0;
14975 w0[3] = 0;
14976 w0[2] = 0;
14977 w0[1] = 0;
14978 w0[0] = 0;
14979
14980 if (offset_mod_4 == 0)
14981 {
14982 w3[0] = w3[1];
14983 w3[1] = w3[2];
14984 w3[2] = 0;
14985 }
14986
14987 break;
14988
14989 case 13:
14990 w3[2] = amd_bytealign ( 0, w0[0], offset_minus_4);
14991 w3[1] = amd_bytealign (w0[0], 0, offset_minus_4);
14992 w3[0] = 0;
14993 w2[3] = 0;
14994 w2[2] = 0;
14995 w2[1] = 0;
14996 w2[0] = 0;
14997 w1[3] = 0;
14998 w1[2] = 0;
14999 w1[1] = 0;
15000 w1[0] = 0;
15001 w0[3] = 0;
15002 w0[2] = 0;
15003 w0[1] = 0;
15004 w0[0] = 0;
15005
15006 if (offset_mod_4 == 0)
15007 {
15008 w3[1] = w3[2];
15009 w3[2] = 0;
15010 }
15011
15012 break;
15013 }
15014 }
15015
15016 static void switch_buffer_by_offset_be (u32x w0[4], u32x w1[4], u32x w2[4], u32x w3[4], const u32 offset)
15017 {
15018 switch (offset / 4)
15019 {
15020 case 0:
15021 w3[2] = amd_bytealign (w3[1], 0, offset);
15022 w3[1] = amd_bytealign (w3[0], w3[1], offset);
15023 w3[0] = amd_bytealign (w2[3], w3[0], offset);
15024 w2[3] = amd_bytealign (w2[2], w2[3], offset);
15025 w2[2] = amd_bytealign (w2[1], w2[2], offset);
15026 w2[1] = amd_bytealign (w2[0], w2[1], offset);
15027 w2[0] = amd_bytealign (w1[3], w2[0], offset);
15028 w1[3] = amd_bytealign (w1[2], w1[3], offset);
15029 w1[2] = amd_bytealign (w1[1], w1[2], offset);
15030 w1[1] = amd_bytealign (w1[0], w1[1], offset);
15031 w1[0] = amd_bytealign (w0[3], w1[0], offset);
15032 w0[3] = amd_bytealign (w0[2], w0[3], offset);
15033 w0[2] = amd_bytealign (w0[1], w0[2], offset);
15034 w0[1] = amd_bytealign (w0[0], w0[1], offset);
15035 w0[0] = amd_bytealign ( 0, w0[0], offset);
15036 break;
15037
15038 case 1:
15039 w3[2] = amd_bytealign (w3[0], 0, offset);
15040 w3[1] = amd_bytealign (w2[3], w3[0], offset);
15041 w3[0] = amd_bytealign (w2[2], w2[3], offset);
15042 w2[3] = amd_bytealign (w2[1], w2[2], offset);
15043 w2[2] = amd_bytealign (w2[0], w2[1], offset);
15044 w2[1] = amd_bytealign (w1[3], w2[0], offset);
15045 w2[0] = amd_bytealign (w1[2], w1[3], offset);
15046 w1[3] = amd_bytealign (w1[1], w1[2], offset);
15047 w1[2] = amd_bytealign (w1[0], w1[1], offset);
15048 w1[1] = amd_bytealign (w0[3], w1[0], offset);
15049 w1[0] = amd_bytealign (w0[2], w0[3], offset);
15050 w0[3] = amd_bytealign (w0[1], w0[2], offset);
15051 w0[2] = amd_bytealign (w0[0], w0[1], offset);
15052 w0[1] = amd_bytealign ( 0, w0[0], offset);
15053 w0[0] = 0;
15054 break;
15055
15056 case 2:
15057 w3[2] = amd_bytealign (w2[3], 0, offset);
15058 w3[1] = amd_bytealign (w2[2], w2[3], offset);
15059 w3[0] = amd_bytealign (w2[1], w2[2], offset);
15060 w2[3] = amd_bytealign (w2[0], w2[1], offset);
15061 w2[2] = amd_bytealign (w1[3], w2[0], offset);
15062 w2[1] = amd_bytealign (w1[2], w1[3], offset);
15063 w2[0] = amd_bytealign (w1[1], w1[2], offset);
15064 w1[3] = amd_bytealign (w1[0], w1[1], offset);
15065 w1[2] = amd_bytealign (w0[3], w1[0], offset);
15066 w1[1] = amd_bytealign (w0[2], w0[3], offset);
15067 w1[0] = amd_bytealign (w0[1], w0[2], offset);
15068 w0[3] = amd_bytealign (w0[0], w0[1], offset);
15069 w0[2] = amd_bytealign ( 0, w0[0], offset);
15070 w0[1] = 0;
15071 w0[0] = 0;
15072 break;
15073
15074 case 3:
15075 w3[2] = amd_bytealign (w2[2], 0, offset);
15076 w3[1] = amd_bytealign (w2[1], w2[2], offset);
15077 w3[0] = amd_bytealign (w2[0], w2[1], offset);
15078 w2[3] = amd_bytealign (w1[3], w2[0], offset);
15079 w2[2] = amd_bytealign (w1[2], w1[3], offset);
15080 w2[1] = amd_bytealign (w1[1], w1[2], offset);
15081 w2[0] = amd_bytealign (w1[0], w1[1], offset);
15082 w1[3] = amd_bytealign (w0[3], w1[0], offset);
15083 w1[2] = amd_bytealign (w0[2], w0[3], offset);
15084 w1[1] = amd_bytealign (w0[1], w0[2], offset);
15085 w1[0] = amd_bytealign (w0[0], w0[1], offset);
15086 w0[3] = amd_bytealign ( 0, w0[0], offset);
15087 w0[2] = 0;
15088 w0[1] = 0;
15089 w0[0] = 0;
15090 break;
15091
15092 case 4:
15093 w3[2] = amd_bytealign (w2[1], 0, offset);
15094 w3[1] = amd_bytealign (w2[0], w2[1], offset);
15095 w3[0] = amd_bytealign (w1[3], w2[0], offset);
15096 w2[3] = amd_bytealign (w1[2], w1[3], offset);
15097 w2[2] = amd_bytealign (w1[1], w1[2], offset);
15098 w2[1] = amd_bytealign (w1[0], w1[1], offset);
15099 w2[0] = amd_bytealign (w0[3], w1[0], offset);
15100 w1[3] = amd_bytealign (w0[2], w0[3], offset);
15101 w1[2] = amd_bytealign (w0[1], w0[2], offset);
15102 w1[1] = amd_bytealign (w0[0], w0[1], offset);
15103 w1[0] = amd_bytealign ( 0, w0[0], offset);
15104 w0[3] = 0;
15105 w0[2] = 0;
15106 w0[1] = 0;
15107 w0[0] = 0;
15108 break;
15109
15110 case 5:
15111 w3[2] = amd_bytealign (w2[0], 0, offset);
15112 w3[1] = amd_bytealign (w1[3], w2[0], offset);
15113 w3[0] = amd_bytealign (w1[2], w1[3], offset);
15114 w2[3] = amd_bytealign (w1[1], w1[2], offset);
15115 w2[2] = amd_bytealign (w1[0], w1[1], offset);
15116 w2[1] = amd_bytealign (w0[3], w1[0], offset);
15117 w2[0] = amd_bytealign (w0[2], w0[3], offset);
15118 w1[3] = amd_bytealign (w0[1], w0[2], offset);
15119 w1[2] = amd_bytealign (w0[0], w0[1], offset);
15120 w1[1] = amd_bytealign ( 0, w0[0], offset);
15121 w1[0] = 0;
15122 w0[3] = 0;
15123 w0[2] = 0;
15124 w0[1] = 0;
15125 w0[0] = 0;
15126 break;
15127
15128 case 6:
15129 w3[2] = amd_bytealign (w1[3], 0, offset);
15130 w3[1] = amd_bytealign (w1[2], w1[3], offset);
15131 w3[0] = amd_bytealign (w1[1], w1[2], offset);
15132 w2[3] = amd_bytealign (w1[0], w1[1], offset);
15133 w2[2] = amd_bytealign (w0[3], w1[0], offset);
15134 w2[1] = amd_bytealign (w0[2], w0[3], offset);
15135 w2[0] = amd_bytealign (w0[1], w0[2], offset);
15136 w1[3] = amd_bytealign (w0[0], w0[1], offset);
15137 w1[2] = amd_bytealign ( 0, w0[0], offset);
15138 w1[1] = 0;
15139 w1[0] = 0;
15140 w0[3] = 0;
15141 w0[2] = 0;
15142 w0[1] = 0;
15143 w0[0] = 0;
15144 break;
15145
15146 case 7:
15147 w3[2] = amd_bytealign (w1[2], 0, offset);
15148 w3[1] = amd_bytealign (w1[1], w1[2], offset);
15149 w3[0] = amd_bytealign (w1[0], w1[1], offset);
15150 w2[3] = amd_bytealign (w0[3], w1[0], offset);
15151 w2[2] = amd_bytealign (w0[2], w0[3], offset);
15152 w2[1] = amd_bytealign (w0[1], w0[2], offset);
15153 w2[0] = amd_bytealign (w0[0], w0[1], offset);
15154 w1[3] = amd_bytealign ( 0, w0[0], offset);
15155 w1[2] = 0;
15156 w1[1] = 0;
15157 w1[0] = 0;
15158 w0[3] = 0;
15159 w0[2] = 0;
15160 w0[1] = 0;
15161 w0[0] = 0;
15162 break;
15163
15164 case 8:
15165 w3[2] = amd_bytealign (w1[1], 0, offset);
15166 w3[1] = amd_bytealign (w1[0], w1[1], offset);
15167 w3[0] = amd_bytealign (w0[3], w1[0], offset);
15168 w2[3] = amd_bytealign (w0[2], w0[3], offset);
15169 w2[2] = amd_bytealign (w0[1], w0[2], offset);
15170 w2[1] = amd_bytealign (w0[0], w0[1], offset);
15171 w2[0] = amd_bytealign ( 0, w0[0], offset);
15172 w1[3] = 0;
15173 w1[2] = 0;
15174 w1[1] = 0;
15175 w1[0] = 0;
15176 w0[3] = 0;
15177 w0[2] = 0;
15178 w0[1] = 0;
15179 w0[0] = 0;
15180 break;
15181
15182 case 9:
15183 w3[2] = amd_bytealign (w1[0], 0, offset);
15184 w3[1] = amd_bytealign (w0[3], w1[0], offset);
15185 w3[0] = amd_bytealign (w0[2], w0[3], offset);
15186 w2[3] = amd_bytealign (w0[1], w0[2], offset);
15187 w2[2] = amd_bytealign (w0[0], w0[1], offset);
15188 w2[1] = amd_bytealign ( 0, w0[0], offset);
15189 w2[0] = 0;
15190 w1[3] = 0;
15191 w1[2] = 0;
15192 w1[1] = 0;
15193 w1[0] = 0;
15194 w0[3] = 0;
15195 w0[2] = 0;
15196 w0[1] = 0;
15197 w0[0] = 0;
15198 break;
15199
15200 case 10:
15201 w3[2] = amd_bytealign (w0[3], 0, offset);
15202 w3[1] = amd_bytealign (w0[2], w0[3], offset);
15203 w3[0] = amd_bytealign (w0[1], w0[2], offset);
15204 w2[3] = amd_bytealign (w0[0], w0[1], offset);
15205 w2[2] = amd_bytealign ( 0, w0[0], offset);
15206 w2[1] = 0;
15207 w2[0] = 0;
15208 w1[3] = 0;
15209 w1[2] = 0;
15210 w1[1] = 0;
15211 w1[0] = 0;
15212 w0[3] = 0;
15213 w0[2] = 0;
15214 w0[1] = 0;
15215 w0[0] = 0;
15216 break;
15217
15218 case 11:
15219 w3[2] = amd_bytealign (w0[2], 0, offset);
15220 w3[1] = amd_bytealign (w0[1], w0[2], offset);
15221 w3[0] = amd_bytealign (w0[0], w0[1], offset);
15222 w2[3] = amd_bytealign ( 0, w0[0], offset);
15223 w2[2] = 0;
15224 w2[1] = 0;
15225 w2[0] = 0;
15226 w1[3] = 0;
15227 w1[2] = 0;
15228 w1[1] = 0;
15229 w1[0] = 0;
15230 w0[3] = 0;
15231 w0[2] = 0;
15232 w0[1] = 0;
15233 w0[0] = 0;
15234 break;
15235
15236 case 12:
15237 w3[2] = amd_bytealign (w0[1], 0, offset);
15238 w3[1] = amd_bytealign (w0[0], w0[1], offset);
15239 w3[0] = amd_bytealign ( 0, w0[0], offset);
15240 w2[3] = 0;
15241 w2[2] = 0;
15242 w2[1] = 0;
15243 w2[0] = 0;
15244 w1[3] = 0;
15245 w1[2] = 0;
15246 w1[1] = 0;
15247 w1[0] = 0;
15248 w0[3] = 0;
15249 w0[2] = 0;
15250 w0[1] = 0;
15251 w0[0] = 0;
15252 break;
15253
15254 case 13:
15255 w3[2] = amd_bytealign (w0[0], 0, offset);
15256 w3[1] = amd_bytealign ( 0, w0[0], offset);
15257 w3[0] = 0;
15258 w2[3] = 0;
15259 w2[2] = 0;
15260 w2[1] = 0;
15261 w2[0] = 0;
15262 w1[3] = 0;
15263 w1[2] = 0;
15264 w1[1] = 0;
15265 w1[0] = 0;
15266 w0[3] = 0;
15267 w0[2] = 0;
15268 w0[1] = 0;
15269 w0[0] = 0;
15270 break;
15271 }
15272 }
15273 #endif
15274
15275 static u32 check_vector_accessible (const u32 il_pos, const u32 bf_loops, const u32 bfs_cnt, const u32 element)
15276 {
15277 #ifdef VECT_SIZE1
15278
15279 // nothing to do here
15280
15281 #else
15282
15283 if ((il_pos + 1) == bf_loops)
15284 {
15285 #ifdef VECT_SIZE2
15286 u32 bfs_over = bfs_cnt % 2;
15287
15288 if (bfs_over == 0) bfs_over = 2;
15289 #endif
15290
15291 #ifdef VECT_SIZE4
15292 u32 bfs_over = bfs_cnt % 4;
15293
15294 if (bfs_over == 0) bfs_over = 4;
15295 #endif
15296
15297 if (element >= bfs_over) return 0;
15298 }
15299
15300 #endif
15301
15302 return 1;
15303 }
Hashcat additions to support pwdhash