#define NV_GPU_CLOCK_FREQUENCIES_VER NV_GPU_CLOCK_FREQUENCIES_VER_3
//! @}
+//! Used in NvAPI_GPU_GetPerfDecreaseInfo.
+//! Bit masks for knowing the exact reason for performance decrease
+typedef enum _NVAPI_GPU_PERF_DECREASE
+{
+ NV_GPU_PERF_DECREASE_NONE = 0, //!< No Slowdown detected
+ NV_GPU_PERF_DECREASE_REASON_THERMAL_PROTECTION = 0x00000001, //!< Thermal slowdown/shutdown/POR thermal protection
+ NV_GPU_PERF_DECREASE_REASON_POWER_CONTROL = 0x00000002, //!< Power capping / pstate cap
+ NV_GPU_PERF_DECREASE_REASON_AC_BATT = 0x00000004, //!< AC->BATT event
+ NV_GPU_PERF_DECREASE_REASON_API_TRIGGERED = 0x00000008, //!< API triggered slowdown
+ NV_GPU_PERF_DECREASE_REASON_INSUFFICIENT_POWER = 0x00000010, //!< Power connector missing
+ NV_GPU_PERF_DECREASE_REASON_UNKNOWN = 0x80000000, //!< Unknown reason
+} NVAPI_GPU_PERF_DECREASE;
+
NVAPI_INTERFACE NvAPI_QueryInterface(uint offset);
NVAPI_INTERFACE NvAPI_Initialize();
NVAPI_INTERFACE NvAPI_GPU_GetDynamicPstatesInfoEx(NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_DYNAMIC_PSTATES_INFO_EX *pDynamicPstatesInfoEx);
NVAPI_INTERFACE NvAPI_GPU_GetAllClockFrequencies(NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLOCK_FREQUENCIES *pClkFreqs);
NVAPI_INTERFACE NvAPI_GPU_GetCurrentPCIEDownstreamWidth(NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pWidth);
+NVAPI_INTERFACE NvAPI_GPU_GetPerfDecreaseInfo(NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pPerfDecrInfo);
#ifdef __nvapi_success
#undef __success
typedef int (*NVAPI_GPU_GETDYNAMICPSTATESINFOEX) (NvPhysicalGpuHandle, NV_GPU_DYNAMIC_PSTATES_INFO_EX *);
typedef int (*NVAPI_GPU_GETALLCLOCKFREQUENCIES) (NvPhysicalGpuHandle, NV_GPU_CLOCK_FREQUENCIES *);
typedef int (*NVAPI_GPU_GETCURRENTPCIEDOWNSTREAMWIDTH) (NvPhysicalGpuHandle, NvU32 *);
+typedef int (*NVAPI_GPU_GETPERFDECREASEINFO) (NvPhysicalGpuHandle, NvU32 *);
typedef struct
{
NVAPI_GPU_GETDYNAMICPSTATESINFOEX NvAPI_GPU_GetDynamicPstatesInfoEx;
NVAPI_GPU_GETALLCLOCKFREQUENCIES NvAPI_GPU_GetAllClockFrequencies;
NVAPI_GPU_GETCURRENTPCIEDOWNSTREAMWIDTH NvAPI_GPU_GetCurrentPCIEDownstreamWidth;
+ NVAPI_GPU_GETPERFDECREASEINFO NvAPI_GPU_GetPerfDecreaseInfo;
} hm_nvapi_lib_t;
int hm_NvAPI_GPU_GetDynamicPstatesInfoEx (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_DYNAMIC_PSTATES_INFO_EX *pDynamicPstatesInfoEx);
int hm_NvAPI_GPU_GetAllClockFrequencies (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLOCK_FREQUENCIES *pClkFreqs);
int hm_NvAPI_GPU_GetCurrentPCIEDownstreamWidth (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pWidth);
+int hm_NvAPI_GPU_GetPerfDecreaseInfo (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pPerfDecrInfo);
#endif // HAVE_HWMON && HAVE_NVAPI
int hm_get_utilization_with_device_id (const uint device_id);
int hm_get_memoryspeed_with_device_id (const uint device_id);
int hm_get_corespeed_with_device_id (const uint device_id);
+int hm_get_throttle_with_device_id (const uint device_id);
int hm_set_fanspeed_with_device_id_amd (const uint device_id, const int fanspeed);
HC_LOAD_ADDR(nvapi, NvAPI_Initialize, NVAPI_INITIALIZE, nvapi_QueryInterface, 0x0150E828, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_Unload, NVAPI_UNLOAD, nvapi_QueryInterface, 0xD22BDD7E, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GetErrorMessage, NVAPI_GETERRORMESSAGE, nvapi_QueryInterface, 0x6C2D048C, NVAPI, 0)
- HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetDynamicPstatesInfoEx, NVAPI_GPU_GETDYNAMICPSTATESINFOEX, nvapi_QueryInterface, 0x60DED2ED, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_EnumPhysicalGPUs, NVAPI_ENUMPHYSICALGPUS, nvapi_QueryInterface, 0xE5AC921F, NVAPI, 0)
+ HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetDynamicPstatesInfoEx, NVAPI_GPU_GETDYNAMICPSTATESINFOEX, nvapi_QueryInterface, 0x60DED2ED, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetThermalSettings, NVAPI_GPU_GETTHERMALSETTINGS, nvapi_QueryInterface, 0xE3640A56, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetTachReading, NVAPI_GPU_GETTACHREADING, nvapi_QueryInterface, 0x5F608315, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetCoolerSettings, NVAPI_GPU_GETCOOLERSETTINGS, nvapi_QueryInterface, 0xDA141340, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetAllClockFrequencies, NVAPI_GPU_GETALLCLOCKFREQUENCIES, nvapi_QueryInterface, 0xDCB616C3, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetCurrentPCIEDownstreamWidth, NVAPI_GPU_GETCURRENTPCIEDOWNSTREAMWIDTH, nvapi_QueryInterface, 0xD048C3B1, NVAPI, 0)
+ HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetPerfDecreaseInfo, NVAPI_GPU_GETPERFDECREASEINFO, nvapi_QueryInterface, 0x7F7F4600, NVAPI, 0)
return 0;
}
return NvAPI_rc;
}
+int hm_NvAPI_GPU_GetPerfDecreaseInfo (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pPerfDecrInfo)
+{
+ if (!nvapi) return (-1);
+
+ NvAPI_Status NvAPI_rc = nvapi->NvAPI_GPU_GetPerfDecreaseInfo (hPhysicalGpu, pPerfDecrInfo);
+
+ if (NvAPI_rc != NVAPI_OK)
+ {
+ NvAPI_ShortString string = { 0 };
+
+ hm_NvAPI_GetErrorMessage (nvapi, NvAPI_rc, string);
+
+ log_info ("WARN: %s %d %s\n", "NvAPI_GPU_GetPerfDecreaseInfo()", NvAPI_rc, string);
+ }
+
+ return NvAPI_rc;
+}
+
#ifdef __MINGW64__
void __security_check_cookie (uintptr_t _StackCookie)
const int num_corespeed = hm_get_corespeed_with_device_id (device_id);
const int num_memoryspeed = hm_get_memoryspeed_with_device_id (device_id);
const int num_buslanes = hm_get_buslanes_with_device_id (device_id);
+ // not working
+ //const int num_throttle = hm_get_throttle_with_device_id (device_id);
char output_buf[256] = { 0 };
if (num_temperature >= 0)
{
- snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Temp:%uc", num_temperature);
+ snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Temp:%3uc", num_temperature);
output_len = strlen (output_buf);
}
if (num_fanspeed >= 0)
{
- snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Fan:%u%%", num_fanspeed);
+ snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Fan:%3u%%", num_fanspeed);
output_len = strlen (output_buf);
}
if (num_utilization >= 0)
{
- snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Util:%u%%", num_utilization);
+ snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Util:%3u%%", num_utilization);
output_len = strlen (output_buf);
}
if (num_corespeed >= 0)
{
- snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Core:%uMhz", num_corespeed);
+ snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Core:%4uMhz", num_corespeed);
output_len = strlen (output_buf);
}
if (num_memoryspeed >= 0)
{
- snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Mem:%uMhz", num_memoryspeed);
+ snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Mem:%4uMhz", num_memoryspeed);
output_len = strlen (output_buf);
}
output_len = strlen (output_buf);
}
+ /*
+ if (num_throttle >= 0)
+ {
+ snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " Throttle:%u", num_throttle);
+
+ output_len = strlen (output_buf);
+ }
+ */
+
if (output_len == 0)
{
snprintf (output_buf + output_len, sizeof (output_buf) - output_len, " N/A");
output_len = strlen (output_buf);
}
- log_info ("HWMon.GPU.#%d...:%s", device_id + 1, output_buf);
+ log_info ("HWMon.Dev.#%d...:%s", device_id + 1, output_buf);
}
hc_thread_mutex_unlock (mux_adl);
return -1;
}
+int hm_get_throttle_with_device_id (const uint device_id)
+{
+ if ((data.devices_param[device_id].device_type & CL_DEVICE_TYPE_GPU) == 0) return -1;
+
+ #ifdef HAVE_ADL
+
+ #endif // HAVE_ADL
+
+ #if defined(HAVE_NVML) || defined(HAVE_NVAPI)
+ if (data.devices_param[device_id].device_vendor_id == VENDOR_ID_NV)
+ {
+ #if defined(LINUX) && defined(HAVE_NVML)
+
+ #endif
+
+ #if defined(WIN) && defined(HAVE_NVAPI)
+ NvU32 throttle = 0;
+
+ if (hm_NvAPI_GPU_GetPerfDecreaseInfo (data.hm_nv, data.hm_device[device_id].adapter_index.nv, &throttle) != NVAPI_OK) return -1;
+
+ return throttle;
+ #endif
+ }
+ #endif // HAVE_NVML || HAVE_NVAPI
+
+ return -1;
+}
+
#ifdef HAVE_ADL
int hm_set_fanspeed_with_device_id_amd (const uint device_id, const int fanspeed)
{