include/ext_nvml.h

   1 /**
   2  * Authors.....: Jens Steube <jens.steube@gmail.com>
   3  *               Gabriele Gristina <matrix@hashcat.net>
   4  *               magnum <john.magnum@hushmail.com>
   5  *
   6  * License.....: MIT
   7  */
   8
   9 #ifndef EXT_NVML_H
  10 #define EXT_NVML_H
  11
  12 #if defined(HAVE_HWMON)
  13
  14 #include <common.h>
  15
  16 /**
  17  * Declarations from nvml.h
  18  */
  19
  20 typedef struct nvmlDevice_st* nvmlDevice_t;
  21
  22 typedef struct nvmlPciInfo_st {
  23   char busId[16];
  24   unsigned int domain;
  25   unsigned int bus;
  26   unsigned int device;
  27   unsigned int pciDeviceId;
  28   unsigned int pciSubSystemId;
  29 } nvmlPciInfo_t;
  30
  31 typedef struct nvmlUtilization_st {
  32   unsigned int gpu;    // GPU kernel execution last second, percent
  33   unsigned int memory; // GPU memory read/write last second, percent
  34 } nvmlUtilization_t;
  35
  36 typedef enum nvmlTemperatureSensors_enum {
  37   NVML_TEMPERATURE_GPU = 0     // Temperature sensor for the GPU die
  38 } nvmlTemperatureSensors_t;
  39
  40 typedef enum nvmlReturn_enum {
  41   NVML_SUCCESS = 0,                   // The operation was successful
  42   NVML_ERROR_UNINITIALIZED = 1,       // NVML was not first initialized with nvmlInit()
  43   NVML_ERROR_INVALID_ARGUMENT = 2,    // A supplied argument is invalid
  44   NVML_ERROR_NOT_SUPPORTED = 3,       // The requested operation is not available on target device
  45   NVML_ERROR_NO_PERMISSION = 4,       // The current user does not have permission for operation
  46   NVML_ERROR_ALREADY_INITIALIZED = 5, // Deprecated: Multiple initializations are now allowed through ref counting
  47   NVML_ERROR_NOT_FOUND = 6,           // A query to find an object was unsuccessful
  48   NVML_ERROR_INSUFFICIENT_SIZE = 7,   // An input argument is not large enough
  49   NVML_ERROR_INSUFFICIENT_POWER = 8,  // A device's external power cables are not properly attached
  50   NVML_ERROR_DRIVER_NOT_LOADED = 9,   // NVIDIA driver is not loaded
  51   NVML_ERROR_TIMEOUT = 10,            // User provided timeout passed
  52   NVML_ERROR_UNKNOWN = 999            // An internal driver error occurred
  53 } nvmlReturn_t;
  54
  55 typedef enum nvmlClockType_enum {
  56         NVML_CLOCK_GRAPHICS = 0,
  57         NVML_CLOCK_SM = 1,
  58         NVML_CLOCK_MEM = 2
  59 } nvmlClockType_t;
  60
  61 typedef enum nvmlTemperatureThresholds_enum
  62 {
  63     NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0,    // Temperature at which the GPU will shut down
  64                                                 // for HW protection
  65     NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1,    // Temperature at which the GPU will begin slowdown
  66     // Keep this last
  67     NVML_TEMPERATURE_THRESHOLD_COUNT
  68 } nvmlTemperatureThresholds_t;
  69
  70 /**
  71  * Compute mode.
  72  *
  73  * NVML_COMPUTEMODE_EXCLUSIVE_PROCESS was added in CUDA 4.0.
  74  * Earlier CUDA versions supported a single exclusive mode,
  75  * which is equivalent to NVML_COMPUTEMODE_EXCLUSIVE_THREAD in CUDA 4.0 and beyond.
  76  */
  77 typedef enum nvmlComputeMode_enum
  78 {
  79     NVML_COMPUTEMODE_DEFAULT           = 0,  //!< Default compute mode -- multiple contexts per device
  80     NVML_COMPUTEMODE_EXCLUSIVE_THREAD  = 1,  //!< Compute-exclusive-thread mode -- only one context per device, usable from one thread at a time
  81     NVML_COMPUTEMODE_PROHIBITED        = 2,  //!< Compute-prohibited mode -- no contexts per device
  82     NVML_COMPUTEMODE_EXCLUSIVE_PROCESS = 3,  //!< Compute-exclusive-process mode -- only one context per device, usable from multiple threads at a time
  83
  84     // Keep this last
  85     NVML_COMPUTEMODE_COUNT
  86 } nvmlComputeMode_t;
  87
  88 /**
  89  * GPU Operation Mode
  90  *
  91  * GOM allows to reduce power usage and optimize GPU throughput by disabling GPU features.
  92  *
  93  * Each GOM is designed to meet specific user needs.
  94  */
  95 typedef enum nvmlGom_enum
  96 {
  97     NVML_GOM_ALL_ON                    = 0, //!< Everything is enabled and running at full speed
  98
  99     NVML_GOM_COMPUTE                   = 1, //!< Designed for running only compute tasks. Graphics operations
 100                                             //!< are not allowed
 101
 102     NVML_GOM_LOW_DP                    = 2  //!< Designed for running graphics applications that don't require
 103                                             //!< high bandwidth double precision
 104 } nvmlGpuOperationMode_t;
 105
 106 /*
 107  * End of declarations from nvml.h
 108  **/
 109
 110 typedef nvmlDevice_t HM_ADAPTER_NV;
 111
 112 #include <shared.h>
 113
 114 typedef const char * (*NVML_ERROR_STRING) (nvmlReturn_t);
 115 typedef int (*NVML_INIT) (void);
 116 typedef int (*NVML_SHUTDOWN) (void);
 117 typedef nvmlReturn_t (*NVML_DEVICE_GET_NAME) (nvmlDevice_t, char *, unsigned int);
 118 typedef nvmlReturn_t (*NVML_DEVICE_GET_HANDLE_BY_INDEX) (unsigned int, nvmlDevice_t *);
 119 typedef nvmlReturn_t (*NVML_DEVICE_GET_TEMPERATURE) (nvmlDevice_t, nvmlTemperatureSensors_t, unsigned int *);
 120 typedef nvmlReturn_t (*NVML_DEVICE_GET_FAN_SPEED) (nvmlDevice_t, unsigned int *);
 121 typedef nvmlReturn_t (*NVML_DEVICE_GET_POWER_USAGE) (nvmlDevice_t, unsigned int *);
 122 typedef nvmlReturn_t (*NVML_DEVICE_GET_UTILIZATION_RATES) (nvmlDevice_t, nvmlUtilization_t *);
 123 typedef nvmlReturn_t (*NVML_DEVICE_GET_CLOCKINFO) (nvmlDevice_t, nvmlClockType_t, unsigned int *);
 124 typedef nvmlReturn_t (*NVML_DEVICE_GET_THRESHOLD) (nvmlDevice_t, nvmlTemperatureThresholds_t, unsigned int *);
 125 typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRPCIELINKGENERATION) (nvmlDevice_t, unsigned int *);
 126 typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRPCIELINKWIDTH) (nvmlDevice_t, unsigned int *);
 127 typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *);
 128 typedef nvmlReturn_t (*NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *);
 129 typedef nvmlReturn_t (*NVML_DEVICE_SET_COMPUTEMODE) (nvmlDevice_t, nvmlComputeMode_t);
 130 typedef nvmlReturn_t (*NVML_DEVICE_SET_OPERATIONMODE) (nvmlDevice_t, nvmlGpuOperationMode_t);
 131 typedef nvmlReturn_t (*NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS) (nvmlDevice_t, unsigned int *, unsigned int *);
 132 typedef nvmlReturn_t (*NVML_DEVICE_SET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int);
 133 typedef nvmlReturn_t (*NVML_DEVICE_GET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int *);
 134
 135 typedef struct
 136 {
 137   NV_LIB lib;
 138
 139   NVML_ERROR_STRING nvmlErrorString;
 140   NVML_INIT nvmlInit;
 141   NVML_SHUTDOWN nvmlShutdown;
 142   NVML_DEVICE_GET_NAME nvmlDeviceGetName;
 143   NVML_DEVICE_GET_HANDLE_BY_INDEX nvmlDeviceGetHandleByIndex;
 144   NVML_DEVICE_GET_TEMPERATURE nvmlDeviceGetTemperature;
 145   NVML_DEVICE_GET_FAN_SPEED nvmlDeviceGetFanSpeed;
 146   NVML_DEVICE_GET_POWER_USAGE nvmlDeviceGetPowerUsage;
 147   NVML_DEVICE_GET_UTILIZATION_RATES nvmlDeviceGetUtilizationRates;
 148   NVML_DEVICE_GET_CLOCKINFO nvmlDeviceGetClockInfo;
 149   NVML_DEVICE_GET_THRESHOLD nvmlDeviceGetTemperatureThreshold;
 150   NVML_DEVICE_GET_CURRPCIELINKGENERATION nvmlDeviceGetCurrPcieLinkGeneration;
 151   NVML_DEVICE_GET_CURRPCIELINKWIDTH nvmlDeviceGetCurrPcieLinkWidth;
 152   NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS nvmlDeviceGetCurrentClocksThrottleReasons;
 153   NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS nvmlDeviceGetSupportedClocksThrottleReasons;
 154   NVML_DEVICE_SET_COMPUTEMODE nvmlDeviceSetComputeMode;
 155   NVML_DEVICE_SET_OPERATIONMODE nvmlDeviceSetGpuOperationMode;
 156   NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS nvmlDeviceGetPowerManagementLimitConstraints;
 157   NVML_DEVICE_SET_POWERMANAGEMENTLIMIT nvmlDeviceSetPowerManagementLimit;
 158   NVML_DEVICE_GET_POWERMANAGEMENTLIMIT nvmlDeviceGetPowerManagementLimit;
 159
 160 } hm_nvml_lib_t;
 161
 162 #define NVML_PTR hm_nvml_lib_t
 163
 164 int nvml_init (NVML_PTR *lib);
 165 void nvml_close (NVML_PTR *lib);
 166
 167 const char * hm_NVML_nvmlErrorString (NVML_PTR *nvml, nvmlReturn_t nvml_rc);
 168 nvmlReturn_t hm_NVML_nvmlInit (NVML_PTR *nvml);
 169 nvmlReturn_t hm_NVML_nvmlShutdown (NVML_PTR *nvml);
 170 nvmlReturn_t hm_NVML_nvmlDeviceGetName (NVML_PTR *nvml, int, nvmlDevice_t device, char *name, unsigned int length);
 171 nvmlReturn_t hm_NVML_nvmlDeviceGetHandleByIndex (NVML_PTR *nvml, int, unsigned int index, nvmlDevice_t *device);
 172 nvmlReturn_t hm_NVML_nvmlDeviceGetTemperature (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp);
 173 nvmlReturn_t hm_NVML_nvmlDeviceGetFanSpeed (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *speed);
 174 nvmlReturn_t hm_NVML_nvmlDeviceGetPowerUsage (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *power);
 175 nvmlReturn_t hm_NVML_nvmlDeviceGetUtilizationRates (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlUtilization_t *utilization);
 176 nvmlReturn_t hm_NVML_nvmlDeviceGetClockInfo (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clock);
 177 nvmlReturn_t hm_NVML_nvmlDeviceGetTemperatureThreshold (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp);
 178 nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkGeneration (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *currLinkGen);
 179 nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *currLinkWidth);
 180 nvmlReturn_t hm_NVML_nvmlDeviceGetCurrentClocksThrottleReasons (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned long long *clocksThrottleReasons);
 181 nvmlReturn_t hm_NVML_nvmlDeviceGetSupportedClocksThrottleReasons (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned long long *supportedClocksThrottleReasons);
 182 nvmlReturn_t hm_NVML_nvmlDeviceSetComputeMode (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlComputeMode_t mode);
 183 nvmlReturn_t hm_NVML_nvmlDeviceSetGpuOperationMode (NVML_PTR *nvml, int, nvmlDevice_t device, nvmlGpuOperationMode_t mode);
 184 nvmlReturn_t hm_NVML_nvmlDeviceGetPowerManagementLimitConstraints (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *minLimit, unsigned int *maxLimit);
 185 nvmlReturn_t hm_NVML_nvmlDeviceSetPowerManagementLimit (NVML_PTR *nvml, int skip_warnings, nvmlDevice_t device, unsigned int limit);
 186 nvmlReturn_t hm_NVML_nvmlDeviceGetPowerManagementLimit (NVML_PTR *nvml, int skip_warnings, nvmlDevice_t device, unsigned int *limit);
 187
 188 #endif // HAVE_HWMON
 189
 190 #endif // EXT_NVML_H