#define NVIDIA_SPIN_DAMP 100
#define GPU_TEMP_DISABLE 0
#define GPU_TEMP_ABORT 90
-#define GPU_TEMP_RETAIN 65
+#define GPU_TEMP_RETAIN 75
#define WORKLOAD_PROFILE 2
#define KERNEL_ACCEL 0
#define KERNEL_LOOPS 0
device_param->device_name_chksum = device_name_chksum;
- // device_processor_cores
+ // vendor specific
if (device_param->device_type & CL_DEVICE_TYPE_GPU)
{
}
}
- // device_processor_cores
-
- if (device_type & CL_DEVICE_TYPE_CPU)
- {
- cl_uint device_processor_cores = 1;
-
- device_param->device_processor_cores = device_processor_cores;
- }
-
if (device_type & CL_DEVICE_TYPE_GPU)
{
- if (device_vendor_id == VENDOR_ID_AMD)
- {
- cl_uint device_processor_cores = 0;
-
- #define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
-
- hc_clGetDeviceInfo (data.ocl, device_param->device, CL_DEVICE_WAVEFRONT_WIDTH_AMD, sizeof (device_processor_cores), &device_processor_cores, NULL);
-
- device_param->device_processor_cores = device_processor_cores;
- }
- else if (device_vendor_id == VENDOR_ID_NV)
+ if (device_vendor_id == VENDOR_ID_NV)
{
cl_uint kernel_exec_timeout = 0;
device_param->kernel_exec_timeout = kernel_exec_timeout;
- cl_uint device_processor_cores = 0;
-
- #define CL_DEVICE_WARP_SIZE_NV 0x4003
-
- hc_clGetDeviceInfo (data.ocl, device_param->device, CL_DEVICE_WARP_SIZE_NV, sizeof (device_processor_cores), &device_processor_cores, NULL);
-
- device_param->device_processor_cores = device_processor_cores;
-
cl_uint sm_minor = 0;
cl_uint sm_major = 0;
device_param->nvidia_spin_damp /= 100;
}
- else
- {
- cl_uint device_processor_cores = 1;
-
- device_param->device_processor_cores = device_processor_cores;
- }
}
// display results
* OpenCL devices: allocate buffer for device specific information
*/
- int *temp_retain_fanspeed_value = (int *) mycalloc (data.devices_cnt, sizeof (int));
- int *temp_retain_fanpolicy_value = (int *) mycalloc (data.devices_cnt, sizeof (int));
-
ADLOD6MemClockState *od_clock_mem_status = (ADLOD6MemClockState *) mycalloc (data.devices_cnt, sizeof (ADLOD6MemClockState));
int *od_power_control_status = (int *) mycalloc (data.devices_cnt, sizeof (int));
const char *device_name_chksum = device_param->device_name_chksum;
const u32 device_processors = device_param->device_processors;
- const u32 device_processor_cores = device_param->device_processor_cores;
/**
* create context for each device
if (hash_mode == 3000) kernel_threads = 64; // DES
if (hash_mode == 3200) kernel_threads = 8; // Blowfish
if (hash_mode == 7500) kernel_threads = 64; // RC4
+ if (hash_mode == 8900) kernel_threads = 32; // scrypt
if (hash_mode == 9000) kernel_threads = 8; // Blowfish
+ if (hash_mode == 9300) kernel_threads = 32; // scrypt
if (hash_mode == 9700) kernel_threads = 64; // RC4
if (hash_mode == 9710) kernel_threads = 64; // RC4
if (hash_mode == 9800) kernel_threads = 64; // RC4
}
}
+ device_param->kernel_accel_min = 1;
+ device_param->kernel_accel_max = 8;
+
for (uint tmto = tmto_start; tmto < tmto_stop; tmto++)
{
// TODO: in theory the following calculation needs to be done per salt, not global
size_scryptV /= 1 << tmto;
- size_scryptV *= device_processors * device_processor_cores;
+ size_scryptV *= device_param->device_processors * device_param->kernel_threads * device_param->kernel_accel_max;
if (size_scryptV > device_param->device_maxmem_alloc)
{
for (uint salts_pos = 0; salts_pos < data.salts_cnt; salts_pos++)
{
data.salts_buf[salts_pos].scrypt_tmto = tmto;
- data.salts_buf[salts_pos].scrypt_phy = device_processors * device_processor_cores;
+ data.salts_buf[salts_pos].scrypt_phy = device_param->device_processors * device_param->kernel_threads * device_param->kernel_accel_max;
}
break;
char build_opts_new[1024] = { 0 };
- snprintf (build_opts_new, sizeof (build_opts_new) - 1, "%s -D VENDOR_ID=%u -D CUDA_ARCH=%d -D VECT_SIZE=%u -D DEVICE_TYPE=%u -D KERN_TYPE=%u -D _unroll -cl-std=CL1.1", build_opts, device_param->device_vendor_id, (device_param->sm_major * 100) + device_param->sm_minor, device_param->vector_width, (u32) device_param->device_type, kern_type);
+ snprintf (build_opts_new, sizeof (build_opts_new) - 1, "%s -D VENDOR_ID=%u -D CUDA_ARCH=%d -D VECT_SIZE=%u -D DEVICE_TYPE=%u -D DGST_R0=%u -D DGST_R1=%u -D DGST_R2=%u -D DGST_R3=%u -D DGST_ELEM=%u -D KERN_TYPE=%u -D _unroll -cl-std=CL1.1", build_opts, device_param->device_vendor_id, (device_param->sm_major * 100) + device_param->sm_minor, device_param->vector_width, (u32) device_param->device_type, data.dgst_pos0, data.dgst_pos1, data.dgst_pos2, data.dgst_pos3, data.dgst_size / 4, kern_type);
strncpy (build_opts, build_opts_new, sizeof (build_opts));
const int fanspeed = hm_get_fanspeed_with_device_id (device_id);
const int fanpolicy = hm_get_fanpolicy_with_device_id (device_id);
- temp_retain_fanspeed_value[device_id] = fanspeed;
- temp_retain_fanpolicy_value[device_id] = fanpolicy;
-
// we also set it to tell the OS we take control over the fan and it's automatic controller
// if it was set to automatic. we do not control user-defined fanspeeds.
local_free (c_threads);
+ if ((data.devices_status != STATUS_CRACKED) && (data.devices_status != STATUS_ABORTED) && (data.devices_status != STATUS_QUIT))
+ {
+ data.devices_status = STATUS_EXHAUSTED;
+ }
+
logfile_sub_var_uint ("status-after-work", data.devices_status);
data.restore = 0;
data.devices_status = STATUS_RUNNING;
}
+ // and overwrite benchmark aborts as well
+
+ if (data.benchmark == 1)
+ {
+ if (data.devices_status == STATUS_ABORTED)
+ {
+ data.devices_status = STATUS_RUNNING;
+ }
+ }
+
// finalize task
if (data.devices_status == STATUS_CRACKED) break;
// wait for non-interactive threads
- if ((data.devices_status != STATUS_CRACKED) && (data.devices_status != STATUS_ABORTED) && (data.devices_status != STATUS_QUIT))
- {
- data.devices_status = STATUS_EXHAUSTED;
- }
-
for (uint thread_idx = 0; thread_idx < inner_threads_cnt; thread_idx++)
{
hc_thread_wait (1, &inner_threads[thread_idx]);
#ifdef HAVE_HWMON
if (gpu_temp_disable == 0)
{
- if (gpu_temp_retain != 0) // VENDOR_ID_AMD is implied here
+ if (gpu_temp_retain != 0)
{
hc_thread_mutex_lock (mux_adl);
if (data.hm_device[device_id].fan_set_supported == 1)
{
- int fanspeed = temp_retain_fanspeed_value[device_id];
- int fanpolicy = temp_retain_fanpolicy_value[device_id];
+ int rc = -1;
- if (fanpolicy == 1)
+ if (device_param->device_vendor_id == VENDOR_ID_AMD)
{
- int rc = -1;
-
- if (device_param->device_vendor_id == VENDOR_ID_AMD)
- {
- rc = hm_set_fanspeed_with_device_id_adl (device_id, fanspeed, 0);
- }
- else if (device_param->device_vendor_id == VENDOR_ID_NV)
- {
- #ifdef LINUX
- rc = set_fan_control (data.hm_xnvctrl, data.hm_device[device_id].xnvctrl, NV_CTRL_GPU_COOLER_MANUAL_CONTROL_FALSE);
- #endif
-
- #ifdef WIN
- rc = hm_set_fanspeed_with_device_id_nvapi (device_id, fanspeed, fanpolicy);
- #endif
- }
+ rc = hm_set_fanspeed_with_device_id_adl (device_id, 100, 0);
+ }
+ else if (device_param->device_vendor_id == VENDOR_ID_NV)
+ {
+ #ifdef LINUX
+ rc = set_fan_control (data.hm_xnvctrl, data.hm_device[device_id].xnvctrl, NV_CTRL_GPU_COOLER_MANUAL_CONTROL_FALSE);
+ #endif
- if (rc == -1) log_info ("WARNING: Failed to restore default fan speed and policy for device #%", device_id + 1);
+ #ifdef WIN
+ rc = hm_set_fanspeed_with_device_id_nvapi (device_id, 100, 0);
+ #endif
}
+
+ if (rc == -1) log_info ("WARNING: Failed to restore default fan speed and policy for device #%", device_id + 1);
}
}
// reset power tuning
- if (powertune_enable == 1) // VENDOR_ID_AMD is implied here
+ if (powertune_enable == 1)
{
hc_thread_mutex_lock (mux_adl);
local_free (bitmap_s2_d);
#ifdef HAVE_HWMON
- local_free (temp_retain_fanspeed_value);
local_free (od_clock_mem_status);
local_free (od_power_control_status);
local_free (nvml_power_limit);