} zip2_t;
+typedef struct
+{
+ uint salt_buf[32];
+
+} win8phone_t;
+
typedef struct
{
uint P[256];
typedef struct
{
- u32 KEK[5];
-
+ u32 KEK[4];
u32 lsb[4];
u32 cipher[4];
uint kernel_exec_timeout;
uint device_processors;
- uint device_processor_cores;
u64 device_maxmem_alloc;
u64 device_global_mem;
u32 device_maxclock_frequency;
uint kernel_accel_min;
uint kernel_accel_max;
uint kernel_power;
- uint kernel_power_user;
+ uint hardware_power;
size_t size_pws;
size_t size_tmps;
uint exec_pos;
double exec_ms[EXEC_CACHE];
+ // workaround cpu spinning
+
+ double exec_us_prev1[EXPECTED_ITERATIONS];
+ double exec_us_prev2[EXPECTED_ITERATIONS];
+ double exec_us_prev3[EXPECTED_ITERATIONS];
+
// this is "current" speed
uint speed_pos;
bool opencl_v12;
+ double nvidia_spin_damp;
+
cl_uint device_vendor_id;
cl_uint platform_vendor_id;
#ifdef HAVE_HWMON
typedef struct
{
- union
- {
- #ifdef HAVE_ADL
- HM_ADAPTER_AMD amd;
- #endif
-
- #if defined(HAVE_NVML) || defined(HAVE_NVAPI)
- HM_ADAPTER_NV nv;
- #endif
+ HM_ADAPTER_ADL adl;
+ HM_ADAPTER_NVML nvml;
+ HM_ADAPTER_NVAPI nvapi;
+ HM_ADAPTER_XNVCTRL xnvctrl;
- } adapter_index;
+ int od_version;
- int od_version;
- int fan_supported;
-
- // int busid; // used for CL_DEVICE_TOPOLOGY_AMD but broken for dual GPUs
- // int devid; // used for CL_DEVICE_TOPOLOGY_AMD but broken for dual GPUs
+ int fan_get_supported;
+ int fan_set_supported;
} hm_attrs_t;
#endif // HAVE_HWMON
hc_device_param_t *devices_param;
+ uint shutdown_inner;
+ uint shutdown_outer;
+
/**
* workload specific
*/
+ uint hardware_power_all;
uint kernel_power_all;
- float kernel_power_div;
+ u64 kernel_power_final; // we save that so that all divisions are done from the same base
/**
* attack specific
*/
#ifdef HAVE_HWMON
- void *hm_nv;
- void *hm_amd;
+ void *hm_adl;
+ void *hm_nvml;
+ void *hm_nvapi;
+ void *hm_xnvctrl;
hm_attrs_t hm_device[DEVICES_MAX];
#endif
uint quiet;
uint force;
uint benchmark;
- uint benchmark_repeats;
uint runtime;
uint remove;
uint remove_timer;
extern hc_global_data_t data;
#endif
+