#define PW_MAX1 (PW_MAX + 1)
#define PW_DICTMAX 31
#define PW_DICTMAX1 (PW_DICTMAX + 1)
-#define PARAMCNT 32
+#define PARAMCNT 64
struct __hc_device_param
{
double nvidia_spin_damp;
+ cl_platform_id platform;
+
cl_uint device_vendor_id;
cl_uint platform_vendor_id;
cl_mem d_tmps;
cl_mem d_hooks;
cl_mem d_result;
- cl_mem d_scryptV_buf;
+ cl_mem d_scryptV0_buf;
+ cl_mem d_scryptV1_buf;
+ cl_mem d_scryptV2_buf;
+ cl_mem d_scryptV3_buf;
cl_mem d_root_css_buf;
cl_mem d_markov_css_buf;
time_t runtime_start;
time_t runtime_stop;
+ time_t prepare_time;
+
time_t proc_start;
time_t proc_stop;